BU9796FS

LCD Segment Driver series 80-segment Drivers (20SEG×4COM) BU9796FS No.09044EAT02 ●Description This is LCD segment driver for 80 segment type display. There is a lineup which is suitable for multi function display and is integrated display RAM and power supply circuit for LCD driving with 4 common output type: BU9796FS. ●Features 1) 2wire serial interface 2) Integrated RAM for display data (DDRAM) ： 20 × 4bit (Max 80 Segment) 3) LCD driving port： 4 Common output, 20 Segment output 4) Display Duty: 1/4 duty 5) Integrated Oscillation circuit 6) Integrated Buffer AMP for LCD driving power supply circuit 7) Support 1/2bias, 1/3bias select 8) No external components 9) Low voltage / low power consumption design: 2.5~5.5V ●Applications Telephone, FAX, Portable equipments (POS, ECR, PDA etc.), DSC, DVC, Car audio, Home electrical appliance, Meter equipment etc. ● Absolute Maximum Ratings （Ta=25degree, VSS=0V） Parameter Power Supply Voltage1 Power Supply Voltage2 Allowable loss Input voltage range Operational temperature range Storage temperature range Symbol VDD VLCD Pd VIN Topr Tstg Limits -0.5 ～ +7.0 -0.5 ～ +7.0 0.64 -0.5 ～ VDD+0.5 -40 ～ +85 -55 ～ +125 Unit V V W V degree degree Remarks Power supply LCD drive voltage When use more than Ta=25C, subtract 6.4mW per degree. *This product is not designed against radioactive ray. ● Recommend operating conditions (Ta=25degree, VSS=0V) Parameter Power Supply Voltage1 Power Supply Voltage2 Symbol VDD VLCD MIN 2.5 0 TYP MAX 5.5 VDD-2.4 Unit V V Remarks Power supply LCD drive voltage * Please use in the range of VDD-VLCD≧ 2.4V www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 1/11 2009.05 - Rev.A BU9796FS Technical Note ●Electrical Characteristics DC Characteristics (VDD=2.5～5.5V, VLCD=0V, VSS=0V, Ta=-40～85degree, unless otherwise specified) Parameter “H” level input voltage “L” level input voltage “H” level input current “L” level input current LCD Driver on resistance Standby current SEG COM Symbol VIH VIL IIH IIL RON RON VLCD IDD1 Limit MIN 0.7VDD VSS -1 0 TYP 3 3 MAX VDD 0.3VDD 1 VDD-2.4 5 Unit V V uA uA kΩ kΩ V uA Iload=±10uA VDD-VLCD≧2.4V Display off, Oscillation off VDD=3.3V, VLCD=0V, Ta=25degree Power save mode SR = Power save mode1, Power save mode FR = Power save mode1 1/3 bias, Frame inverse Power save mode FR = Normal mode Condition VLCD supply voltage Power consumption IDD2 - 12.5 30 uA Frame frequency fCLK 56 80 104 Hz MPU interface Characteristics (VDD=2.5～5.5V, VLCD=0V, VSS=0V, Ta=-40～85degree, unless otherwise specified) Parameter Input rise time Input fall time SCL cycle time “H” SCL pulse width “L” SCL pulse width SDA setup time SDA hold time Buss free time START condition hold time Symbol tr tf tSCYC tSHW tSLW tSDS tSDH tBUF tHD;STA tSU;STA tSU;STO Limit MIN. 2.5 0.6 1.3 100 100 1.3 0.6 0.6 0.6 TYP. MAX. 0.3 0.3 Unit us us us us us ns ns us us us us Condition START condition setup time STOP condition setup time SDA t BUF t LW tr tf t cyc SCL t HD;STA tr t SDH t HW t SDS SDA t SU;STA t SU;STO Fig. 1 interface timing www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 2/11 2009.05 - Rev.A BU9796FS ●Block Diagram COM0……COM3 V DD SEG0…… SEG19 Technical Note ● Pin Arrangement TEST 2 TEST 1 SEG 19 SEG 16 SEG 1 ＋ － LCD BIAS SELECTOR common counter blink timing generator D DRAM ＋ － VLCD OSCIN OSCILLATOR Pow er On Reset Command register Command Data Decoder SEG 2 SEG 3 SEG 4 SEG 5 SCL SEG 6 SEG 7 SEG 8 SEG 9 SEG 10 SEG 11 VLCD SEG0 VDD SDA VSS common driver S egment driver SEG 12 SEG 13 SEG 14 SEG 15 serial inter face I F FILTER VSS Fig. 2 block diagram S DA SCL Fig. 3 Pin arrangement ●Terminal description Terminal TEST1 Terminal No. 26 I/O I Test input (ROHM use only) Must be connect to VSS Test input (ROHM use only) TEST2=”L”: POR circuit enable TEST2=”H”: POR circuit disenable, refer to “Cautions in Power ON/OFF” External clock input Ext clock and Int clock can be changed by command. Must be connect to VSS when use internal oscillation circuit. serial data in-out terminal serial data transfer clock GND Power supply Power supply for LCD driving O O SEGMENT output for LCD driving COMMON output for LCD driving Function TEST2 27 I OSCIN SDA SCL VSS VDD VLCD SEG0-19 COM0-3 28 30 29 25 24 23 31,32 1-18 19-22 I I/O I www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 3/11 2009.05 - Rev.A SEG 17 SEG 18 COM 3 COM 2 COM 1 COM 0 OSCIN LCD voltage generator BU9796FS ● Command Description D7 (MSB) is bit for command or data judgment. Refer to Command and data transfer method. C： 0： Next byte is RAM write data. 1： Next byte is command. Technical Note ○ Display control (DISCTL) MSB D7 C D6 0 D5 1 D4 P4 D3 P3 D2 P2 D1 P1 LSB D0 P0 Set Power save mode FR Setup Normal mode Power save mode1 Power save mode2 Power save mode3 Set LCD drive waveform Setup Line inversion Frame inversion Set Power save mode SR Setup P4 0 0 1 1 P3 0 1 0 1 Reset initialize condition ○ P2 0 1 Reset initialize condition ○ P1 P0 Reset initialize condition Power save mode1 0 0 Power save mode2 0 1 Normal mode 1 0 ○ High power mode 1 1 * Please keep condition VDD-VLCD≧3.0V in High power mode. ○ Mode Set (MODE SET) MSB D7 C D6 1 D5 0 D4 * D3 P3 D2 P2 D1 * LSB D0 * (*: Don’t Care) Set display ON and OFF Setup Display OFF Display ON Set bias level Setup 1/3 Bias 1/2 Bias P3 0 1 Reset initialize condition ○ P3 0 1 Reset initialize condition ○ www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 4/11 2009.05 - Rev.A BU9796FS Technical Note ○ Address set (ADSET) MSB D7 C D6 0 D5 0 D4 P4 D3 P3 D2 P2 D1 P1 LSB D0 P0 The range of address can be set as 00000 to 10011(2). ○ Set IC Operation (ICSET) MSB D7 C D6 1 D5 1 D4 0 D3 1 D2 * D1 P1 LSB D0 P0 (*: Don’t Care) Set software reset execution Setup No operation Software Reset execute Set oscillator mode setup Internal oscillation External clock input P1 0 1 P0 0 1 Reset initialize condition ○ ○ Blink control (BLKCTL) MSB D7 C D6 1 D5 1 D4 1 D3 0 D2 * D1 P1 LSB D0 P0 (*: Don’t Care) Set blink mode Blink mode (Hz) OFF 0.5 1 2 P1 0 0 1 1 P0 0 1 0 1 Reset initialize condition ○ ○ All Pixel control (APCTL) MSB D7 C D6 1 D5 1 D4 1 D3 1 D2 1 D1 P1 LSB D0 P0 All display set ON, OFF APON Normal All pixel ON APOFF Normal All pixel OFF P1 0 1 P0 0 1 Reset initialize condition ○ Reset initialize condition ○ www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 5/11 2009.05 - Rev.A BU9796FS ●Function description ○ Command transfer method Technical Note 1byte after Slave Address always becomes command input. MSB (“command or data judge bit”) of command decide to next data is command or display data. When set “command or data judge bit”=‘1’, next byte will be command. When set “command or data judge bit”=‘0’, next byte data is display data. S Slave address A 1 Command A 1 Command A 1 Command A 0 Command A Display Data … P Once it becomes display data transfer condition, it cannot input command. When want to input command again, please generate “START condition” once. ○ Write display and transfer method This device has Display Data RAM (DDRAM) of 50×4=200bit. The relationship between data input and display data, DDRAM data and address are as follows; Slave address S 01111100 A0 Command 0000000 Aa b c d e f g h Ai j k l m no p A… P Display Data DDRAM address 00 0 1 BIT 2 3 a b c d SEG0 01 e f g h SEG1 02 i j k l SEG2 03 m n o p SEG3 04 05 06 07 ・・・ 2Fh 30h 31h COM0 COM1 COM2 COM3 SEG4 SEG5 SEG6 SEG7 SEG47 SEG48 SEG49 Data transfer to DDRAM happens every 4bit data. So It will be finished to transfer with no need to wait ACK. ○ Reset initialize condition Initial condition after execute Software Reset is as follows. ・ Display is OFF. ・ DDRAM address is initialized (DDRAM Data is not initialized). ・ Refer to Command Description about initialize value of register. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 6/11 2009.05 - Rev.A BU9796FS ●Cautions in Power ON/OFF Technical Note This device has “P.O.R” (Power-On Reset) circuit and Software Reset function. Please keep the following recommended Power-On conditions in order to power up properly. Please set power up conditions to meet the recommended tR, tF, tOFF, and Vbot spec below in order to ensure P.O.R operation * It has to set TEST2=”L” to be valid in POR circuit. VDD tF tR Recommendation condition of tR, tF, tOFF, Vbot (Ta=25℃) tR Less than tF Less than 1ms tOFF More than 100ms Vbot Less than 0.1V tOFF Vbot 1ms Fig. 4 Power ON/OFF waveform If it is difficult to meet above conditions, execute the following sequence after Power-On. * It has to keep the following sequence in the case of TEST2=”H”. As POR circuit is invalid status. But it is not able to accept Command input in Power off status, it has to take care that software reset is not perfectly alternative method of POR function. (1) Generate STOP condition VDD SDA SCL STOP condition Fig. 5 (2) (3) (4) Stop condition Generate START condition. Issue slave address Execute Software Reset (ICSET) command www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 7/11 2009.05 - Rev.A BU9796FS ●IO Equivalent Circuit Technical Note VDD VLCD VSS SDA VSS SCL VSS VDD TEST1 VSS VDD TEST2 VSS VDD OSCIN VSS VLCD SEG/COM VSS Fig. 6 I/O equivalent circuit www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 8/11 2009.05 - Rev.A BU9796FS ●Notes for use Technical Note (1) Absolute Maximum Ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down devices, thus making impossible to identify breaking mode such as a short circuit or an open circuit. If any special mode exceeding the absolute maximum ratings is assumed, consideration should be given to take physical safety measures including the use of fuses, etc. (2) Operating conditions These conditions represent a range within which characteristics can be provided approximately as expected. The electrical characteristics are guaranteed under the conditions of each parameter. (3) Reverse connection of power supply connector The reverse connection of power supply connector can break down ICs. Take protective measures against the breakdown due to the reverse connection, such as mounting an external diode between the power supply and the IC’s power supply terminal. (4) Power supply line Design PCB pattern to provide low impedance for the wiring between the power supply and the GND lines. In this regard, or the digital block power supply and the analog block power supply, even though these power supplies has the same level of potential, separate the power supply pattern for the digital block from that for the analog block, thus suppressing the diffraction of digital noises to the analog block power supply resulting from impedance common to the wiring patterns. For the GND line, give consideration to design the patterns in a similar manner. Furthermore, for all power supply terminals to ICs, mount a capacitor between the power supply and the GND terminal. At the same time, in order to use an electrolytic capacitor, thoroughly check to be sure the characteristics of the capacitor to be used present no problem including the occurrence of capacity dropout at a low temperature, thus determining the constant. (5) GND voltage Make setting of the potential of the GND terminal so that it will be maintained at the minimum in any operating state. Furthermore, check to be sure no terminals are at a potential lower than the GND voltage including an actual electric transient. (6) Short circuit between terminals and erroneous mounting In order to mount ICs on a set PCB, pay thorough attention to the direction and offset of the ICs. Erroneous mounting can break down the ICs. Furthermore, if a short circuit occurs due to foreign matters entering between terminals or between the terminal and the power supply or the GND terminal, the ICs can break down. (7) Operation in strong electromagnetic field Be noted that using ICs in the strong electromagnetic field can malfunction them. (8) Inspection with set PCB On the inspection with the set PCB, if a capacitor is connected to a low-impedance IC terminal, the IC can suffer stress. Therefore, be sure to discharge from the set PCB by each process. Furthermore, in order to mount or dismount the set PCB to/from the jig for the inspection process, be sure to turn OFF the power supply and then mount the set PCB to the jig. After the completion of the inspection, be sure to turn OFF the power supply and then dismount it from the jig. In addition, for protection against static electricity, establish a ground for the assembly process and pay thorough attention to the transportation and the storage of the set PCB. (9) Input terminals In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic element can cause interference with circuit operation, thus resulting in a malfunction and then breakdown of the input terminal. Therefore, pay thorough attention not to handle the input terminals, such as to apply to the input terminals a voltage lower than the GND respectively, so that any parasitic element will operate. Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power supply voltage is applied, apply to the input terminals a voltage lower than the power supply voltage or within the guaranteed value of electrical characteristics. (10) Ground wiring pattern If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well. (11) External capacitor In order to use a ceramic capacitor as the external capacitor, determine the constant with consideration given to a degradation in the nominal capacitance due to DC bias and changes in the capacitance due to temperature, etc. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 9/11 2009.05 - Rev.A BU9796FS Technical Note (12) No Connecting input terminals In terms of extremely high impedance of CMOS gate, to open the input terminals causes unstable state. And unstable state brings the inside gate voltage of p-channel or n-channel transistor into active. As a result, battery current may increase. And unstable state can also causes unexpected operation of IC. So unless otherwise specified, input terminals not being used should be connected to the power supply or GND line. (13) Rush current When power is first supplied to the CMOS IC, it is possible that the internal logic may be unstable and rush current may flow instantaneously. Therefore, give special condition to power coupling capacitance, power wiring, width of GND wiring, and routing of connections. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 10/11 2009.05 - Rev.A BU9796FS ●Ordering part number Technical Note B D 9 Part No. 7 9 6 F S - E 2 Part No. Package FS: SSOP-A32 Packaging and forming specification E2: Embossed tape and reel SSOP-A32 13.6 ± 0.2 (MAX 13.95 include BURR) 32 17 Tape Quantity Direction of feed 0.3MIN Embossed carrier tape 2000pcs E2 The direction is the 1pin of product is at the upper left when you hold 7.8 ± 0.3 5.4 ± 0.2 ( reel on the left hand and you pull out the tape on the right hand ) 1 16 1.8 ± 0.1 0.15 ± 0.1 0.11 0.36 ± 0.1 0.8 0.1 1pin (Unit : mm) Direction of feed Reel ∗ Order quantity needs to be multiple of the minimum quantity. www.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. 11/11 2009.05 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. 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