BU9829GUL-W_10

High Reliability Serial EEPROMs WL-CSP EEPROM family SPI BUS BU9829GUL-W ●Description BU9829GUL-W is Serial EEPROM built-in LDO regulator by SPI BUS interface. ●Features ○EEPROM PART 1) 2,048 words×8 bits architecture serial EEPROM 2) Wide operating voltage range (1.6V～3.6V) 3) Serial Peripheral Interface 4) Self-timed write cycle with automatic erase 5) Low Power consumption Write (3.6V) : 1.5mA (Typ.) Read (3.6V) : 0.5mA (Typ.) Standby (3.6V) : 0.1µA (Typ.) 6) Auto-increment of registers address for Read mode 7) 32 byte Page Write mode 8) DATA security Defaults to power up with write-disabled state Software instructions for write-enable/disable Block writes protection by status register Write inhibit at low Vcc 9) Initial data FFh in all address, 00h in status register and 10 in VSET[1:0]. 10) Data retention: 10 years 11) Endurance : 100,000 erase/write cycles ○LDO REGULATOR PART 12) Low power consumption Standby (3.6V) : 0.1 µA (Typ.) Operation (3.6V) : 0.1mA (Typ.) 13) Power on/off by enable pin 14) Initial LDO output voltage 2.9V 15) Setting output voltage by EEPROM command (VSET WRITE) ●Absolute maximum rating (Ta=25℃) Parameter Symbol Supply Voltage Power Dissipation Storage Temperature Operating Temperature Terminal Voltage Vcc1(EEPROM) Vcc2(LDO) Pd Tstg Topr － No.10001EAT13 Rating -0.3～4.5 220 -65 ～ 125 -30 ～ 85 -0.3～Vcc＋0.3 Unit V mW ℃ ℃ V ●EEPROM recommended operating condition Parameter Symbol Supply Voltage Input Voltage Vcc1 VIN Rating 1.6～3.6 0～Vcc1 Unit V ●LDO regulator recommended operating condition Parameter Symbol Supply Voltage Input Voltage Vcc2 VIN Rating 2.9～3.6 0～Vcc2 Unit V www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 1/16 2010.09 - Rev.A BU9829GUL-W ●Memory cell characteristics (Ta=25℃, Vcc1=1.6～3.6V) Parameter Limits Min. Typ. － － Max. － － Unit Cycle Year Technical Note ●Input/output capacity (Ta=25℃, Frequency=5MHz) Parameter Input Capacitance *1 Output Capacitance*1 *1:Not 100% TESTED Symbol Conditions CIN COUT VIN=GND VOUT=GND Limits Min. Max. － － 8 8 Unit pF pF Write/Erase Cycle *1 100,000 Data Retention *1 10 *1 : Not 100% tested ●EEPROM DC operating characteristics (Unless otherwise specified, Ta=-30～85℃, Vcc1=1.6～3.6V) Limits Parameter Symbol Unit Test condition Min. Typ. Max. "H" Input Voltage1 "H" Input Voltage2 "L" Input Voltage1 "L" Input Voltage2 "L" Output Voltage1 "L" Output Voltage2 "H" Output Voltage1 "H" Output Voltage1 Input Leakage Current Output Leakage Current Operating Current Write ICC2 ICC3 Operating Current Read ICC4 Standby Current ISB － － － － 0.6 1.0 mA µA － － － － 2.0 0.2 mA mA VIH1 0.7xVcc1 VIH2 0.75xVcc1 VIL1 -0.3 VIL2 -0.3 VOL1 0 VOL2 0 VOH1 Vcc1-0.2 VOH2 Vcc1-0.2 ILI -1 ILO -1 ICC1 － － － － － － － － － － － － Vcc1+0.3 Vcc1+0.3 0.3xVcc1 0.25xVcc1 0.2 0.2 Vcc1 Vcc1 1 1 1.5 V V V V V V V V µA µA mA 2.5≦Vcc1≦3.6V 1.6≦Vcc1＜2.5V 2.5V≦Vcc1≦3.6V 1.6V≦Vcc1＜2.5V IOL=1.0mA , 2.5V≦Vcc1≦3.6V IOL=1.0mA , 1.6V≦Vcc1＜2.5V IOH=-0.4mA , 2.5V≦Vcc1≦3.6V IOH=-100µA , 1.6V≦Vcc1＜2.5V VIN=0～Vcc1 VOUT=0～Vcc1 , CSB=Vcc1 Vcc1=1.8V , fSCK =2MHz, tE/W=5ms Byte Write, Page Write, Write Status Register Vcc1=2.5V , fSCK =5MHz,tE/W=5ms Byte Write, Page Write, Write Status Register Vcc1=1.8V , fSCK=2MHz , SO=OPEN Read, Read Status Register Vcc1=2.5V , fSCK=5MHz,SO=OPEN Read, Read Status Register Vcc1=3.6V , CSB=Vcc1 , SCK , SI=Vcc1/GND ,SO=OPEN ○This product is not designed for protection against radioactive rays. ●EEPROM AC operating characteristics (Ta=-30～85℃) Parameter SCK clock Frequency SCK High Time SCK Low Time CSB High Time CSB Setup Time CSB Hold Time SCK Setup Time SCK Hold Time SI Setup Time SI Hold Time Output Data Delay Time Output Hold Time *1 Outuput Disable Time *1 SCK Rise Time *1 SCK Fall Time *1 Output Rise Time *1 Output Fall Time Write Cycle Time Wait Time From Vcc1 ON To EEPROM Command *1 : Not 100% tested Symbol fSCK tSCKWH tSCKWL tCS tCSS tCSH tSCKS tSCKH tDIS tDIH tPD tOH tOZ tRC tFC tRO tFO tE/W tON 1.6≦VCC1＜1.8V Min. － 200 200 200 150 150 50 50 50 50 － 0 － － － － － － 15 Typ. － － － － － － － － － － － － － － － － － － － Max. 2.5 － － － － － － － － － 100 － 200 1 1 50 50 5 － Min. － 80 80 90 60 60 50 50 20 20 － 0 － － － － － － 15 1.8≦VCC1≦3.6V Typ. － － － － － － － － － － － － － － － － － － － Max. 5 － － － － － － － － － 80 － 80 1 1 50 50 5 － Unit MHz ns ns ns ns ns ns ns ns ns ns ns ns µs µs ns ns ms ms www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 2/16 2010.09 - Rev.A BU9829GUL-W ●Synchronous data input/output timing tON Technical Note tCS VCC1 tCSS CSB tCSH tSCKH CSB tSCKS tSCKWL tSCKWH tRC tFC SCK SCK tDIS tDIH SI tPD tOH tRO,tFO tOZ Hi-Z SI SO SO Hi-Z Fig.1 Input timing SI data is latched into the chip at the rising edge of SCK clock. Address and data must be transferred from MSB. ●AC condition Parameter Load Capacitance Input Rise times Input Fall times Input Pulse Voltage Input and Output Timing Reference Voltages ●Pin configuration Symbol CL ●Pin function Land No. C B A C1 B1 A1 1 C2 B2 A2 2 C3 B3 A3 3 INDEX POST Fig.2 Input and output timing SO data toggles at the falling edge of SCK clock. Output data toggles from MSB. Limits Min. Typ. 0.25Vcc1/0.75Vcc1 0.3VCc1/0.7Vcc1 Max. 100 50 50 Unit pF ns ns V V Pin Name Vcc1 CSB SCK Vcc2 SI SO VOUT GND LDOEN I/O － IN IN － IN Function Power Supply (EEPROM) Chip Select Control Serial Data Clock Input Power Supply (LDO) Start Bit, Op.code, Address, Serial Data Input A1 A2 A3 B1 B2 B3 C1 C2 C3 OUT Serial Data Output OUT LDO Regulator Output － IN Ground (0V) LDO Regulator Enable Fig.3 Pin configuration (bottom view) ●LDO regulator DC operating characteristics (Unless otherwise specified Ta=-30～85℃) Specification Parameter Symbol Unit Min. Typ. Max. Output Voltage1-1 Output Voltage1-2 Output Voltage2-1 Output Voltage2-2 Output Voltage3-1 Output Voltage3-2 Output Voltage4-1 Output Voltage4-2 Operating Current Standby Current “H” Input Voltage “L” Input Voltage VOUT1-1 VOUT1-2 VOUT2-1 VOUT2-2 VOUT3-1 VOUT3-2 VOUT4-1 VOUT4-2 ICC ISB VIH VIL 2.9 2.9 2.8 2.8 2.7 2.7 2.6 2.6 1.4 -0.3 3.0 3.0 2.9 2.9 2.8 2.8 2.7 2.7 3.2 3.1 3.1 3.0 3.0 2.9 2.9 2.8 200 1.0 Vcc2+0.3 0.6 V V V V V V V V µA µA V V test condition 3.2V≦Vcc2≦3.6V, IOUT=0, 2mA, VSET=1, 0=[1:1] 3.2V≦Vcc2≦3.6V, IOUT=2, 10mA, VSET=1, 0=[1:1] 3.1V≦Vcc2≦3.6V, IOUT=0, 2mA, VSET=1, 0=[1:0] 3.1V≦Vcc2≦3.6V, IOUT=2, 10mA, VSET=1, 0=[1:0] 3.0V≦Vcc2≦3.6V, IOUT=0, 2mA, VSET=1, 0=[0:1] 3.0V≦Vcc2≦3.6V, IOUT=2, 10mA, VSET=1, 0=[0:1] 2.9V≦Vcc2≦3.6V, IOUT=0, 2mA, VSET=1, 0=[0:0] 2.9V≦Vcc2≦3.6V, IOUT=2, 10mA, VSET=1, 0=[0:0] Vcc2=3.6V, IOUT=0A Vcc2=3.6V, IOUT=0A, LDOEN=GND 2.9V≦Vcc2≦3.6V 2.9V≦Vcc2≦3.6V ○This product is not designed for protection against radioactive rays. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 3/16 2010.09 - Rev.A BU9829GUL-W ●LDO regulator AC operating characteristics Parameter Vcc1 Rise Time LDOEN Wait Time Symbol tVCC1 tLDOEN Specification Min. 15 Typ. Max. 5 Unit msec msec Technical Note Test condition VCC1 x 0%→VCC1 x 95% point VCC1 x 0%point→ LDOEN=High ●Output voltage depend on VSET bit The 2bit data are stored into the VSET memory and output voltage change among VOUT1～VOUT4. VSET data are Written into non-volatile memory array. Initial VSET data is 1,0 in VSET[1:0] and VOUT is 2.9V. STEP VOUT(typ.) [V] VSET1 VSET0 VOUT1 VOUT2 VOUT3 VOUT4 ●Input power supply regulation timing ①Using EEPROM PART In case of using EEPROM part, be sure to raise Vcc1 up to operating voltage. In this time, Vcc2 has no connection with operating. Vcc1 EEPROM EEPROM部電源 Power Supply 3.0 2.9 2.8 2.7 1 1 0 0 1 0 1 0 Vcc2 LDOレギュレータ部電源 LDO regulator Power Supply Not 動作不可 Operating Operating EEPROM動作可能範囲 Not 動作不可 Operating Operating EEPROM動作可能範囲 動作不可 Not Operating Fig.4 Using EEPROM Part, Regulation Timing ②Using LDO regulator part In case of using LDO regulator part, be sure to raise Vcc1 and Vcc2 up to operating voltage. After rising Vcc1, wait 15msec and rising LDOEN. When LDOEN is raised, Vcc1 must be operating voltage. tVcc1:MAX 5msec tVcc1:MAX 5msec Vcc1 EEPROM Power Supply Vcc2 tLDOEN : MIN 15msec LDO regulator Power Supply LDOEN tLDOEN : MIN 15msec Not Operating Operating Not Operating Operating Not Operating Fig.5 Using LDO Regulator Part, Regulation Timing www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 4/16 2010.09 - Rev.A BU9829GUL-W ●Block diagram CSB INSTRUCTION DECODE SCK CONTROL CLOCK GENERATION WRITE INHIBITION SI INSTRUCTION REGISTER HIGH VOLTAGE GENERATOR VOLTAGE DETECTION Technical Note ADDRESS REGISTER 11bit ADDRESS DECODER 11bit 16,384 bit EEPROM SO DATA REGISTER + 8bit R/W AMP LDOEN 8bit 2bit VOUT B.R AMP VOUT SETTING REGISTER RESISTOR Fig.6 Block diagram ●Characteristic data (The following characteristic data are typical values.) 5 5 1 4 Ta=-30℃ Ta=25℃ Ta=85℃ VIL[V] 4 Ta=-30℃ Ta=25℃ Ta=85℃ VOL[V] 0.8 0.6 0.4 Ta=-30℃ Ta=25℃ Ta=85℃ 3 VIH[V] SPEC 3 2 2 SPEC 1 1 SPEC 0.2 SPEC 0 0 1 2 Vcc[V] 3 4 0 0 1 2 Vcc[V] 3 4 0 0 1 IOL[mA] 2 3 Fig.7 　"H" input voltage　VIH (EEPROM) 3 2.5 2 VOH[V] 1.5 1 0.5 0 0 0.4 IOH[mA] 0.8 1.2 5 Fig.8 　"L" input voltage　VIL (EEPROM) 5 Fig.9　"L" output voltage VOL 4 SPEC ILI[μA] 3 2 ILO[μA] Ta=-30℃ Ta=25℃ Ta=85℃ 4 3 Ta=-30℃ Ta=25℃ Ta=85℃ 2 Ta=-30℃ Ta=25℃ Ta=85℃ SPEC 1 1 SPEC 0 0 1 2 Vcc[V] 3 4 0 0 1 2 VOUT[V] 3 4 Fig.10　"H" output voltage VOH 4 Fig.11　Input leak current ILI 2.5 12 Fig.12　Output leak current ILO 3 ICC1[mA]] fSCK=2MHz DATA=00h ICC3(READ)[mA] 2 fSCK=2MHz DATA=AAh 10 8 Ta=-30℃ Ta=25℃ Ta=85℃ 2 SPEC 1 Ta=-40℃ Ta=-30℃ Ta=25℃ Ta=85℃ 1 Ta=-30℃ Ta=25℃ Ta=85℃ ISB[μA] 1.5 6 4 0.5 SPEC 2 0 SPEC 0 0 1 2 Vcc[V] 3 4 0 0 1 2 Vcc[V] 3 4 0 1 2 Vcc[V] 3 4 Fig.13　Current consumption at WRITE operation ICC1 Fig.14　Consumption Current at READ operation ICC3 Fig.15　Standby operation ISB (EEPROM) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 5/16 2010.09 - Rev.A BU9829GUL-W ●Characteristic data 100 250 250 200 Technical Note SPEC Ta=-30℃ Ta=25℃ Ta=85℃ SPEC 200 tSCKWL [ns] SPEC Ta=-30℃ Ta=25℃ Ta=85℃ SPEC fSCK[MHz] SPEC SPEC tSCKWH [ns] 10 150 150 100 100 1 Ta=-30℃ Ta=25℃ Ta=85℃ 50 50 0.1 0 1 2 Vcc[V] 3 4 0 0 1 2 Vcc[V] 3 4 0 0 1 2 Vcc[V] 3 4 Fig.16　SCK frequency fSCK 250 200 Fig.17 SCK high time　tSCKWH 200 Fig.18 SCK low time　tSCKWL 200 SPEC Ta=-30℃ Ta=25℃ Ta=85℃ SPEC 160 SPEC Ta=-30℃ Ta=25℃ Ta=85℃ SPEC 160 SPEC 100 80 tCSH[ns] tCSS[ns] tCS[ns] 150 120 120 80 Ta=-30℃ Ta=25℃ Ta=85℃ SPEC 50 40 40 0 0 1 2 Vcc[V] 3 4 0 0 1 2 Vcc[V] 3 4 0 0 1 2 Vcc[V] 3 4 Fig.19 CSB high time　tCS 60 60 Fig.20　CSB setup time　tCSS 120 Fig.21　CSB hold time　tCSH SPEC 40 tDIS[ns] 40 tDIH[ns] SPEC Ta=-30℃ Ta=25℃ Ta=85℃ SPEC 100 80 tPD [ns] 60 40 20 SPEC SPEC Ta=-30℃ Ta=25℃ Ta=85℃ SPEC 20 20 Ta=-30℃ Ta=25℃ Ta=85℃ 0 0 1 2 Vcc[V] 3 4 0 0 1 2 Vcc[V] 3 4 0 0 1 2 Vcc[V] 3 4 Fig.22　SI setup time　tDIS 250 Fig.23　SI hold time　tDIH 8 8 Fig.24　Data output delay time　tPD 200 SPEC 6 tE/W[ms] ISB[us] tOZ [ns] 150 Ta=-30℃ Ta=25℃ Ta=85℃ SPEC SPEC 4 6 4 100 Ta=-30℃ Ta=25℃ Ta=85℃ SPEC 2 50 Ta=-30℃ Ta=25℃ Ta=85℃ 2 0 0 1 2 Vcc[V] 3 4 0 0 1 2 Vcc[V] 3 4 0 0 1 2 Vcc[V] 3 4 Fig.25　Output disable time tOZ 3 2.5 2 VIH[V] 1.5 1 0.5 0 0 1 2 Vcc[V] 3 4 3 Fig.26 Write cycle time tE/W 160 Fig.27 Standby operation ISB (LDO) Ta=-30℃ Ta=25℃ Ta=85℃ VIL[V] 2.5 2 Ta=-30℃ Ta=25℃ Ta=85℃ tVcc1[us] SPEC=5000ns 120 SPEC Ta=-30℃ Ta=25℃ Ta=85℃ 1.5 1 0.5 0 0 1 2 Vcc[V] 3 4 80 SPEC 40 0 0 1 2 Vcc[V] 3 4 Fig.28 "H" input voltage VIH (LDO) 3.2 3.1 3 250 Fig.29 "L" input voltage VIL (LDO) Fig.30 Vcc1 rise time tVcc1 SPEC Ta=-30℃ Ta=25℃ Ta=85℃ ICC[uA] SPEC 200 150 100 50 0 VOUT[V] (VSET=1,0) SPEC Ta=-30℃ Ta=25℃ Ta=85℃ 2.9 2.8 2.7 0 2 4 6 8 10 Iout[mA] 12 14 16 SPEC 0 1 2 Vcc[V] 3 4 Fig.31 Vout response (LDO) Fig.32 Current consumption ICC (LDO) www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 6/16 2010.09 - Rev.A BU9829GUL-W Technical Note ●Functional description ○Status Register The device has status register. Status register consists of 8bits and is shown following parameters. 2 bits (BP0 and BP1) are set by “Write Status Register” commands, which are non-volatile. Specification of endurance and data retention are as well as memory array. WEN bit is set by “Write Enable” and “Write Disable” commands. After power become on, the device is disable mode. R / B bit is a read-only and status bit. The device is clocked out value of the status register by “Read Status Register” command input. Bit7 0 Bit BP0/BP1 WEN Bit6 0 Bit5 0 Bit4 0 Bit3 BP1 BP1 0 0 1 1 Bit2 BP0 BP0 0 1 0 1 Bit1 WEN Bit0 R/B Definition Block write protection for memory array (EEPROM) Write enable/disable status bit WEN=0 : write disable WEN=1 : write enable READY/BUSY status bit R / B =0 : READY R / B =1 : BUSY Block Write Protection NONE 600h-7FFh 400h-7FFh 000h-7FFh R/B ●Instruction code Instruction WREN WRDI READ WRITE RDSR WRSR VSET_READ VSET_WRITE ●Timing chart 1. WRITE ENABLE CSB Operation Write enable Write disable Read data from memory array Write data to memory array Read status register Write status registeｒ Read VSET data Write VSET data Op.Code 0000 0000 0000 0000 0000 0000 0000 0000 0110 0100 0011 0010 0101 0001 0011 0010 Address A10 ～ A0 A10 ～ A0 800h 800h 2. WRITE DISABLE CSB SCK 0 1 2 3 4 5 6 7 SCK 0 1 2 3 4 5 6 7 SI 0 0 0 0 0 1 1 0 SI 0 0 0 0 0 1 0 0 SO Hi-Z SO Hi-Z Fig.33 WRITE ENABLE CYCLE TIMING Fig.34 WRITE DISABLE CYCLE TIMING ○The device has both of the enable and disable mode. After “Write Enable” is executed, the device becomes in the enable mode. After “Write Disable” is executed, the device becomes in the disable mode. After CSB goes low, each of Op.code is recognized at the rising edge of 7th clock. Each of instructions is effective inputting seven or more SCK clocks. This “Write Enable” instruction must be proceeded before the any write commands. The device ignores inputting the any write commands in the disable mode. Once the any write commands is executed in the enable mode, the device becomes the disable mode. After the power become on, the device is in the disable mode. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 7/16 2010.09 - Rev.A BU9829GUL-W Technical Note 3. READ The data stored in the memory are clocked out after “Read” instruction is received. After CSB goes low, the address need to be sent following by Op.code of “Read”. The data at the address specified are clocked out from D7 to D0, which is start at the falling edge of 23th clock. This device has the auto-increment feature that provides the whole data of the memory array with one read command, outputs the next address data following the addressed 8bits of data by keeping SCK clocking. When the highest address is reached, the address counter rolls over to the lowest address allowing the continuous read cycle. CSB ～～ ～～ ～～ ～～ 14 23 24 ～～ SCK 0 1 2 3 4 5 6 7 8 ～～ 30 ～～ ～～ 0 A10 ～～ ～～ A1 A0 ～～ ～～ SI 0 0 0 0 0 0 1 1 * *～～ ～～ SO Hi-Z D7 D6 ～～ D2 D1 D0 Fig.35 READ CYCLE TIMING *=Don't care 4. WRITE This “Write” command writes 8bits of data into the specified address. After CSB goes low, the address need to be sent following by Op.code of “Write”. Between the rising edge of the 29th clock and it of the 30th clock, the rising edge of CSB initiates high voltage cycle, which writes the data into non-volatile memory array, but the command is cancelled if CSB is high except that period. It takes maximum 5ms in high voltage cycle (tE/W). The device does not receive any command except for “Read Status Register” command during this high voltage cycle. This device is capable of writing the data of maximum 32byte into memory array at the same time, which keep inputting two or more byte data with CSB “L” after 8bits of data input. For this Page Write commands, the eight higher order bits of address are set, the six low order address bits are internally incremented by 5bits of data input. If more than 16 words, are transmitted the address counter “roll over”, and the previous transmitted data is overwritten. CSB S CK SI SO 0 1 2 3 4 5 6 7 8 ～～ ～～ 14 ～～ ～～ ～～ ～～ ～～ 23 24 30 31 ～～ 0 0 0 0 0 0 1 0 * ～～ A1 A0 D7 D6 ～～ ～～ 0 A1 0 ～～ ～～ ～～ ～～ D2 D1 D0 Hi-Z *=Don't care Fig. 36 WRITE CYCLE TIMING 5. RDSR (READ STATUS REGISTER) The data stored in the status register is clocked out after “Read Status Register” instruction is received. After CSB goes low, Op.colde of “Read Status Register” need to sent. The data stored in the status register is clocked out of the device on the falling edge of 7th clock. Bit7, Bit6, Bit5 and Bit4 in the status register are read as 0. This device has the auto-increment feature as well as “Read” that output the 8bits of the same data following it to keep SCK clocking. It is possible to see ready and busy state by executing this command during tE/W. If more than 16 words, are transmitted the address counter “roll over” and the previous transmitted data is overwritten. CSB SCK 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 SI 0 0 0 0 0 1 0 1 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 SO Hi-Z 0 0 0 0 BP1 BP0 WEN R/B Fig.37 READ STATUS REGISTER CYCLE TIMING www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 8/16 2010.09 - Rev.A BU9829GUL-W Technical Note 6. WRSR (WRITE STATUS RESISTER) This “Write Status Register” command writes the data, two (BP1, BP0) of the eight bits, into the status register. Write protection is set by BP1 and BP0 bits. After CSB goes low, Op.code of “Read Status Register” need to sent. Between the rising edge of the 15th clock and it or the 16th clock, the rising edge of CSB initiates high voltage cycle, which writes the data into non-volatile memory array, but the command is cancelled if CSB is high except that period. It takes maximum 5ms in high voltage cycle (tE/W) as well as “Write”.Block write protection is determined by BP1 and BP0 bits, which is selected from quarter, half and the entire memory array. (See Table2 BLOCK WRITE PROTECTION>) CSB SCK 0 1 2 3 4 5 6 7 8 9 10 Bit5 * 11 12 13 Bit2 BP0 14 15 Bit7 Bit6 SI SO Hi-Z 0 0 0 0 0 1 0 1 * * Bit4 Bit3 * BP1 Bit1 Bit0 * * * Don’t care Fig. 38 WRITE STATUS REGISTER WRITE CYCLE TIMING 7. VSET READ The VSET data stored in the memory are clocked out after “VSET Read” instruction set address 800h is received. After CSB goes low, the address (800h) need to be sent following by Op.code of “Read”. 0 are clocked out from D7 to D2 and the VSET data are clocked out from D1 to D0, which is start at the falling edge of 23th clock. CSB SCK 0 1 2 3 4 5 6 7 8 12 13 23 24 30 SI SO 0 Hi-Z 0 0 0 0 0 1 1 * * 1 0 0 0 0 0 0 0 VSET 1 VSET 0 Fig.39 VSET READ CYCLE TIMIING * Don’t care 8. VSET WRITE This “Write” command set address 800h writes VSET data into VSET1 and VSET0 memory array. After CSB goes low, the address (800h) and VSET data need to be sent following by Op.code of “VSET Write”. Between the rising edge of the 29th clock and it of the 30th clock, the rising edge of CSB initates high voltage cycle, which writes the data into non-volatile memory array, but the command is cancelled if CSB is high except that period. It takes maximum 5ms in high voltage cycle (tE/W). The device does not receive any command except for “Read Status Register” command during this high voltage cycle. CSB 0 1 SCK 2 3 4 5 6 7 8 12 13 23 24 30 31 SI SO 0 Hi-Z 0 0 0 0 0 1 0 * * 1 0 0 0 0 * * * * VSET 1 VSET 0 * Don’t care Fig. 40 VSET WRITE CYCLE TIMING www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 9/16 2010.09 - Rev.A BU9829GUL-W ●EEPROM soft ware ○READ, VSET_READ, RDSR Command cancel Cancel of these commands is possible by changing CSB pin to “HIGH” in all sections. OPECODE 8bit ADDRESS 8bit Cancel is possible DATA 8bit OPECODE DATA Technical Note 8bit 8bit Cancel is possible Fig.41 READ, VSET_READ Cancel Timing Fig.42 RDSR Cancel Timing ○WRITE, PAGE_WRITE, VSET_WRITE、WRSR Command cancel Cancel of these write command is possible by changing CSB pin to “HIGH” in opecode, address and data input sections (section a~b), but it is impossible after data input section (section c~d), if Vcc1 is OFF during tE/W, please write again because write data is not guaranteed in specified address, if SCK and CSB rise at the same time in section C, command is instability. It is recommend to rise CSB in “SCK=L” section. OPECODE 8bit a ADDRESS 8bit DATA(n) 8bit b c tE/W SCK D7 D6 D5 D4 b D3 D2 D1 D0 c d SI AN ENLARGEMENT Fig.43 WRITE, PAGE_WRITE, VSET_WRITE READ VSET_READ Cancel Timing OPECODE 8bit a DATA(n) 8bit b c tE/W 8bit d AN ENLARGEMENT SCK SI 14 D1 b 15 D0 c 16 17 d Fig.44 WRSR Cancel Timing ○WREN, WRDI command cancel Cancel of these commands is possible by changing CSB pin to “HIGH” of opecode to rising 8 clk, but it is impossible after rising 8 clk. In the case, please send WREN or WRDI cancel timing command again. OPECODE 8bit a AN ENLARGEMENT b 7 8 9 a b Fig.45 WREN, WRDI Cancel Timing ●Data polling If RDSR command is carried out daring tE/W, according to out put data ( R / B bit), to monitor READY/BUSY state is possible. Because of this, it is possible to send next command earlier than regular programming time (tE/W MAX=5ms). If R / B bit is “1”, EEPROM’s state is “BUSY”. If this becomes “0”, it is possible to send next command to change EEPROM to “READY” state. Status register data read by this command in tE/W is not data written by WRSR command but old data before. Status register data in each section is shown below. During WRSR Command（tE/W） BUSY READY CSB SCK SI SO READ STATUS REGISTOR WRITE STATUS REGISTOR READ STATUS REGISTOR READ STATUS REGISTOR READ STATUS REGISTOR a=0Ch b=(00h) c=0Fh d=0Ch e=00h Fig.46 Status register data in each section www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 10/16 2010.09 - Rev.A BU9829GUL-W ●EEPROM part Technical Note 1. Hardware Connection of EEPROM EEPROM may have malfunction owing to noise signal for input pin, and movement in the low voltage region at power ON/OFF. These malfunctions may occur, especially at min voltage limit of EEPROM or below. To avoid this, please note about hardware connection showed as follows. 1.1 Input Terminals Input equivalent circuits of CSB, SCK and SI are showed Fig.47, 48. Input terminal is connected between CMOS schmitt trigger input circuit and input protection circuit. These pin are not pull up or pull down, therefore please don’t input Hi-Z in use. And please make CSB “HIGH” in the low voltage region at power ON/OFF. If CSB is "LOW" at power ON/OFF, malfunction may occur. To make other input terminals pull up or pull down is recommendable. SCK, SI C SB ＳＯ Fig.47 CSB terminals equivalent circuit Fig.48 SCK,SI terminals equivalent circuit Fig.49 SO terminals equivalent circuit 1.2 Output Terminals Output equivalent circuit of so is showed Fig.49. This output terminal is 3 states buffer. The data is output from so at output timing by READ command, so is Hi-z except this timing. If EEPROM occur by Hi-z input of the microcontroller port connected with so, please make so pull up or pull down. affected the microcontroller movement to make so open, it is no problem. Load capacity of so disturb movement of EEPROM. If this load capacity is 100pF or below, BU9829GUL-W can move (Vcc1=1.6V~1.8V) or 5MHz (Vcc1=1.8V~3.6V) 1.3 Input pin pull up, pull down resistance The design method of pull up/pull down resistance for input and output are as follows. 1.3.1 Pull up resistance Rpu of input terminals malfunction If it doesn’t high speed in 2.5MHz Rpu Microcontroller I VOLM OLM “L” output Rpu EEPROM VILE “L” input ≧ VCC－VOLM IOLM VILE …① …② VOLM ≦ Example) When Vcc=5V, VILE=1.5V, VOLM=0.4V, IOLM=2mA, from the equation①, 5－0.4 -3 2×10 2.3[kΩ] Fig.50 Input terminal pull up resistance Rpu ∴Rpu ≧ ≧ ・VILE : EEPROM VIL specifications ・VOLM : Microcontroller VOL specifications ・IOLM : Microcontroller IOL specifications With the value of Rpu to satisfy the above equation, VOLM becomes 0.4V or below, and with VILE(=1.5V), the equation ② is also satisfied. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 11/16 2010.09 - Rev.A BU9829GUL-W 1.3.2 Pull down resistance Rpd of input terminals Rpd Microcontroller VOHM “H” output IOHM Rpd EEPROM VIHE “H” input VOHM ≦ ≧ VOHM IOHM VIHE …① …② Technical Note Example) When Vcc=5V, VIHE=3.5V, VOHM=2.4V, IOHM=2mA, from the equation①, 2.4 2×10-3 1.2 [kΩ] Fig.51 Input terminals Pull down resistance Rpd ∴Rpd ≧ ≧ ・VIHE : EEPROM VIH specifications ・VOHM : Microcontroller VOH specifications ・IOHM : Microcontroller IOH specifications 1.3.3 Pull up resistance Rpu of SO pin With the value of Rpd to satisfy the above equation, VOHM becomes 2.4V or higher, and with VIHE(=3.5V), the equation②is also satisfied. Rpu Microcontroller VILM “L” input “L” output Fig.52 SO Pull up resistance Rpu ∴Rpu ・VOLE : EEPROM VOL specifications ・IOLE : Microcontroller IOL specifications ・VILM : Microcontroller VIL specifications 1.3.4 Pull up resistance Rpu of SO pin EEPROM Microcontroller VIHM “H” input Rpd VOHE Rpd VOHE Rpu IOLE EEPROM VOLE VOLE ≧ ≦ VCC-VOLE IOLE VILM …① …② Example) When Vcc=5V, VOLE=0.4V, VILM=1.5V, IOLE=2.1mA, from the equation①, 5-0.4 -3 2.1×10 2.2 [kΩ] ≧ ≧ With the value of Rpd to satisfy the above equation, VOLE becomes 0.4V or higher, and with VILM(=1.5V), the equation②is also satisfied. ≧ ≧ VOHE IOHE VIHM …① …② IOHE “H” output Example) When Vcc=5V, VOHE=Vcc-0.5V, VIHM=Vccx0.7V, IOHE=0.4mA, from the equation①, 5-0.5 -3 0.4×10 11.3 [kΩ] Rpd Fig.53 SO Pull down resistance ・VOHE : EEPROM VOH specifications ・IOHE : EEPROM IOH specifications ・VIHM : Microcontroller VIH specifications ∴Rpd ≧ ≧ With the value of Rpu to satisfy the above equation, VOHE becomes 4.5V or higher, and with VIHM(=3.5V), the equation ② is also satisfied. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 12/16 2010.09 - Rev.A BU9829GUL-W Technical Note ●LDO regulator part LDO regulator part of BU9829GUL-W is CMOSLDO of low power consumption. The data are stored into EEPROM and output voltage change among 2.7~3.0V. 1step is 0.1V. LDO regulator part had LDOEN pin and VOUT pin. To make this LDOEN pin LOW is standby mode of low power consumption. ○LDOEN Input Terminals Input equivalent circuit of LDOEN is showed Fig.54. Input terminal is connected between input circuits made from NMOS and pull up and input protection circuit. This pin is not pull up or pull down, therefore please don’t input Hi-z. If LDOEN is LOW, all circuit don’t move and LDO part is standby mode of low power consumption. LDOEN VREF + VOUT Fig.54 VOUT output terminals Fig.55 VOUT output terminals ○VOUT Output Terminals Output equivalent circuit of VOUT is showed Fig.55. If LDOEN is HIGH, LDO regulator output regulate voltage from VOUT pin. If LDOEN is LOW, VOUT pin is GND by VOUT-GND resistance. Output overshoots change by output capacity, in actual use, please evaluate and decide output capacity. VOUT 172mV VCC=3.0V VOUT 88mV 13.6us VCC 20us VOUT LDO_EN 0.1uF current probe 700Ω Rohm K2095N VCC=3.0V VCC Oscilloscope Power source Tektronix TDS3034B SHOWA 317B Oscilloscope Power source Tektronix TDS3034B SHOWA 317B VOUT LDO_EN 0.1uF current probe 700Ω Rohm K2095N Input pulse Input pulse rising 1us IOUT=0→4mA measurement circuit rising 1us IOUT=0→4mA measurement circuit BU9829GUL-W Evaluation result (IOUT=0mA→4mA,COUT=1.0uF) Fig.56 CL=0µF Transitional response BU9829GUL-W Evaluation result (IOUT=0mA→4mA,COUT=0.1uF) Fig.57 CL=0.1µF Transitional response VOUT 40mV 12us Oscilloscope Power source Tektronix TDS3034B SHOWA 317B VCC=3.0V VCC VOUT LDO_EN 0.1uF current probe 700Ω Rohm K2095N VOUT 40mV 120us Oscilloscope Power source Tektronix TDS3034B SHOWA 317B VCC=3.0V VCC VOUT LDO_EN 0.1uF current probe 700Ω Rohm K2095N Input pulse Input pulse rising1us IOUT=0→4mA measurement circuit rising 1us IOUT=0→4mA measurement circuit BU9829GUL-W Evaluation result (IOUT=0mA→4mA,COUT=1.0uF) Fig.58 CL=1.0µF Transitional response BU9829GUL-W Evaluation result (IOUT=0mA→4mA,COUT=1.0uF) Fig.59 CL=10µF Transitional response www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 13/16 2010.09 - Rev.A BU9829GUL-W Technical Note ○Package power dissipation Package power dissipation of BU9829GUL-W is 220mW. It is the value at environmental temperature is 25℃. In the case of use at 25℃ or higher, degradation is done at 2.2W/℃. If output current is very large, please take care of package power dissipation. 300 Pd [mW] 許容損失(Pd) [mW] 200 100 0 -50 -25 0 25 50 75 Ta [℃] 周囲温度(Ta)　[℃] 100 125 150 Fig.60 Package power dissipation ○Large Current Protection Circuit VOUT terminal has large current protection circuit. This circuit protects IC from large current. However, this protection circuit effective unexpected accident. Please avoid continual use of protection circuit. 3 2.5 VOUT output voltage[V] 2 1.5 1 0.5 0 0 5 10 15 20 VOU T load current [m A] Fig.61 Large Current Protection Circuit ●POR circuit This IC has a POR (Power On Reset) circuit as mistake write countermeasure. After POR action, it gets in write disable. The POR circuit is valid only when power is ON, and does not work when power is OFF. When power is ON, if the recommended conditions of the following tR, tOFF, and Vbot are not satisfied, it may become write enable status owing to noise the likes. tR Vｃｃ1 Recommended conditions of tR, tOFF, Vbot tR tOFF Vbot 10ms or below 10ms or higher 10ms or higher 0.3V or below 0.2V or below 100ms or below Vbot tOFF 0 Fig.62 Rise waveform www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 14/16 2010.09 - Rev.A BU9829GUL-W ●LVCC circuit LVCC (Vcc-Lockout) circuit prevents data rewrite action at low power, and prevents wrong write. At LVCC voltage (Typ. =1.9V) or below, it prevent data rewrite. Technical Note ●Noise countermeasures ○Vcc noise (bypass capacitor) When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is recommended to attach a bypass capacitor (0.1µF) between IC Vcc and GND. At that moment, attach it as close to IC as possible. And, it is also recommended to attach a bypass capacitor between board Vcc and GND. IC Capacitor 0.01～0.1µF PRINT BASE GND Fig.63 ●Recommendable application circuit 1. It is recommended to attach bypass condensers on power line. 2. Be sure to make CSB pull up. At power on, mat cause the abnormal function. 3. Please make LDOEN pull down. 4. If EEPROM malfunction occur by Hi-Z input of the microcontroller part connected with SO, please make SO pull up or pull down. 5. Please attach capacity at VOUT terminal. Outputs overshoot change by output capacity. In actual use, please evaluate and decide output capacity. Vcc Capacitor 10～100µF Vcc noise countermeasures example Vcc2(3.3V) Vcc1(1.8V) RPU BU9829GUL-W CSB SCK SI LDOEN Vcc1 SO Vcc2 VOUT GND RPU (0.1µF) (0.1µF) CL C C RPD RPD Fig.64 Recommendable Application circuit ●Notes for use ・Absolute maximum ratings We pay attention to quality control of this IC, but if there is special mode exceeded absolute maximum rating, please take a physical safety measures. Because we can’t specify short mode and open made, etc. ・Heat design In consideration of permissible dissipation in actual use condition, carry out heat design with sufficient margin. ・Absolute maximum ratings If the absolute maximum ratings such as impressed voltage and operating temperature range and so forth are exceeded, LSI may be destructed. Do not impress voltage and temperature exceeding the absolute maximum ratings. In the case of fear exceeding the absolute maximum ratings, take physical safety countermeasures such as fuses, and see to it that conditions exceeding the absolute maximum ratings should not be impressed to LSI. ・Common impedance Please pay attention to VCC and GND wiring. For example, lower common impedance and to make wiring think, etc. ・GND electric potential Set the voltage of GND terminal lowest at any action condition. And, please make pin except GND voltage of GND or over. ・Test of set base If low impedance pin connect with capacity at test of set base, please discharge each test progress to stress IC. Please embroider earth for static electricity neasures at structure progress, pay attention to carry and conservation. When set base connect with test base at test progress, please connect and remove from power OFF. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 15/16 2010.09 - Rev.A BU9829GUL-W ●Ordering part number Technical Note B Part No. U 9 Part No. 8 2 9 G U L -W W-CELL E 2 Package GUL : VCSP50L1 Packaging and forming specification E2: Embossed tape and reel VCSP50L1(BU9829GUL-W) 1PIN MARK 1.65±0.05 Tape Quantity 0.55MAX 0.1±0.05 Embossed carrier tape 3000pcs E2 The direction is the 1pin of product is at the upper left when you hold 1.74±0.05 Direction of feed S ( reel on the left hand and you pull out the tape on the right hand ) 9-φ0.25±0.05 0.05 A B (φ0.15)INDEX POST C B A 1 2 A B P=0.5×2 0.325±0.05 0.08 S 3 0.37±0.05 P=0.5×2 1pin (Unit : mm) Reel Direction of feed ∗ Order quantity needs to be multiple of the minimum quantity. www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. 16/16 2010.09 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. R1010A