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BU9888FV-W

BU9888FV-W

  • 厂商:

    ROHM(罗姆)

  • 封装:

  • 描述:

    BU9888FV-W - High Reliability Serial EEPROMs - Rohm

  • 数据手册
  • 价格&库存
BU9888FV-W 数据手册
High Reliability Serial EEPROMs Microwire BUS BR93□□□family BU9888FV-W ●Description BU9888FV-W is a serial EEPROM of serial 3-line interface method. ●Features 1) 256word×16bits architecture 4k bit serial EEPROM 2) Operating voltage range(3.0~3.6V) 3) Address auto increment function at read action 4) Write mistake prevention function Write prohibition at power on Write prohibition by command code Write mistake prevention function at low voltage 5) Program cycle auto delete and auto end function 6) Program condition display READY / BUSY 7) Low current consumption At write action(3.6V): Icc1 = 3.5mA(Max.) At read action(3.6V): Icc2 = 2.0mA(Max.) At standby action (3.6V) : ISB = 2.0μA(Max.) 8) Compact package SSOP-B8pin 9) Data retention for 40 years 10) Data rewrite up to 100,000 times 11) Data at shipment all addresses FFFFh ●Absolute maximum rating (Ta=25℃) Parameter Supply Voltage Power Dissipation Storage Temperature Operating Temperature Terminal Voltage Symbol Vcc Pd Tstg Topr - Ratings -0.3~+6.5 300 *1 Unit V mW ℃ ℃ *2 V No.11001EAT20 -65 ~+125 -20 ~+85 -0.3~Vcc+0.3 *1 Degradation is done at 3.0mW/℃ for operation above 25℃ *2 The Max value of Terminal Voltage is not over 6.5V ●EEPROM recommended operating condition Parameter Supply Voltage Input Voltage Symbol Vcc VIN Ratings 3.0~3.6 0 ~ Vcc Unit V ●Memory cell characteristics(Ta=25℃, Vcc = 3.0~3.6V) Parameter Erase/Write Cycle Data Retention *1 Not 100% TESTED Limits Min. 100,000 40 Typ. - - Max. - - Unit Cycles Years *1 *1 www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 1/16 2011.01 - Rev.A BU9888FV-W ●DC Operating Characteristics(Unless otherwise specified Ta=-20~+85℃, Vcc=3.0~3.6V) Limits Parameter Symbol Unit Min. Typ. Max. "L" Input Voltage "H" Input Voltage "L" Output Voltage "H" Output Voltage Input Leakage Current Output Leakage Current Operating Current Standby Current VIL VIH VOL VOH ILI ILO ICC1 ICC2 ISB -0.3 0.8×Vcc 0 2.4 -1 -1 - - - - - - - - - - - - 0.2×Vcc Vcc+0.3 0.4 Vcc 1 1 3.5 2.0 2.0 V V V V μA μA mA mA μA IOL=2.1mA IOH=-0.4mA VIN=0~Vcc Technical Note Test Condition VOUT=0~Vcc, CS=0V fSK=2MHz, tE/W=2ms(WRITE), TEST1=Vcc fSK=2MHz, (READ), TEST1=Vcc CS=0V, TEST1=Vcc, DO=OPEN ○This product is not designed for protection against radioactive rays. ●EEPROM AC Operating Characteristics (Ta=-20~+85℃, Vcc = 3.0~3.6V) Limits Paramete Symbol Min. Typ. Max. SK Clock Frequency SK High Time SK Low Time CS Low Time CS Setup Time DI Setup Time CS Hold Time DI Hold Time Data "1" Output Delay Time Data "0" Output Delay Time CS to Status Valid CS to Output High-Z Write Cycle time ●Synchronous data input/output timing CS tCSS tSKH tSKL Unit MHz ns ns ns ns ns ns ns ns ns ns ns ms fSK tSKH tSKL tCS tCSS tDIS tCSH tDIH tPD1 tPD0 tSV tDF tE/W - 230 230 200 200 100 0 100 - - - - - - - - - - - - - - - - - - 2 - - - - - - - 200 200 150 150 2 tCSH SK tDIS tDIH DI tPD0 tPD1 DO(READ) tDF DO(WRITE) STATUS VALID Fig.1 Sync data input / output timing ○Data is taken by DI in sync with the rise of SK. ○At read action, data is output from DO in sync with the rise of SK. ○The status signal at write (READY / BUSY ) is output after tCS from the fall of CS after write command input, at the area DO where CS is “H”, and valid until the next command start bit is input. And, while CS is “L”, DO becomes High-Z. ○After completion of each mode execution, set CS “L” once for internal circuit reset, and execute the following action mode. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 2/16 2011.01 - Rev.A BU9888FV-W ●Characteristic data (The following characteristic data are Typ. Values.) 6 H INPU T V O LT A G E : V IH (V ) L IN PU T V O LT A G E : V IL (V ) 6 5 4 3 2 1 0 Technical Note 1 L O U TPU T V O LTAG E : V O L (V ) 0.8 0.6 0.4 0.2 0 0 1 2 3 4 L OUTPUT CURRENT : IOL(mA) 5 5 4 3 Ta=-40℃ Ta=25℃ Ta=85℃ SPEC Ta=-40℃ Ta=25℃ Ta=85℃ Ta=-40℃ Ta=25℃ Ta=85℃ SPEC 2 1 0 0 1 2 3 4 5 6 SUPPLY VOLTAGE : Vcc(V) SPEC 0 1 2 3 4 5 6 SUPPLY VOLTAGE : Vcc(V) Fig.2  H' voltage VIH(CS,SK,DI) Fig.2 'H' 'inputinput tvoltage VIH(CS,SK,DI) 5 H O UT PUT V O LT A G E : V O H (V ) 4 3 1.2 Fig.3  'L' voltage VIL (CS,SK,DI) Fig.3'L' inputinput voltage VIL (CS,SK,DI) INPU T LEA K C UR R ENT : I LI(uA ) F 'L' output output voltage Fig.4 ig.4 'L' voltage VOL-IOL(Vcc=3.0V) VOL-IOL(Vcc=3.0V) SPEC Ta=-40℃ Ta=25℃ Ta=85℃ O U TPU T LEA K C U R R EN T : ILO (uA ) 1.2 1 0.8 0.6 0.4 0.2 0 0 1 2 3 4 5 SUPPLY VOLTAGE : Vcc(V) 6 Ta=-40℃ Ta=25℃ Ta=85℃ SPEC SPEC 1 0.8 0.6 0.4 0.2 0 2 1 0 0 0.4 0.8 1.2 H OUTPUT CURRENT : IOH(mA) 1.6 Ta=-40℃ Ta=25℃ Ta=85℃ 0 1 2 3 4 5 SUPPLY VOLTAGE : Vcc(V) 6 F 'H' output voltage VOH OH(Vcc=3.0V) Fig.5 ig.5 'H' output-Ivoltage VOH-IOH(Vcc=3.0V) Fig.6  Input leak leak current Fig.6 Input current ILI(CS,SK,DI) ILI(CS,SK,DI) Fig.7  Output leak leak current Fig.7 Output current ILO(DO) ILO(DO) 5 C UR R ENT C O NS UM PT IO N A T W R ITIN G : Icc1(m A ) 4 3 2 1 0 0 1 2 3 4 5 6 SUPPLY VOLTAGE : Vcc(V) 3 C U R R EN T C O N S U M PTIO N A T R EA D IN G : Icc2(m A ) 2.5 S TA N D BY C U R R EN T : IS B (uA) SPEC 2.5 SPEC 2 1.5 1 0.5 0 SPEC 2 1.5 1 0.5 0 0 1 2 3 4 5 SUPPLY VOLTAGE : Vcc(V) 6 Ta=-40℃ Ta=25℃ Ta=85℃ Ta=-40℃ Ta=25℃ Ta=85℃ Ta=-40℃ Ta=25℃ Ta=85℃ 0 1 2 3 4 5 SUPPLY VOLTAGE : Vcc(V) 6 Fig.8Fig.8 Currentconsumption at WRITE Current consumption at WRITE action action ICC1(fSK=2MHz) ICC1(fSK=2MHz) 10000 S K FR EQ U EN C Y : fS K (M H z) 1000 100 10 1 0.1 0 1 2 3 4 5 SUPPLY VOLTAGE : Vcc(V) SK Fig.9 Consumption current at READ Fig.9 Consumption current at READ action ICCI2(fSK=2MHz) action CC2(fSK=2MHz) 1 H S K TIM E : tS K H (μ s) Fig.10 Consumption current Fig.10 Consumption current at standby action ISB at standby action ISB 1 L S K TIM E : tS K L (μ s) Ta=-40℃ Ta=25℃ Ta=85℃ 0.8 0.6 0.4 Ta=-40℃ Ta=25℃ Ta=85℃ 0.8 0.6 0.4 Ta=-40℃ Ta=25℃ Ta=85℃ SPEC 0.2 0 SPEC 0.2 0 SPEC 6 0 1 2 3 4 5 SUPPLY VOLTAGE : Vcc(V) SKH 6 0 1 2 3 4 5 SUPPLY VOLTAGE : Vcc(V) SKL 6 Fig.11 SK K frequency f fSK Fig.11  S frequency Fig.12Fig.12high time tSKH SK SK high time t Fig.13 Fig.13low ltime ttSKL SK SK ow time  www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 3/16 2011.01 - Rev.A BU9888FV-W ●Characteristic data (The following characteristic data are Typ. Values.) 1.2 C S S E T U P T IM E : tC SS (ns) 1 L C S T IM E : tC S (μ s) 0.8 0.6 0.4 0.2 0 0 1 2 3 4 5 6 SUPPLY VOLTAGE : Vcc(V) 300 200 150 Technical Note SPEC D I H O L D T IM E : t D IH (ns) SPEC 100 0 -100 -200 0 1 2 3 4 5 SUPPLY VOLTAGE : Vcc(V) 6 100 Ta=-40℃ Ta=25℃ Ta=85℃ 50 Ta=-40℃ Ta=25℃ Ta=85℃ SPEC Ta=-40℃ Ta=25℃ Ta=85℃ 0 -50 0 1 2 3 4 SUPPLY VOLTAGE : Vcc(V) 5 6 Fig.14 CS Low time tCS Fig.14 CS loe time tCS 150 D I S E T U P T IM E : t D IS (ns) D A T A '0' O U T P U T D E L A Y T IM E : tP D 0 (μ s) Fig.15 C CS setup time tCSS tCSS Fig.15S Setup time D A T A '1' O U T P U T D E L A Y T IM E : tP D 1 (μ s) 1 0.8 0.6 0.4 Fig.16 Fig.16 DI hold timetDIHtDIH DI Hold time  1 0.8 0.6 0.4 SPEC 100 50 Ta=-40℃ Ta=25℃ Ta=85℃ Ta=-40℃ Ta=25℃ Ta=85℃ Ta=-40℃ Ta=25℃ Ta=85℃ 0 SPEC 0.2 0 SPEC 0.2 0 0 1 2 3 4 5 SUPPLY VOLTAGE : Vcc(V) 6 -50 0 1 2 3 4 5 SUPPLY VOLTAGE : Vcc(V) 6 0 1 2 3 4 5 SUPPLY VOLTAGE : Vcc(V) 6 Fig.17 DI Setup time tDIS Fig.17 DI setup time tDIS 1 0.8 0.6 0.4 Fig.18 Fig.18 Dataoutput delay time tPD0 Data '0' '0' output delay time tPD0 250 200 150 Fig.19 Data '1' output delay timePD1 tPD1 Fig.19 Data '1' output delay time t 5 W R IT E C Y C L E T IM E : t E / W (m s) T IM E B E T W E E N C S A N D O U T P U T : tS V (μ s) Ta=-40℃ Ta=25℃ Ta=85℃ T IM E B E T W E E N C S A N D O U T P U T H IG H - Z : t D F (n s) Ta=-40℃ Ta=25℃ Ta=85℃ SPEC 4 3 Ta=-40℃ Ta=25℃ Ta=85℃ SPEC 100 50 0 2 1 0 SPEC 0.2 0 0 1 2 3 4 5 SUPPLY VOLTAGE : Vcc(V) 6 0 1 2 3 4 5 6 0 1 SUPPLY VOLTAGE : Vcc(V) 2 3 4 5 SUPPLY VOLTAGE : Vcc(V) E/W 6 Fig.20 from C to output establishment Fig.20 Time TimeSfrom CS to output tSV establishment tSV Fig.21 Time from CS to High-Z tDF Fig.21 Time from CS to High-Z tDF Fig.22 Fig.22rite cycle time t tE/W W  Write cycle time www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 4/16 2011.01 - Rev.A BU9888FV-W ●Pin assignment Vcc TEST2 TEST1 GND Technical Note BU9888FV-W: SSOP-B8 CS SK DI DO Fig.23 ●Pin function Pin name CS SK DI DO TEST1 TEST2 Vcc GND ●Block diagram I/O Input Input Input Output Input - Pin assignment diagram Function Chip select input Serial clock input Serial data input Serial data output Test pin. Test pin. Please connect to power. Please open at using. Power source All input / output reference voltage, 0V CS Command decode Control Clock generation Power source voltage detection Write prohibition Address buffer Address decoder SK High voltage occurrence DI Command register 8bit 8bit 4,096bit EEPROM DO Dummy bit Data register 16bit R/W amplifier 16bit Fig.24 Block diagram ●Command mode Command Read (READ) Write enable (WEN) Write (WRITE) Write disable (WDS) (*2) (*1) Start bit 1 1 1 1 Ope code 10 00 01 00 1 0 1 0 Address ****** ****** Data A7, A6, A5, A4, A3, A2,A1, A0 D15~D0(READ DATA) A7, A6, A5, A4, A3, A2, A1, A0 D15~D0(WRITE DATA) ・Input the address and the data in MSB first manners. ・As for *, input either VIH or VIL. *Start bit Acceptance of all the commands of this IC starts at recognition of the start bit. The start bit means the first “1” input after the rise of CS. *1 As for read, by continuous SK clock input after setting the read command, data output of the set address starts, and address data in significant order are sequentially output continuously. (Auto increment function) *2 When the read and the write all commands are executed, data written in the selected memory cell is automatically deleted, and input data is written. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 5/16 2011.01 - Rev.A BU9888FV-W ●Timing chart 1. Read cycle (READ) ~~ ~~ ~~ Technical Note CS (※1) ~~ 2 4 12 SK DI DO High-Z 1 1 ~~ 27 28 ~~ ~~ 1 0 A7 A6 ~~ ~~ A1 A0 ~~ ~~ 0 D15 D14 ~~ D1 D0 (※2) D15 D14 ~~ ~~ Fig.25 Read cycle (※2)Next address data(Auto increment function) (※1) Start bit When data “1” is input for the first time after the rise of CS, this is recognized as a start bit. And when “1” is input after plural “0” are input, it is recognized as a start bit, and the following operation is started. This is common to all the commands to described hereafter. ○When the read command is recognized, input address data (16bit) is output to serial. And at that moment, at taking A0, in sync with the rise of SK, “0” (dummy bit) is output. And, the following data is output in sync with the rise of SK. This IC has an address auto increment function valid only at read command. This is the function where after the above read execution, by continuously inputting SK clock, the above address data is read sequentially. And, during the auto increment, keep CS at “H”. 2. Write cycle (WRITE) ~~ ~~ tCS ~~ STATUS CS ~~ ~~ 11 12 ~~ 27 SK DI DO High-Z 1 1 2 4 ~~ ~~ 0 1 A7 A6 ~~ A1 A0 D15 D14 ~~ ~~ ~~ ~~ D1 D0 ~~ tSV BUSY READY ~~ tE/W Fig.26 Write cycle ○In this command, input 16bit data (D15~D0) are written to designated addresses (A7~A0). The actual write starts by the fall of CS of D0 taken SK clock. When STATUS is not detected, (CS=”L” fixed) Max. 2ms in conformity with tE/W, and when STATUS is detected (CS=”H”), all commands are not accepted for areas where “L” ( BUSY ) is output from D0, therefore, do not input any command. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 6/16 2011.01 - Rev.A BU9888FV-W 3. Write enable (WEN) Technical Note CS SK DI DO High-Z 1 1 2 3 4 5 6 7 8 9 10 11 0 0 1 1 Fig.27 Write enable (WEN) cycle ○At power on, this IC is in write disable status by the internal RESET circuit. Before executing the write command, it is necessary to execute the write enable command. And, once this command is executed, it is valid unitl the write disable command is executed or the power is turned off. However, the read command is valid irrespective of write enable / diable command. Input to SK after 8 clocks of this command is available by either “H” or “L”, but be sure to input it. 4. Write disable (WDS) cycle CS SK DI DO High-Z 1 1 2 3 4 5 6 7 8 9 10 11 0 0 0 0 Fig.28 Write disable (WDS) cycle ○When the write enable command is executed after power on, write enable status gets in. When the write disable command is executed then, the IC gets in write disable status as same as at power on, and then the write command is canceled thereafter in software manner. However, the read command is executable. In write enable status, even when the write command is input by mistake, write is started. To prevent such a mistake, it is recommended to execute the write disable command after completion of write. Input to SK after 8 clocks of this command is available by either “H” or “L”, but be sure to input it. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 7/16 2011.01 - Rev.A BU9888FV-W ●Application 1) Method to cancel each command ○READ Start bit 1bit Ope code 2bit Address 8bit Data 16bit Technical Note Cancel is available in all areas in read mode. ・Method to cancel:cancel by CS=“L” Fig.29 READ cancel available timing ・27 Rise of clock SK DI 26 D1 27 D0 ○WRITE Enlarged figure Start bit 1bit Ope code 2bit a Address 8bit Data 16bit tE/W b a:From start bit to 27 clock rise Cancel by CS=“L” b:27 clock rise and after Cancellation is not available by any means. If Vcc is made OFF in this area, designated address data is not guaranteed, therefore write once again. And when SK clock is input continuously, cancellation is not available. Fig.30 Write cancel available timing 2) At standby ○Standby current When CS is “L”, SK input is “L”, DI input is “H”, and even with middle electric potential, current does not increase. ○Timing As shown in Fig.31, when SK at standby is “H”, if CS is started, DI status may be read at the rise edge. At standby and at power ON/OFF, when to start CS, set SK input or DI input to “L” status. (Refer to Fig.32) CS=SK=DI=”H” Wrong recognition as a start bit CS=SK=DI=”H” Wrong recognition as a start bit CS Start bit input CS Start bit input SK SK DI DI Fig.31 Wrong action timing Fig.32 Normal action timing www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 8/16 2011.01 - Rev.A BU9888FV-W 3) Equivalent circuit Output circuit Input circuit RESET int. Technical Note DO CS CSint. OEint. Fig.33 Output circuit (DO) Input circuit CS int. SK DI TEST1 Fig.34 Input circuit (CS) Input circuit VDD Fig.35 Input circuit (SK,DI) Fig.36 Input circuit (TEST1) 4) I/O peripheral circuit 4-1) Pull down CS. By making CS=“L” at power ON/OFF, mistake in operation and mistake write are prevented. ○Pull down resistance Rpd of CS pin To prevent mistake in operation and mistake write at power ON/OFF, CS pull down resistance is necessary. Select an appropriate value to this resistance value from microcontroller VOH, IOH, and VIL characteristics of this IC. Microcontroller VOHM EEPROM VIHE Rpd ≧ VOHM ≧ VOHM IOHM VIHE ・・・① ・・・② “H” output IOHM Rpd “L” input Example) When VCC =5V, VIHE=2V, VOHM=2.4V, IOHM=2mA, from the equation ①, Rpd ≧ ∴ Rpd ≧ 2.4 2×10 -3 Fig.37 CS pull down resistance 1.2 [kΩ] With the value of Rpd to satisfy the above equation, VOHM becomes 2.4V or higher, and VIHE (=2.0V), the equation ② is also satisfied. ・VIHE : EEPROM VIH specifications ・VOHM : Microcontroller VOH specifications ・IOHM : Microcontroller IOH specifications www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 9/16 2011.01 - Rev.A BU9888FV-W Technical Note 4-2) DO is available in both pull up and pull down. Do output become “High-Z” in other READY / BUSY output timing than after data output at read command and write command. When malfunction occurs at “High-Z” input of the microcontroller port connected to DO, it is necessary to pull down and pull up DO. When there is no influence upon the microcontroller actions, DO may be OPEN. If DO is OPEN, and at timing to output status READY, at timing of CS=“H”, SK=“H”, DI=“H”, EEPROM recognizes this as a start bit, resets READY output, and DO=”High-Z”, therefore, READY signal cannot be detected. To avoid such output, pull up DO pin for improvement. CS CS “H” SK Enlarged DI D0 SK DI High-Z DO BUSY READY DO BUSY High-Z CS=SK=DI=”H” When DO=OPEN CS=SK=DI=”H” When DO=pull up Improvement by DO pull up DO BUSY READY Fig.38 READY output timing at DO=OPEN ○Pull up resistance Rpu and pull down resistance Rpd of DO pin As for pull up and pull down resistance value, select an appropriate value to this resistance value from microcontroller VIH, VIL, and VOH, IOH, VOL, IOL characteristics of this IC. Rpu ≧ Microcontroller VILM Rpu IOLE VOLE EEPROM ・・・③ VILM ・・・④ VOLE ≦ Example) When VCC =5V, VOLE=0.4V, IOLE=2.1mA, VILM=0.8V, from the equation ③, Rpu ≧ “L” input “L” output ∴ Rpu ≧ 2.2 [kΩ] Fig.39 DO pull up resistance With the value of Rpu to satisfy the above equation, VOLE becomes 0.4V or below, and with VILM(=0.8V), the equation ④ is also satisfied. : EEPROM VOL specifications ・VOLE : EEPROM IOL specifications ・IOLE : Microcontroller VIL specifications ・VILM Rpd ≧ VOHE IOHE VIHM ・・・⑤ ・・・⑥ Microcontroller VIHM IOHE EEPROM VOHE ≧ Example) When VCC =5V, VOHE=Vcc-0.2V, IOHE=0.1mA, VIHM=Vcc×0.7V from the equation ⑤, VOHE Rpd ≧ “H” output 5-0.2 0.1×10 -3 “H” input Rpd ∴ Rpd ≧ 48 [kΩ] Fig.40 DO pull down resistance With the value of Rpd to satisfy the above equation, VOHE becomes 2.4V or below, and with VIHM (=3.5V), the equation ⑥ is also satisfied. ・VOHE ・IOHE ・VIHM : EEPROM VOH specifications : EEPROM IOH specifications : Microcontroller VIH specifications www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 10/16 2011.01 - Rev.A BU9888FV-W Technical Note 5) READY / BUSY status display (DO terminal) (common to BR93L46-W / A46-WM,BR93L56-W / A56-WM, BR93L66-W / A66-WM, BR93L76-W / A76-WM, BR93L86-W / A86-WM) This display outputs the internal status signal. When CS is started after tCS (Min.200ns) from CS fall after write command input, “H” or “L” is output. R / B display=“L” ( BUSY ) = write under execution (DO status) After the timer circuit in the IC works and creates the period of tE/W, this time circuit completes automatically. And write to the memory cell is made in the period of tE/W, and during this period, other command is not accepted. R / B display = “H” (READY) = command wait status (DO status) Even after tE/W (max.5ms) from write of the memory cell, the following command is accepted. Therefore, CS=“H” in the period of tE/W, and when input is in SK, DI, malfunction may occur, therefore, DI=“L” in the area CS=“H”. (Especially, in the case of shared input port, attention is required.) * Do not input any command while status signal is output. Command input in BUSY area is cancelled, but command input in READY area is accepted. Therefore, status READY output is cancelled, and malfunction and mistake write may be made. CS STATUS SK CLOCK W RITE INSTRUCTION High-Z DI tSV READY BUSY DO Fig.41 R / B status output timing chart www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 11/16 2011.01 - Rev.A BU9888FV-W Technical Note 6) When to directly connect DI and DO This IC has independent input terminal DI and output terminal DO, and separate signals are handled on timing chart, meanwhile, by inserting a resistance R between these DI and DO terminals, it is possible to carry out control by 1 control line. Microcontroller DI/O PORT DI R DO EEPROM Fig.42 DI, DO control line common connection ○Data collision of microcontroller DI/O output and DO output and feedback of DO output to DI input. Drive from the microcontroller DI/O output to DI input on I/O timing, and signal output from DO output occur at the same time in the following points. (1) 1 clock cycle to take in A0 address data at read command Dummy bit “0” is output to DO terminal. →When address data A0 = “1” input, through current route occurs. EEPROM CS input “H” EEPROM SK input A1 A0 Collision of DI input and DO output EEPROM DO output High-Z A1 A0 0 D15 D14 D13 EEPROM DI input Microcontroller DI/O port High-Z Microcontroller input Microcontroller output Fig.43 Collision timing at read data output at DI, DO direct connection (2) Timing of CS = “H” after write command. DO terminal in READY / BUSY function output. When the next start bit input is recognized, “HIGH-Z” gets in. →Especially, at command input after write, when CS input is started with microcontroller DI/O output “L”, READY output “H” is output from DO terminal, and through current route occurs. Feedback input at timing of these (1) and (2) does not cause disorder in basic operations, if resistance R is inserted. ~~ EEPROM CS input Write command ~~ ~~ EEPROM SK input Write command ~~ ~~ EEPROM DI input Write command READY ~~ EEPROM DO output Write command BUSY ~~ ~~ READY High-Z Collision of DI input and DO output Microcontroller DI/O port Write command Microcontroller output BUSY ~~ READY ~~ Microcontroller input Microcontroller output Fig.44 Collision timing at DI, DO direct connection Note) As for the case (2), attention must be paid to the following. When status READY is output, DO and DI are shared, DI=”H” and the microcontroller DI/O=”High-Z” or the microcontroller DI/O=”H”,if SK clock is input, DO output is input to DI and is recognized as a start bit, and malfunction may occur. As a method to avoid malfunction, at status READY output, set SK=“L”, or start CS within 4 clocks after “H” of READY signal is output. Start bit CS SK Because DI=”H”, set SK=”L” at CS rise. DI READY DO High-Z Fig.45 Start bit input timing at DI, DO direct connection www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 12/16 2011.01 - Rev.A BU9888FV-W Technical Note ○Selection of resistance value R The resistance R becomes through current limit resistance at data collision. When through current flows, noises of power source line and instantaneous stop of power source may occur. When allowable through current is defined as I, the following relation should be satisfied. Determine allowable current amount in consideration of impedance and so forth of power source line in set. And insert resistance R, and set the value R to satisfy EEPROM input level VIH/VIL even under influence of voltage decline owing to leak current and so forth. Insertion of R will not cause any influence upon basic operations. (1) Address data A0 = “1” input, dummy bit “0” output timing (When microcontroller DI/O output is “H”, EEPROM DO outputs “L”, and “H” is input to DI) ・Make the through current to EEPROM 10mA or below. ・See to it that the level VIH of EEPROM should satisfy the following. Conditions Microcontroller EEPROM VOHM ≦ VIHE VOHM ≦ IOHM×R + VOLE At this moment, if VOLE=0V, VOHM ≦ IOHM×R VOHM ∴ R≧ ・・・⑦ IOHM DI/O PORT “H” output VOHM IOHM R DI DO VOLE “L” output ・VIHE ・VOLE ・VOHM ・IOHM : EEPROM VIH specifications : EEPROM VOL specifications : Microcontroller VOH specifications : Microcontroller IOH specifications Fig.46 Circuit at DI, DO direct connection (Microcontroller DI/O “H” output, EEPROM “L” output) (2) DO status READY output timing (When the microcontroller DI/O is “L”, EEPROM DO output “H”, and “L” is input to DI) ・Set the EEPROM input level VIL so as to satisfy the following. Conditions Microcontroller “L” output DI/O PORT VOLM IOHM R DO VOHE “H” output DI EEPROM VOLM ≧ VILE VOLM ≧ VOHE – IOLM×R As this moment, VOHE=Vcc VOLM ≧ Vcc – IOLM×R Vcc – VOLM ∴ ・VILE ・VOHE ・VOLM ・IOLM IOLM ・・・⑧ : EEPROM VIL specifications : EEPROM VOH specifications : Microcontroller VOL specifications : Microcontroller IOL specifications Fig.47 Circuit at DI, DO direct connection (Microcontroller DI/O “L” output, EEPROM “H” output) Example) When Vcc=5V, VOHM=5V, IOHM=0.4mA, VOLM=5V, IOLM=0.4mA, From the equation ⑦, R≧ R≧ ∴ R≧ VOHM IOHM 5 0.4×10 -3 From the equation⑧, R≧ R≧ ・・・⑨ Vcc – VOLM IOLM 5 – 0.4 2.1×10 2.2 [kΩ] -3 12.5 [kΩ] ∴ R≧ ・・・⑩ Therefore, from the equations ⑨ and ⑩, ∴ R≧ 12.5 [kΩ] www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 13/16 2011.01 - Rev.A BU9888FV-W Technical Note 7) Notes on power ON/OFF ・At power ON/OFF, set CS “L”. When CS is “H”, this IC gets in input accept status (active). If power is turned on in this status, noises and the likes may cause malfunction, mistake write or so. To prevent these, at power ON, set CS “L”. (When CS is in “L” status, all inputs are cancelled.) And at power decline, owing to power line capacity and so forth, low power status may continue long. At this case too, owing to the same reason, malfunction, mistake write may occur, therefore, at power OFF too, set CS “L”. VCC VCC GND VCC CS GND Bad example Good example Fig.48 Timing at power ON/OFF (Bad example)CS pin is pulled up to Vcc. In this case, CS becomes “H” (active status), and EEPROM may have malfunction, mistake write owing to noise and the likes. Even when CS input is High-Z, the status becomes like this case, which please note. (Good example)It is “L” at power ON/OFF. Set 10ms or higher to recharge at power OFF. When power is turned on without observing this condition, IC internal circuit may not be reset, which please note. ○POR citcuit This IC has a POR (Power On Reset) circuit as a mistake write countermeasure. After POR action, it gets in write disable status. The POR circuit is valid only when power is ON, and does not work when power is OFF. However, if CS is “H” at power ON/OFF, it may become write enable status owing to noises and the likes. For secure actions, observe the follwing conditions. 1. Set CS=”L” 2. Turn on power so as to satisfy the recommended conditions of tR, tOFF, Vbot for POR circuit action. VCC tR Recommended conditions of tR, tOFF, Vbot tR tOFF 0 tOFF 10ms or higher 10ms or higher Vbot 0.3V or below 0.2V or below 10ms or below Vbot 100ms or below Fig.49 Rise waveform diagram ○LVCC circuit LVCC (VCC-Lockout) circuit prevents data rewrite action at low power, and prevents wrong write. At LVCC voltage (Typ.=1.2V) or below, it prevent data rewrite. 8) Noise countermeasures ○VCC noise (bypass capacitor) When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is recommended to attach a bypass capacitor (0.1μF) between IC VCC and GND, At that moment, attach it as close to IC as possible.And, it is also recommended to attach a bypass capacitor between board VCC and GND. ○SK noise When the rise time (tR) of SK is long, and a certain degree or more of noise exists, malfunction may occur owing to clock bit displacement. To avoid this, a Schmitt trigger circuit is built in SK input. The hysteresis width of this circuit is set about 0.2V, if noises exist at SK input, set the noise amplitude 0.2Vp-p or below. And it is recommended to set the rise time (tR) of SK 100ns or below. In the case when the rise time is 100ns or higher, take sufficient noise countermeasures. Make the clock rise, fall time as small as possible. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 14/16 2011.01 - Rev.A BU9888FV-W Technical Note ●Notes for use (1) Described numeric values and data are design representative values, and the values are not guaranteed. (2) We believe that application circuit examples are recommendable, however, in actual use, confirm characteristics further sufficiently. In the case of use by changing the fixed number of external parts, make your decision with sufficient margin in consideration of static characteristics and transition characteristics and fluctuations of external parts and our LSI. (3) Absolute Maximum Ratings If the absolute maximum ratings such as impressed voltage and action temperature range and so forth are exceeded, LSI may be destructed. Do not impress voltage and temperature exceeding the absolute maximum ratings. In the case of fear exceeding the absolute maximum ratings, take physical safety countermeasures such as fuses, and see to it that conditions exceeding the absolute maximum ratings should not be impressed to LSI. (4) GND electric potential Set the voltage of GND terminal lowest at any action condition. Make sure that each terminal voltage is not lower than that of GND terminal in consideration of transition status. (5) Heat design In consideration of allowable loss in actual use condition, carry out heat design with sufficient margin. (6) Terminal to terminal short-circuit and wrong packaging When to package LSI onto a board, pay sufficient attention to LSI direction and displacement. Wrong packaging may destruct LSI. And in the case of short-circuit between LSI terminals and terminals and power source, terminal and GND owing to foreign matter, LSI may be destructed. (7) Use in a strong electromagnetic field may cause malfunction, therefore, evaluate design sufficient. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 15/16 2011.01 - Rev.A BU9888FV-W ●Ordering part number Technical Note B U 9 Part No. 8 8 8 F V - W E 2 Part No. Package FV: SSOP-B8 Packaging and forming specification E2: Embossed tape and reel SSOP-B8 3.0 ± 0.2 (MAX 3.35 include BURR) 8 7 6 5 Tape Quantity Direction of feed Embossed carrier tape 2500pcs E2 The direction is the 1pin of product is at the upper left when you hold 6.4 ± 0.3 4.4 ± 0.2 ( reel on the left hand and you pull out the tape on the right hand ) 1 2 3 4 1.15 ± 0.1 0.15 ± 0.1 S 0.1 S +0.06 0.22 −0.04 0.3MIN 0.1 (0.52) 0.65 0.08 M 1pin Direction of feed (Unit : mm) Reel ∗ Order quantity needs to be multiple of the minimum quantity. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 16/16 2011.01 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuelcontroller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law. Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. ROHM Customer Support System http://www.rohm.com/contact/ www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. R1120A
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