Datasheet
Operational Amplifier
Automotive High Speed
CMOS Operational Amplifier
LMR1701YG-C
General Description
Key Specifications
LMR1701YG-C is an output full swing CMOS operational
amplifier featuring wide bandwidth, high slew rate, low
operating supply voltage and low input bias current. It is
suitable for a sensor amplifier, ADC input buffer amplifier,
engine control unit, electric power steering, anti-lock
braking system and all automotive application.
Gain Bandwidth Product:
150 MHz (Typ)
Slew Rate:
80 V/μs (Typ)
Common-mode Input Voltage Range:
VSS to VDD - 0.9 V
Input Bias Current:
2.6 pA (Typ)
Operating Supply Voltage
Single Supply:
2.7 V to 5.5 V
Dual Supply:
±1.35 V to ±2.75 V
Operating Temperature Range:
-40 °C to +125 °C
Features
AEC-Q100 Qualified(Note 1)
Wide Bandwidth
High Slew Rate
Low Input Bias Current
Output Full Swing
Shutdown Function
Package
SSOP6
W (Typ) x D (Typ) x H (Max)
2.9 mm x 2.8 mm x 1.25 mm
(Note 1) Grade 1
Applications
Engine Control Unit
Electric Power Steering (EPS)
Anti-lock Braking System (ABS)
All Automotive Application
ADC Input Buffer Amplifier
DAC Output Amplifier
Sensor Amplifiers
Active Filtering
Amplifiers
Typical Application Circuit
RIN = 33 Ω
RF = 300 Ω
VDD
ENABLE
-
VOUT
𝑉𝑂𝑈𝑇 = (1 +
+
𝑅𝐹
)𝑉
𝑅𝐼𝑁 𝐼𝑁
RL = 150 Ω
VIN
VSS
〇Product structure : Silicon integrated circuit
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Pin Configuration
(TOP VIEW)
OUT
1
VSS
2
+
+IN
6
VDD
5
ENABLE
4
-IN
-
3
Pin Description
Pin No.
Pin Name
Function
1
OUT
Output
2
VSS
Negative power supply / Ground
3
+IN
Non-inverting input
4
-IN
Inverting input
5
ENABLE
6
VDD
Enable input (VENABLE = VH: Circuitry active / VENABLE = VL: shutdown)
Positive power supply
Block Diagram
6 VDD
OUT 1
Iref
OPAMP
5 ENABLE
-
VSS 2
+
+IN 3
4 -IN
Description of Blocks
1. OPAMP:
This block includes output full swing operational amplifier with class AB output circuit and high speed ground sense
differential input stage.
2. Iref:
This block supplies reference current to operate OPAMP block.
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Absolute Maximum Ratings (Ta = 25 °C)
Parameter
Symbol
Rating
Unit
Supply Voltage (VDD - VSS)
VS
7.0
V
Differential Input Voltage(Note 1)
VID
VS
V
VICMR
(VSS - 0.3) to (VDD + 0.3)
V
VEN
(VSS - 0.3) to (VDD + 0.3)
V
II
±10
mA
Tjmax
150
°C
Tstg
-55 to +150
°C
Common-mode Input Voltage Range
ENABLE Input Voltage Range
Input Current
Maximum Junction Temperature
Storage Temperature Range
Caution 1: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is
operated over the absolute maximum ratings.
Caution 2: Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may result in deterioration of the
properties of the chip. In case of exceeding this absolute maximum rating, design a PCB with thermal resistance taken into consideration by
increasing board size and copper area so as not to exceed the maximum junction temperature rating.
(Note 1) The differential input voltage indicates the voltage difference between inverting input and non-inverting input.
The input pin voltage is set to VSS or more.
Thermal Resistance(Note 2)
Parameter
Symbol
Thermal Resistance (Typ)
1s(Note 4)
2s2p(Note 5)
Unit
SSOP6
Junction to Ambient
θJA
376.5
185.4
°C/W
Junction to Top Characterization Parameter(Note 3)
ΨJT
40
30
°C/W
(Note 2) Based on JESD51-2A(Still-Air).
(Note 3) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 4) Using a PCB board based on JESD51-3.
(Note 5) Using a PCB board based on JESD51-7.
Layer Number of
Measurement Board
Single
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.57 mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70 μm
Layer Number of
Measurement Board
4 Layers
Material
Board Size
FR-4
114.3 mm x 76.2 mm x 1.6 mmt
Top
2 Internal Layers
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70 μm
74.2 mm x 74.2 mm
35 μm
74.2 mm x 74.2 mm
70 μm
Recommended Operating Conditions
Parameter
Symbol
Single Supply
Supply Voltage
(VDD - VSS)
Min
Typ
Max
2.7
5.0
5.5
±1.35
±2.50
±2.75
-40
+25
+125
VS
Dual Supply
Operating Temperature
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Unit
V
°C
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Electrical Characteristics
(Unless otherwise specified VS = 5.5 V, VSS = 0 V, RL = 150 Ω to VS/2)
Parameter
Symbol
VIO
Input Offset Voltage
Limit
Temperature
Range
Min
Typ
Max
25 °C
-
1
6
-40 °C to
+125 °C
-
-
8
Unit
Conditions
mV
Absolute value
Input Offset Voltage
Temperature Drift
ΔVIO/ΔT
-40 °C to
+125 °C
-
2.5
-
μV/°C
Absolute value
Input Offset Current
IIO
25 °C
-
0.2
-
pA
Absolute value
Input Bias Current
IB
25 °C
-
2.6
-
pA
Absolute value
25 °C
-
9.6
14.0
Supply Current
IDD
-40 °C to
+125 °C
-
-
16.0
mA
-
25 °C
-
0.15
1.00
μA
-
66
80
-
dB
VICMR = 0.0 V to 4.6 V
60
86
-
dB
VDD = 2.7 V to 5.5 V
VSS to VDD - 0.9 V
Shutdown Current
Common-mode Rejection
Ratio
Power Supply Rejection
Ratio
Common-mode Input Voltage
Range
IDD_SD
CMRR
PSRR
Large Signal Voltage
Gain
Output Voltage High
VICMR
25 °C
0
-
VDD - 0.9
V
25 °C
95
120
-
dB
AV
-40 °C to
+125 °C
90
-
-
dB
-
15
100
mV
-
250
500
mV
-
20
100
mV
RL = 2 kΩ
-
150
500
mV
RL = 100 Ω
VOH
Output Voltage Low
-40 °C to
+125 °C
-40 °C to
+125 °C
VOL
25 °C
25 °C
RL = 100 Ω,
VOUT = 0.5 V to 5.0 V
RL = 2 kΩ,
VOH = VDD - VOUT
RL = 100 Ω,
VOH = VDD - VOUT
VOUT = VSS
Absolute value
VOUT = VDD
Absolute value
VOUT = 2 Vp-p,
RL = 150 Ω
VOUT = 2 Vstep,
G = 6 dB,
RL = 150 Ω
Output Source Current (Note 1)
IOH
25 °C
-
200
-
mA
Output Sink Current (Note 1)
IOL
25 °C
-
130
-
mA
Slew Rate
SR
25 °C
-
80
-
V/μs
tS
25 °C
-
30
-
ns
GBW
25 °C
-
150
-
MHz
G = 20 dB, RL = 150 Ω
θ
25 °C
-
50
-
deg
G = 20 dB, RL = 150 Ω
Vn
25 °C
-
3
-
THD+N
25 °C
-
0.003
-
%
f = 1 kHz, G = 6 dB,
VOUT = 3 Vp-p,
RL = 150 Ω
Turn On Time
tON
25 °C
-
5
-
μs
-
Turn Off Time
Settling Time, 0.1%
Gain Bandwidth Product
Phase Margin
Input Referred Noise Voltage
Density
Total Harmonic Distortion +
Noise
nV/√Hz f = 1 MHz, RL = 150 Ω
tOFF
25 °C
-
20
-
ns
-
Voltage(Note 2,3)
VH
25 °C
2.5
-
5.5
V
-
Turn Off Voltage(Note 2,4)
VL
25 °C
0
-
0.8
V
-
Turn On
(Note 1) Select the output current value that consider the power dissipation of the IC under high temperature environment. When the output pins are
short-circuited continuously, the output current may decrease due to the temperature rise by the heat generation of inside the IC.
(Note 2) When the ENABLE pin is not connected to any potential, the ENABLE pin pulled up to VDD potential by the internal circuit in IC and normally operable.
(Note 3) The ENABLE input voltage required that the IC is active.
(Note 4) The ENABLE input voltage required that the IC is shutdown.
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Electrical Characteristics – continued
(Unless otherwise specified VS = 2.7 V, VSS = 0 V, RL = 150 Ω to VS/2)
Parameter
Symbol
VIO
Input Offset Voltage
Limit
Temperature
Range
Min
Typ
Max
25 °C
-
1
6
-40 °C to
+125 °C
-
-
8
Unit
Conditions
mV
Absolute value
Input Offset Voltage
Temperature Drift
ΔVIO/ΔT
-40 °C to
+125 °C
-
2.5
-
μV/°C
Absolute value
Input Offset Current
IIO
25 °C
-
0.2
-
pA
Absolute value
Input Bias Current
IB
25 °C
-
2.6
-
pA
Absolute value
25 °C
-
8.7
13.0
Supply Current
IDD
-40 °C to
+125 °C
-
-
14.5
mA
-
25 °C
-
0.15
1.00
μA
-
60
80
-
dB
VICMR = 0.0 V to 1.8 V
60
86
-
dB
VDD = 2.7 V to 5.5 V
VSS to VDD - 0.9 V
Shutdown Current
Common-mode Rejection
Ratio
Power Supply Rejection
Ratio
Common-mode Input Voltage
Range
IDD_SD
CMRR
PSRR
Large Signal Voltage
Gain
Output Voltage High
VICMR
25 °C
0
-
VDD - 0.9
V
25 °C
90
120
-
dB
AV
-40 °C to
+125 °C
90
-
-
dB
-
10
100
mV
-
150
500
mV
-
5
100
mV
RL = 2 kΩ
-
70
500
mV
RL = 100 Ω
VOH
Output Voltage Low
-40 °C to
+125 °C
-40 °C to
+125 °C
VOL
25 °C
25 °C
RL = 100 Ω,
VOUT = 0.5 V to 2.2 V
RL = 2 kΩ,
VOH = VDD - VOUT
RL = 100 Ω,
VOH = VDD - VOUT
VOUT = VSS
Absolute value
VOUT = VDD
Absolute value
VOUT = 1 Vp-p,
RL = 150 Ω
VOUT = 1 Vstep,
G = 6 dB,
RL = 150 Ω
Output Source Current (Note 1)
IOH
25 °C
-
60
-
mA
Output Sink Current (Note 1)
IOL
25 °C
-
120
-
mA
Slew Rate
SR
25 °C
-
70
-
V/μs
tS
25 °C
-
30
-
ns
GBW
25 °C
-
140
-
MHz
G = 20 dB, RL = 150 Ω
θ
25 °C
-
50
-
deg
G = 20 dB, RL = 150 Ω
Vn
25 °C
-
3
-
THD+N
25 °C
-
0.0015
-
%
f = 1 kHz, G = 6 dB,
VOUT = 1 Vp-p,
RL = 150 Ω
Turn On Time
tON
25 °C
-
10
-
μs
-
Turn Off Time
Settling Time, 0.1%
Gain Bandwidth Product
Phase Margin
Input Referred Noise Voltage
Density
Total Harmonic Distortion +
Noise
nV/√Hz f = 1 MHz, RL = 150 Ω
tOFF
25 °C
-
20
-
ns
-
Voltage(Note 2,3)
VH
25 °C
2.5
-
2.7
V
-
Turn Off Voltage(Note 2,4)
VL
25 °C
0
-
0.8
V
-
Turn On
(Note 1) Select the output current value that consider the power dissipation of the IC under high temperature environment. When the output pins are
short-circuited continuously, the output current may decrease due to the temperature rise by the heat generation of inside the IC.
(Note 2) When the ENABLE pin is not connected to any potential, the ENABLE pin pulled up to VDD potential by the internal circuit in IC and normally operable.
(Note 3) The ENABLE input voltage required that the IC is active.
(Note 4) The ENABLE input voltage required that the IC is shutdown.
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Description of Terms in Electrical Characteristics
Described below are descriptions of the relevant electrical terms used in this datasheet. Items and symbols generally used
are also shown. Note that item names, symbols and their meanings may differ from those on another manufacturer’s or
general documents.
1. Absolute Maximum Ratings
Absolute maximum rating items indicates the condition which must not be exceeded even if it is instantaneous. Applying of a
voltage exceeding the absolute maximum ratings or use outside the temperature range which is provided in the absolute
maximum ratings cause characteristic deterioration or destruction of the IC.
1.1 Supply Voltage (VS)
This indicates the maximum voltage that can be applied between the positive power supply pin and the negative
power supply pin without deteriorating the characteristics of internal circuit or without destroying it.
1.2 Differential Input Voltage (VID)
This indicates the maximum voltage that can be applied between the non-inverting input pin and the inverting input
pin without deteriorating the characteristics of the IC or without destroying it.
1.3 Common-mode Input Voltage Range (VICMR)
This indicates the maximum voltage that can be applied to the non-inverting input pin and inverting input pin without
deteriorating the characteristics of the IC or without destroying it. Common-mode Input Voltage Range of the maximum
ratings does not assure normal operation of IC. For normal operation, use the IC within the Common-mode Input Voltage
Range on Electrical Characteristics.
2. Electrical Characteristics
2.1 Input Offset Voltage (VIO)
This indicates the voltage difference between non-inverting and inverting pins. It can be translated as the input
voltage difference required for setting the output voltage at 0 V.
2.2 Input Offset Voltage Drift (ΔVIO / ΔT)
Denotes the ratio of the input offset voltage fluctuation to the ambient temperature fluctuation.
2.3 Input Offset Current (IIO)
This indicates the difference of input bias current between the non-inverting and inverting pins.
2.4 Input Bias Current (IB)
This indicates the current that flows into or out from the input pin. It is defined by the average of input bias currents at
the non-inverting and inverting pins.
2.5 Supply Current (IDD)
This indicates the current of the IC itself flowing under the specified conditions and under no-load or steady-state
conditions.
2.6 Shutdown Current (IDD_SD)
This indicates the current when the circuit is shutdown.
2.7 Common-mode Rejection Ratio (CMRR)
This indicates the ratio of fluctuation of input offset voltage when Common-mode Input Voltage is changed. It is
normally the fluctuation of DC.
CMRR = (Change of Input Common-mode Voltage) / (Input Offset Fluctuation)
2.8 Power Supply Rejection Ratio (PSRR)
This indicates the ratio of fluctuation of input offset voltage when supply voltage is changed.
It is normally the fluctuation of DC.
PSRR = (Change of Power Supply Voltage) / (Input Offset Fluctuation)
2.9 Common-mode Input Voltage Range (VICMR)
This indicates the input voltage range where IC normally operates.
2.10 Large Signal Voltage Gain (AV)
This indicates the amplifying rate (gain) of output voltage against the voltage difference between non-inverting pin and
inverting pin. It is normally the amplifying rate (gain) with reference to DC voltage.
AV = (Output Voltage) / (Differential Input Voltage)
2.11 Output Voltage High / Output Voltage Low (VOH / VOL)
This indicates the voltage range of the output under specified load condition. It is divided into Output Voltage High and
Output Voltage Low. Output Voltage High indicates the upper limit of output voltage. Output Voltage Low indicates the
lower limit.
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Description of Terms in Electrical Characteristics – continued
2.12 Output Source Current / Output Sink Current (IOH / IOL)
The maximum current that can be output from the IC under specific output conditions. It is distributed between output
source current and output sink current. The output source current indicates the current flowing out from the IC, and
the output sink current indicates the current flowing into the IC.
2.13 Slew Rate (SR)
This is a parameter representing the operational speed of the operational amplifier. This indicates the rate at which
the output voltage can change in the specified unit time.
2.14 Settling Time, 0.1% (tS)
This indicates the time it takes the output to respond to a step change of input, and remain within a defined error band
(0.1%).
2.15 Gain Bandwidth Product (GBW)
This indicates the product of an arbitrary frequency and its gain in the range of the gain slope of -6 dB/octave.
2.16 Phase Margin (θ)
This indicates the margin of phase from the phase delay of 180 degree at the frequency which the gain of the
operational amplifier is 1.
2.17. Input Referred Noise Voltage Density (Vn)
Indicates a noise voltage generated inside the operational amplifier equivalent by ideal voltage source connected in
series with input terminal.
2.18 Total Harmonic Distortion + Noise (THD+N)
This indicates the content ratio of harmonic and noise components relative to the output signal.
2.19 Turn On Time / Turn Off Time (tON / tOFF)
Turn On Time indicates the time from applying the voltage to the ENABLE pin until the IC is active.
Turn Off Time indicates the time from applying the voltage to the ENABLE pin until the IC is shutdown.
2.20 Turn On Voltage / Turn Off Voltage (VH / VL)
The IC is active if the ENABLE pin is applied Turn On Voltage (VH).
The IC is shutdown if the ENABLE pin is applied Turn Off Voltage (VL).
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Typical Performance Curves
(Reference data) VSS = 0 V
13
13
12
12
10
Supply Current: IDD [mA]
Supply Current: IDD [mA]
Ta = +125 °C
11
Ta = +25 °C
9
8
Ta = -40 °C
7
6
VS = 5.5 V
11
10
9
VS = 2.7 V
8
7
6
5
5
2
3
4
5
6
-50
-25
Supply Voltage: VS [V]
450
450
400
400
Output Voltage High: VOH [mV]
Output Voltage High: VOH [mV]
500
350
Ta = +125 °C
Ta = +25 °C
200
150
Ta = -40 °C
100
50
75
100
125
150
Figure 2. Supply Current vs Ambient Temperature
500
250
25
Ambient Temperature: Ta [°C]
Figure 1. Supply Current vs Supply Voltage
300
0
50
350
300
VS = 5.5 V
250
200
150
VS = 2.7 V
100
50
0
0
2
3
4
5
6
-50
Supply Voltage: VS [V]
-25
0
25
50
75
100 125 150
Ambient Temperature: Ta [°C]
Figure 3. Output Voltage High vs Supply Voltage
(RL = 100 Ω, VOH = VDD - VOUT)
Figure 4. Output Voltage High vs Ambient Temperature
(RL = 100 Ω, VOH = VDD - VOUT)
(Note) The above data are measurement value of typical sample; it is not guaranteed.
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Typical Performance Curves – continued
(Reference data) VSS = 0 V
20
20
18
18
16
Ta = +125 °C
14
Output Voltage High: VOH [mV]
Output Voltage High: VOH [mV]
16
Ta = +25 °C
12
10
8
Ta = -40 °C
6
4
2
VS = 5.5 V
14
12
10
8
VS = 2.7 V
6
4
2
0
0
2
3
4
5
6
-50
-25
Supply Voltage: VS [V]
25
50
75
100
125 150
Ambient Temperature: Ta [°C]
Figure 5. Output Voltage High vs Supply Voltage
(RL = 2 kΩ, VOH = VDD - VOUT)
Figure 6. Output Voltage High vs Ambient Temperature
(RL = 2 kΩ, VOH = VDD - VOUT)
400
400
300
300
Output Voltage Low: VOL [mV]
Output Voltage Low: VOL [mV]
0
200
Ta = +125 °C
Ta = +25 °C
100
VS = 5.5 V
200
100
VS = 2.7 V
Ta = -40 °C
0
0
2
3
4
5
6
-50
Supply Voltage: VS [V]
-25
0
25
50
75
100
125
150
Ambient Temperature: Ta [°C]
Figure 7. Output Voltage Low vs Supply Voltage
(RL = 100 Ω)
Figure 8. Output Voltage Low vs Ambient Temperature
(RL = 100 Ω)
(Note) The above data are measurement value of typical sample; it is not guaranteed.
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Typical Performance Curves – continued
50
50
40
40
Output Voltage Low: VOL [mV]
Output Voltage Low: VOL [mV]
(Reference data) VSS = 0 V
30
Ta = +125 °C
20
Ta = +25 °C
10
30
VS = 5.5 V
20
10
VS = 2.7 V
Ta = -40 °C
0
0
2
3
4
5
6
-50
Supply Voltage: VS [V]
-25
0
25
50
75
100
125 150
Ambient Temperature: Ta [°C]
Figure 9. Output Voltage Low vs Supply Voltage
(RL = 2 kΩ)
Figure 10. Output Voltage Low vs Ambient Temperature
(RL = 2 kΩ)
250
250
Output Source Current: IOH [mA]
Output Source Current: IOH [mA]
Ta = +125 °C
200
150
Ta = -40 °C
100
Ta = +25 °C
50
200
Ta = +25 °C
150
Ta = -40 °C
100
50
Ta = +125 °C
0
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Output Voltage: VOUT [V]
0.0
1.0
2.0
3.0
4.0
5.0
6.0
Output Voltage: VOUT [V]
Figure 11. Output Source Current vs Output Voltage
(VS = 2.7 V)
Figure 12. Output Source Current vs Output Voltage
(VS = 5.5 V)
(Note) The above data are measurement value of typical sample; it is not guaranteed.
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Typical Performance Curves – continued
(Reference data) VSS = 0 V
250
200
200
Output Sink Current: IOL [mA]
Output Sink Current: IOL [mA]
250
Ta = +25 °C
150
Ta = -40 °C
100
Ta = +125 °C
50
Ta = +25 °C
150
Ta = -40 °C
100
Ta = +125 °C
50
0
0
0.0
0.5
1.0
1.5
2.0
2.5
0.0
3.0
1.0
Output Voltage: VOUT [V]
1.5
1.5
Input Offset Voltage: VIO [mV]
Input Offset Voltage: VIO [mV]
2.0
1.0
Ta = +125 °C
0.0
Ta = -40 °C
-0.5
4.0
5.0
6.0
Figure 14. Output Sink Current vs Output Voltage
(VS = 5.5 V)
2.0
Ta = +25 °C
3.0
Output Voltage: VOUT [V]
Figure 13. Output Sink Current vs Output Voltage
(VS = 2.7 V)
0.5
2.0
-1.0
1.0
VS = 2.7 V
0.5
0.0
-0.5
VS = 5.5 V
-1.0
-1.5
-1.5
-2.0
-2.0
2.0
3.0
4.0
5.0
6.0
Supply Voltage: VS [V]
-50
-25
0
25
50
75
100
125
150
Ambient Temperature: Ta [°C]
Figure 15. Input Offset Voltage vs Supply Voltage
Figure 16. Input Offset Voltage vs Ambient Temperature
(Note) The above data are measurement value of typical sample; it is not guaranteed.
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Typical Performance Curves – continued
2.0
2.0
1.5
1.5
Input Offset Voltage: VIO [mV]
Input Offset Voltage: VIO [mV]
(Reference data) VSS = 0 V
1.0
Ta = +125 °C
0.5
Ta = +25 °C
0.0
Ta = -40 °C
-0.5
-1.0
-1.5
1.0
Ta = +125 °C
0.5
Ta = +25 °C
0.0
-0.5
Ta = -40 °C
-1.0
-1.5
-2.0
-2.0
-1.0
0.0
1.0
2.0
3.0
-1.0
Common-mode Input Voltage: VICM [V]
200
180
180
Large Signal Voltage Gain: AV [dB]
Large Signal Voltage Gain: AV [dB]
2.0
3.0
4.0
5.0
6.0
Figure 18. Input Offset Voltage vs
Common-mode Input Voltage
(VS = 5.5 V)
200
Ta = +25 °C
Ta = -40 °C
140
1.0
Common-mode Input Voltage: VICM [V]
Figure 17. Input Offset Voltage vs
Common-mode Input Voltage
(VS = 2.7 V)
160
0.0
120
Ta = +125 °C
100
80
60
160
VS = 2.7 V
140
120
VS = 5.5 V
100
80
60
40
40
2
3
4
5
6
-50
Supply Voltage: VS [V]
-25
0
25
50
75
100
125
150
Ambient Temperature: Ta [°C]
Figure 19. Large Signal Voltage Gain vs Supply Voltage
(RL = 2 kΩ)
Figure 20. Large Signal Voltage Gain vs
Ambient Temperature
(RL = 2 kΩ)
(Note) The above data are measurement value of typical sample; it is not guaranteed.
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Typical Performance Curves – continued
200
200
180
180
Large Signal Voltage Gain: AV [dB]
Large Signal Voltage Gain: AV [dB]
(Reference data) VSS = 0 V
160
Ta = -40 °C
140
Ta = +25 °C
120
Ta = +125 °C
100
80
60
160
VS = 5.5 V
140
120
VS = 2.7 V
100
80
60
40
40
2
3
4
5
6
-50
-25
Supply Voltage: VS [V]
25
50
75
100
125 150
Ambient Temperature: Ta [°C]
Figure 21. Large Signal Voltage Gain vs Supply Voltage
(RL = 100 Ω)
Figure 22. Large Signal Voltage Gain vs
Ambient Temperature
(RL = 100 Ω)
160
Common-mode Rejection Ratio: CMRR [dB]
160
Common-mode Rejection Ratio: CMRR [dB]
0
140
120
Ta = -40 °C
100
Ta = +25 °C
80
Ta = +125 °C
60
40
20
0
140
120
100
VS = 5.5 V
80
60
VS = 2.7 V
40
20
0
2
3
4
5
6
-50
-25
0
25
50
75
100
125 150
Ambient Temperature: Ta [°C]
Supply Voltage: VS [V]
Figure 23. Common-mode Rejection Ratio vs Supply Voltage
Figure 24. Common-mode Rejection Ratio vs
Ambient Temperature
(Note) The above data are measurement value of typical sample; it is not guaranteed.
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Typical Performance Curves – continued
(Reference data) VSS = 0 V
0.8
Input Referred Noise Voltage Density: Vn [µV/√Hz]
Power Supply Rejection Ratio: PSRR [dB]
160
140
120
100
80
60
40
20
0
0.6
VS = 5.5 V
0.4
0.2
VS = 2.7 V
0.0
-50
-25
0
25
50
75
100
125
150
10
102
104
105
106
Frequency: [Hz]
Ambient Temperature: Ta [°C]
Figure 25. Power Supply Rejection Ratio vs
Ambient Temperature
Figure 26. Input Referred Noise Voltage Density vs
Frequency
140
30
120
Slew Rate: SR [V/µs]
Input Referred Noise Voltage Density: Vn [nV/√Hz]
103
20
VS = 5.5 V
10
VS = 2.7 V
0
104
100
Rise
80
60
Fall
40
20
105
0
106
2
Frequency [Hz]
3
4
5
6
Supply Voltage: VS [V]
Figure 27. Input Referred Noise Voltage Density vs
Frequency
Figure 28. Slew Rate vs Supply Voltage
(Note) The above data are measurement value of typical sample; it is not guaranteed.
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Typical Performance Curves – continued
140
140
120
120
100
100
Slew Rate: SR [V/µs]
Slew Rate: SR [V/µs]
(Reference data) VSS = 0 V
Rise
80
60
Fall
40
20
Rise
80
Fall
60
40
20
0
0
-50
-25
0
25
50
75
100
125
150
-50
-25
Ambient Temperature: Ta [°C]
0
25
50
75
100
125 150
Ambient Temperature: Ta [°C]
Figure 29. Slew Rate vs Ambient Temperature
(VS = 2.7 V)
Figure 30. Slew Rate vs Ambient Temperature
(VS = 5.5 V)
200
70
VS = 5.5 V
150
Phase Margin: θ [deg]
Gain Bandwidth Product: GBW [MHz]
VS = 2.7 V
60
VS = 2.7 V
100
50
50
VS = 5.5 V
40
30
20
10
0
0
-50
-25
0
25
50
75
100 125 150
Ambient Temperature: Ta [°C]
-50
-25
0
25
50
75
100 125
150
Ambient Temperature: Ta [°C]
Figure 31. Gain Bandwidth Product vs Ambient Temperature
(G = 20 dB, Non-inverting Amplifier Circuit)
Figure 32. Phase Margin vs Ambient Temperature
(G = 20 dB, Non-inverting Amplifier Circuit)
(Note) The above data are measurement value of typical sample; it is not guaranteed.
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Typical Performance Curves – continued
(Reference data) VSS = 0 V
200
70
VS = 2.7 V
150
Phase Margin: θ [deg]
Gain Bandwidth Product: GBW [MHz]
60
VS = 5.5 V
VS = 2.7 V
100
50
50
40
VS = 5.5 V
30
20
10
0
0
-50
-25
0
25
50
75
100 125 150
-50
Ambient Temperature: Ta [°C]
0
25
50
75
100
125
150
Ambient Temperature: Ta [°C]
Figure 33. Gain Bandwidth Product vs Ambient Temperature
(G = 20 dB, Inverting Amplifier Circuit)
Figure 34. Phase Margin vs Ambient Temperature
(G = 20 dB, Inverting Amplifier Circuit)
60
60
50
50
VS = 2.7 V
Phase Margin: θ [deg]
Phase Margin: θ [deg]
-25
40
VS = 5.5 V
30
20
10
40
VS = 2.7 V
30
20
VS = 5.5 V
10
0
0
0
10
20
0
Load Capacitance: CL [pF]
10
20
Load Capacitance: CL [pF]
Figure 35. Phase Margin vs Load Capacitance
(G = 20 dB, Non-inverting Amplifier Circuit)
Figure 36. Phase Margin vs Load Capacitance
(G = 20 dB, Inverting Amplifier Circuit)
(Note) The above data are measurement value of typical sample; it is not guaranteed.
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Typical Performance Curves – continued
180
50
180
40
90
40
90
30
0
20
-90
Gain
106
0
20
-90
107
Frequency: f [Hz]
108
-180
10
-270
0
Figure 37. Voltage Gain, Phase vs Frequency
(G = 20 dB, VS = 2.7 V, Non-inverting Amplifier Circuit)
-180
106
107
Frequency: f [Hz]
108
-270
Figure 38. Voltage Gain, Phase vs Frequency
(G = 20 dB, VS = 5.5 V, Non-inverting Amplifier Circuit)
360
50
360
40
270
40
270
30
180
20
90
Gain
10
0
0
106
107
Frequency: f [Hz]
108
Phase
30
180
20
90
Gain
10
-90
0
Figure 39. Voltage Gain, Phase vs Frequency
(G = 20 dB, VS = 2.7 V, Inverting Amplifier Circuit)
Phase: θ [deg]
Phase
Voltage Gain: G [dB]
50
Phase: θ [deg]
Voltage Gain: G [dB]
30
Gain
10
0
Phase
Phase: θ [deg]
Phase
Voltage Gain: G [dB]
50
Phase: θ [deg]
Voltage Gain: G [dB]
(Reference data) VSS = 0 V
0
106
107
Frequency: f [Hz]
108
-90
Figure 40. Voltage Gain, Phase vs Frequency
(G = 20 dB, VS =5.5 V, Inverting Amplifier Circuit)
(Note) The above data are measurement value of typical sample; it is not guaranteed.
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Typical Performance Curves – continued
(Reference data) VSS = 0 V
14
40
VS = 2.7 V
10
30
Turn Off Time: tOFF [ns]
Turn On Time: tON [µs]
12
8
6
4
VS = 2.7 V
20
10
VS = 5.5 V
VS = 5.5 V
2
0
0
-50
-25
0
25
50
75
100
125
150
-50
-25
Ambient Temperature: Ta [°C]
25
50
75
100
125
150
Ambient Temperature: Ta [°C]
Figure 41. Turn On Time vs Ambient Temperature
Figure 42. Turn Off Time vs Ambient Temperature
5
5
4
4
Turn Off Voltage: VL [V]
Turn On Voltage: VH [V]
0
3
VS = 5.5 V
2
1
3
VS = 5.5 V
2
1
VS = 2.7 V
VS = 2.7 V
0
0
-50
-25
0
25
50
75
100
125
150
Ambient Temperature: Ta [°C]
-50
-25
0
25
50
75
100
125
150
Ambient Temperature: Ta [°C]
Figure 43. Turn On Voltage vs Ambient Temperature
Figure 44. Turn Off Voltage vs Ambient Temperature
(Note) The above data are measurement value of typical sample; it is not guaranteed.
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Application Information
1.
Input Voltage
Applying VSS - 0.3 V to VDD + 0.3 V to the input pins is possible without causing deterioration of the electrical
characteristics or destruction. However, note that the circuit operates correctly only when the input voltage is within the
common mode input voltage range of the electric characteristics.
2.
Enable Pin
This IC may be affected by external noise because ENABLE pin is pulled up through high resistance to reduce current
consumption. Connect an external pull up resistor as necessary.
3.
Power Supply (Single / Dual)
The operational amplifier operates when the specified voltage is supplied between VDD and VSS. Therefore, single
supply operational amplifiers can be used as dual supply operational amplifiers as well.
4.
Latch Up
Do not set the voltage of the input/output pins to VDD or more and VSS or less because there is a possibility of latch
up state peculiar to the CMOS device. Also, be careful not to apply abnormal noise and etc. to this IC.
5.
Decoupling Capacitor
Insert the decoupling capacitor between VDD and VSS for stable operation of this IC. If the decoupling capacitor is not
inserted, malfunction may occur due to the power supply noise.
6.
Start-up the Supply Voltage
This IC has the input ESD protection diodes to between VDD and VSS. When the voltage is applied to the input pins
without applying the power supply voltage, a current depending on the applied voltage flows in VDD or VSS through
these diodes. This phenomenon causes breakdown or malfunction of the IC. Therefore, consider to protect the input
pin and an order to supply the voltage.
This IC outputs high level voltage regardless of the state of input up to around 1 V which is the start-up voltage of the
circuit. Pay attention to the order to supply the voltage to each pins and etc. because there is a possibility of set
malfunction.
7.
Output Capacitor
The elements inside the circuit may be damaged (thermal destruction) when VDD is shorted to the VSS and the
electric charge is accumulated in the external capacitor connected to the output pin because the accumulated electric
charge passes through the parasitic element or the protective element inside the circuit and is discharged to VDD.
If this IC is used in an application circuit which does not cause oscillation due to the output capacitive load (e.g., a
voltage comparator not constituting a negative feedback circuit), the capacitor connected to the output pin should be
0.1 μF or less in order to prevent the damage of this IC due to the electric charge accumulated in it.
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Application Information – continued
Voltage Follower Circuit
The load resistance of 150 Ω or less should be connected to the output pin because oscillation may occur when this IC
is used in the voltage follower circuits. Figure 45 and figure 46 show the effects of the load resistance on the voltage
gains for the varying frequency.
30
30
20
20
Voltage Gain: G [dB]
Voltage Gain: G [dB]
8.
RL = 150 Ω
10
RL = 100 Ω
0
RL = 150 Ω
10
RL = 100 Ω
0
RL = 51 Ω
RL = 51 Ω
-10
-20
-10
106
107
Frequency: f [Hz]
-20
108
106
Figure 45. Voltage Gain vs Frequency
(G = 0 dB, VS = 2.7 V)
107
Frequency: f [Hz]
108
Figure 46. Voltage Gain vs Frequency
(G = 0 dB, VS = 5.5 V)
Oscillation by Output Capacitor
Oscillation may occur when this IC is used to design an application circuit with the negative feedback circuit. Figure 47
and figure 48 show the effects of the capacitive load on the voltage gains for the varying frequency.
9.
30
30
20
20
CL = 39 pF
Voltage Gain: G [dB]
Voltage Gain: G [dB]
CL = 39 pF
CL = 20 pF
10
CL = 10 pF
0
CL = 20 pF
10
CL = 10 pF
0
CL = 5 pF
CL = 5 pF
-10
-10
-20
106
107
Frequency: f [Hz]
-20
108
Figure 47. Voltage Gain vs Frequency
(G = 0 dB, VS = 2.7 V, RL = 100 Ω)
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106
107
Frequency: f [Hz]
108
Figure 48. Voltage Gain vs Frequency
(G = 0 dB, VS = 5.5 V, RL = 100 Ω)
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Oscillation by Output Capacitor – continued
The frequency characteristics can be improved using the isolation resistor Rd, as shown in figure 50 to figure 51 and
figure 53 to figure 54.
VDD
-
Rd
VOUT
+
RL
CL
VSS
Figure 49. Improvement Circuit Example 1
30
30
20
20
Rd = 0 Ω
Voltage Gain: G [dB]
Voltage Gain: G [dB]
Rd = 0 Ω
Rd = 20 Ω
10
Rd = 36 Ω
0
Rd = 51 Ω
-10
-20
Rd = 20 Ω
10
Rd = 36 Ω
0
Rd = 51 Ω
-10
106
107
Frequency: f [Hz]
-20
108
Figure 50. Voltage Gain vs Frequency
(G = 0 dB, VS = 2.7 V, RL = 100 Ω, CL = 20 pF)
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106
107
Frequency: f [Hz]
108
Figure 51. Voltage Gain vs Frequency
(G = 0 dB, VS = 5.5 V, RL = 100 Ω, CL = 20 pF)
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Oscillation by Output Capacitor – continued
VDD
-
VOUT
+
RL
Rd
CL
VSS
Figure 52. Improvement Circuit Example 2
30
30
20
20
Rd = 0 Ω
Voltage Gain: G [dB]
Voltage Gain: G [dB]
Rd = 0 Ω
Rd = 20 Ω
10
Rd = 51 Ω
0
Rd = 100 Ω
-10
-20
Rd = 20 Ω
10
Rd = 51 Ω
0
Rd = 100 Ω
-10
106
107
Frequency: f [Hz]
-20
108
Figure 53. Voltage Gain vs Frequency
(G = 0 dB, VS = 2.7 V, RL = 100 Ω, CL = 20 pF)
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106
107
Frequency: f [Hz]
108
Figure 54. Voltage Gain vs Frequency
(G =0 dB, VS = 5.5 V, RL = 100 Ω, CL = 20 pF)
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Application Examples
○Inverting Amplifier
RF
For inverting amplifier, input voltage (VIN) is amplified by
a voltage gain and depends on the ratio of RIN and RF.
The out-of-phase output voltage is shown in the next
expression.
VDD
RIN
VIN
VOUT
𝑉𝑂𝑈𝑇 = −
𝑅𝐹
𝑉
𝑅𝐼𝑁 𝐼𝑁
This circuit has input impedance equal to RIN.
VSS
Figure 55. Inverting Amplifier Circuit
○Non-inverting Amplifier
RIN
RF
For non-inverting amplifier, input voltage (VIN) is
amplified by a voltage gain, which depends on the ratio
of RIN and RF. The output voltage (VOUT) is in-phase with
the input voltage (VIN) and is shown in the next
expression.
VDD
VOUT
VIN
𝑉𝑂𝑈𝑇 = (1 +
𝑅𝐹
)𝑉
𝑅𝐼𝑁 𝐼𝑁
Effectively, this circuit has high input impedance since its
input side is the same as that of the operational amplifier.
VSS
Figure 56. Non-inverting Amplifier Circuit
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I/O Equivalence Circuits
Pin No.
Pin Name
Pin Description
Equivalence Circuit
6
1
OUT
Output
1
2
6
3
4
+IN
-IN
Input
3,4
2
6
33 MΩ
5
ENABLE
ENABLE Input
5
2
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Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Recommended Operating Conditions
The function and operation of the IC are guaranteed within the range specified by the recommended operating
conditions. The characteristic values are guaranteed only under the conditions of each item specified by the electrical
characteristics.
6.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow
instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and
routing of connections.
7.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
8.
Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
9.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
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Operational Notes – continued
10. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be
avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
Pin B
B
Parasitic
Elements
N
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
GND
GND
Parasitic
Elements
GND
Parasitic
Elements
GND
N Region
close-by
Figure 57. Example of monolithic IC structure
11. Ceramic Capacitor
When using a ceramic capacitor, determine a capacitance value considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
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Ordering Information
L
M
R
1
7
0
1
Y
G
-
Package
G: SSOP6
C
T
R
Product class
C: for Automotive
Packaging and forming specification
TR: Embossed tape and reel
Marking Diagram
Part Number Marking
9
K
SSOP6 (TOP VIEW)
LOT Number
Pin 1 Mark
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Physical Dimension and Packing Information
Package Name
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LMR1701YG-C
Revision History
Date
Revision
24.Jun.2020
001
Changes
New Release
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Notice
Precaution on using ROHM Products
1.
If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1),
aircraft/spacecraft, nuclear power controllers, etc.) and whose malfunction or failure may cause loss of human life,
bodily injury or serious damage to property (“Specific Applications”), please consult with the ROHM sales
representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any
ROHM’s Products for Specific Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are not designed under any special or extraordinary environments or conditions, as exemplified below.
Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the
use of any ROHM’s Products under any special or extraordinary environments or conditions. If you intend to use our
Products under any special or extraordinary environments or conditions (as exemplified below), your independent
verification and confirmation of product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (Exclude cases where no-clean type fluxes is used.
However, recommend sufficiently about the residue.); or Washing our Products by using water or water-soluble
cleaning agents for cleaning residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse, is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PAA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.004
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl 2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
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Rev.004
Datasheet
General Precaution
1. Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
3.
The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.
Notice – WE
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