SSO-AD-800-TO5I

SSO-AD-800-TO5i Avalanche Photodiode Special characteristics High gain at low bias voltage Fast rise time 800 µm diameter active area low capacitance Parameters: active area dark current (M=100) 1) Total capacitance (M=100) 2) Break down UBR (at ID=2µA) Temperature coefficient of UBR Spectral responsivity at 780 nm Cut-off frequency (-3dB) Rise time Optimum gain Gain M "Exess Noise" factor (M=100) "Exess Noise" index (M=100) Noise current (M=100) N.E.P. (M=100, 880 nm) Operating temperature Storage temperature 1) measurement conditions: 1) Package 3 (TO5i) : 0,5 mm ∅ 800 µm max. 6 nA typ. 4 nA typ.5 pF 100 - 220 V typ. 0,4 %/°C min. 0,40 A/W typ. 0,45 A/W typ. 0,5 GHz typ. 700 ps 50 - 60 min 200 2 typ. 2,2 typ. 0,2 typ. 3 pA/Hz ½ typ. 4 * 10 W/Hz -20 ... +70°C -60 ... +100°C -14 ½ Setup of photo current 10nA at M=1 and irradiation by a NIR-LED (880nm, 80nm bandwidth). Rise of the photo current up to 1 µA, (M=100) by internal multiplication due to an increasing bias voltage. 2) limited UBR range possible to agree SSO - AD - serie Spectral Responsivity at M=1 0,600 0,500 0,400 0,300 0,200 0,100 0,000 400 500 600 700 800 900 1000 1100 60 50 40 30 20 10 0 400 500 SSO - AD - serie Spectral Responsivity at M=100 Sabs (A/W) Sabs (A/W) 600 700 800 900 1000 1100 Wavelength (nm) Wavelength (nm) SSO - AD - serie quantum efficiency for M=1 1,00 0,90 0,80 0,70 0,60 QE 0,50 0,40 0,30 0,20 0,10 0,00 400 480 560 640 720 800 880 960 1040 wavelength (nm) 10 0 0 20 40 80 70 60 Ctot=f(UR) AD800-TO5i Ctot [pF] 50 40 30 20 60 80 100 UR [V] ID=f(UR/UBR) 100000 AD800-TO5i Gain=f(UR/UBR) 1000 AD800-TO5i 10000 100 1000 Gain (M) 10 1 0,100 0,200 0,300 0,400 0,500 0,600 0,700 0,800 0,900 1,000 Id [pA] 100 10 0,000 0,000 0,100 0,200 0,300 0,400 0,500 0,600 0,700 0,800 0,900 1,000 UR/UBR UR/UBR Maximum Ratings: • • • • max. electrical power dissipation max. optical peak value, once max. continous optical operation ( Pelectr. = Popt. * Sabs * M * UR ) 200 mW at 22°C 400 mW for 1 s IPh (DC) ≤ 500 µA ≤ 2 mA for signal 50 µs "on" / 1 ms "out" Bias supply voltage Current limiting resistor Application hints: • • • • • • • Current limit is to be realized via protecting resistor or current limiting - IC inside the supply voltage. Use of low noise read-out - IC. For higher gain a regulation of bias voltage due to the temperature is to be realized. For very small signals stray light (noise source) is to be excluded by filters in order to improve the signal-noise relation. Avoid touching the window with fingers! Careful cleaning with Ethyl alcohol possible. Avoid use of pointed and scratching tools! min. 0,1 µF, closest to APD APD Diode, protective circuit Read-out circuit or f.e. 50Ω Load resistance Handling precautions: • • • Soldering temperature min. Pin - length ESD - protection Storage 260°C for max. 10 s. The device must be protected against solder flux vapour! 2mm Only small danger for the device. Standard precautionary measures are sufficient. Store devices in conductive foam. 1999/07 •