74ALVC08
Quad 2-input AND gate
Rev. 3 — 5 October 2017
1
Product data sheet
General description
The 74ALVC08 is a high-performance, low-power, low-voltage, Si-gate CMOS device
and superior to most advanced CMOS compatible TTL families.
Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall
times.
The 74ALVC08 provides the 2-input AND function.
2
Features and benefits
•
•
•
•
•
•
•
Wide supply voltage range from 1.65 V to 3.6 V
3.6 V tolerant inputs/outputs
CMOS low power consumption
Direct interface with TTL levels (2.7 V to 3.6 V)
Power-down mode
Latch-up performance exceeds 250 mA
Complies with JEDEC standards:
– JESD8-7 (1.65 V to 1.95 V)
– JESD8-5 (2.3 V to 2.7 V)
– JESD8B/JESD36 (2.7 V to 3.6 V)
• ESD protection:
– HBM JESD22-A114E exceeds 2000 V
– MM JESD22-A115-A exceeds 200 V
3
Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
Version
-40 °C to +85 °C
SO14
plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74ALVC08PW -40 °C to +85 °C
TSSOP14
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74ALVC08BQ -40 °C to +85 °C
DHVQFN14 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 14 terminals;
body 2.5 × 3 × 0.85 mm
74ALVC08D
SOT762-1
74ALVC08
Nexperia
Quad 2-input AND gate
4
Functional diagram
1
&
3
&
6
&
8
2
1
1A
2
1B
4
2A
5
2B
9
3A
10
3B
12
4A
13
4B
4
1Y
3
5
2Y
6
9
3Y
4Y
10
8
12
11
11
13
Y
B
mna223
mna222
Figure 1. Logic symbol
5
A
&
Figure 2. IEC logic symbol
mna221
Figure 3. Logic diagram (one gate)
Pinning information
5.1 Pinning
1
1A
terminal 1
index area
1B
2
13 4B
1Y
3
12 4A
2A
4
11 4Y
2B
5
10 3B
2Y
6
9
3A
GND
7
8
3Y
aaa-27559
Figure 4. Pin configuration SO14
74ALVC08
Product data sheet
74ALVC08
1A
1
14 VCC
1B
2
13 4B
1Y
3
12 4A
2A
4
11 4Y
2B
5
10 3B
2Y
6
9
3A
GND
7
8
3Y
3
12 4A
2A
4
11 4Y
2B
5
2Y
6
GND(1)
13 4B
10 3B
9
8
14 VCC
1Y
3Y
1
2
7
1A
1B
GND
74ALVC08
14 VCC
74ALVC08
3A
aaa-027561
Transparent top view
(1) This is not a supply pin, the
substrate is attached to this pad using
conductive die attach material. There is
no electrical or mechanical requirement
to solder this pad however if it is
soldered the solder land should remain
floating or be connected to GND.
aaa-027560
Figure 6. Pin configuration
Figure 5. Pin configuration TSSOP14 DHVQFN14
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Rev. 3 — 5 October 2017
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2 / 14
74ALVC08
Nexperia
Quad 2-input AND gate
5.2 Pin description
Table 2. Pin description
Symbol
Pin
Description
1A, 2A, 3A, 4A
1, 4, 9, 12
data input
1B, 2B, 3B, 4B
2, 5, 10, 13
data input
1Y, 2Y, 3Y, 4Y
3, 6, 8, 11
data output
GND
7
ground (0 V)
VCC
14
supply voltage
6
Functional description
Table 3. Function table
[1]
Input
Output
nA
nB
nY
L
L
L
L
H
L
H
L
L
H
H
H
[1] H = HIGH voltage level; L = LOW voltage level
7
Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
VI
VO
Conditions
input voltage
output voltage
none
power-down mode, VCC = 0 V
Min
Max
Unit
-0.5
+4.6
V
[1]
-0.5
+4.6
V
[1] [2]
-0.5
[2]
-0.5
+4.6
V
VCC + 0.5 V
IIK
input clamping current
VI < 0 V
-
-50
mA
IOK
output clamping current
VO > VCC or VO < 0 V
-
±50
mA
IO
output current
VO = 0 V to VCC
-
±50
mA
ICC
supply current
-
100
mA
IGND
ground current
-100
-
mA
Tstg
storage temperature
-65
+150
°C
-
500
mW
Ptot
total power dissipation
Tamb = -40 °C to +85 °C
[3]
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] When VCC = 0 V (power-down mode), the output voltage can be 3.6 V in normal operation.
[3] For SO14 packages: above 70 °C derate linearly with 8 mW/K.
For TSSOP14 packages: above 60 °C derate linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60 °C derate linearly with 4.5 mW/K.
74ALVC08
Product data sheet
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3 / 14
74ALVC08
Nexperia
Quad 2-input AND gate
8
Recommended operating conditions
Table 5. Recommended operating conditions
Symbol
Parameter
VCC
supply voltage
VI
input voltage
VO
output voltage
Conditions
Tamb
ambient temperature
Δt/ΔV
input transition rise and fall rate
9
Min
Max
Unit
1.65
3.6
V
0
3.6
V
VCC = 1.65 to 3.6 V
0
VCC
V
power-down mode; VCC = 0 V
0
3.6
V
-40
+85
°C
VCC = 1.65 V to 2.7 V
0
20
ns/V
VCC = 2.7 V to 3.6 V
0
10
ns/V
Static characteristics
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Tamb = -40 °C to +85 °C
Min
VIH
VIL
VOH
VOL
HIGH-level
input voltage
LOW-level
input voltage
HIGH-level
output voltage
LOW-level
output voltage
74ALVC08
Product data sheet
VCC = 1.65 V to 1.95 V
Typ
[1]
Unit
Max
0.65 × VCC
-
-
V
VCC = 2.3 V to 2.7 V
1.7
-
-
V
VCC = 2.7 V to 3.6 V
2.0
-
-
V
VCC = 1.65 V to 1.95 V
-
-
VCC = 2.3 V to 2.7 V
-
-
0.7
V
VCC = 2.7 V to 3.6 V
-
-
0.8
V
VCC - 0.2
-
-
V
IO = -6 mA; VCC = 1.65 V
1.25
1.51
-
V
IO = -12 mA; VCC = 2.3 V
1.8
2.10
-
V
IO = -18 mA; VCC = 2.3 V
1.7
2.01
-
V
IO = -12 mA; VCC = 2.7 V
2.2
2.53
-
V
IO = -18 mA; VCC = 3.0 V
2.4
2.76
-
V
IO = -24 mA; VCC = 3.0 V
2.2
2.68
-
V
IO = 100 μA; VCC = 1.65 V to 3.6 V
-
-
0.2
V
IO = 6 mA; VCC = 1.65 V
-
0.11
0.3
V
IO = 12 mA; VCC = 2.3 V
-
0.17
0.4
V
IO = 18 mA; VCC = 2.3 V
-
0.25
0.6
V
IO = 12 mA; VCC = 2.7 V
-
0.16
0.4
V
IO = 18 mA; VCC = 3.0 V
-
0.23
0.4
V
IO = 24 mA; VCC = 3.0 V
-
0.30
0.55
V
0.35 × VCC V
VI = VIH or VIL
IO = -100 μA; VCC = 1.65 V to 3.6 V
VI = VIH or VIL
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74ALVC08
Nexperia
Quad 2-input AND gate
Symbol
Parameter
Conditions
Tamb = -40 °C to +85 °C
Min
Typ
[1]
Unit
Max
II
input leakage current
VCC = 3.6 V; VI = 3.6 V or GND
-
±0.1
±5
μA
IOFF
power-off
leakage current
VCC = 0 V; VI or VO = 3.6 V
-
±0.1
±10
μA
ICC
supply current
VCC = 3.6 V; VI = VCC or GND; IO = 0 A
-
0.2
20
μA
ΔICC
additional
supply current
per input pin; VCC = 3.0 V to 3.6 V;
VI = VCC - 0.6 V; IO = 0 A
-
5
750
μA
CI
input capacitance
-
3.5
-
pF
[1] All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb = 25 °C.
10 Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit, see Figure 8.
Symbol
Parameter
Conditions
Tamb = -40 °C to +85 °C
Min
tpd
propagation delay
nA, nB to nY; see Figure 7
Max
VCC = 1.65 V to 1.95 V
1.2
2.7
5.3
ns
VCC = 2.3 V to 2.7 V
1.0
1.9
3.2
ns
-
2.2
3.0
ns
1.2
2.0
2.9
ns
-
24
-
pF
VCC = 3.0 V to 3.6 V
power dissipation
capacitance
Unit
[2]
VCC = 2.7 V
CPD
Typ
[1]
per gate; VI = GND to VCC; VCC = 3.3 V
[3]
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively
[2] tpd is the same as tPHL and tPLH.
[3] CPD is used to determine the dynamic power dissipation (PD in μW).
2
2
PD = CPD × VCC × fi × N + Σ(CL × VCC × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in Volts
N = number of inputs switching
2
Σ(CL × VCC × fo) = sum of the outputs
74ALVC08
Product data sheet
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74ALVC08
Nexperia
Quad 2-input AND gate
10.1 Waveforms and test circuit
VI
VM
nA, nB input
GND
t PHL
t PLH
VOH
nY output
VM
VOL
mna224
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Figure 7. Inputs (nA, nB) to output (nY) propagation delays
Table 8. Measurement points
Supply voltage VCC
Input VI
VM
1.65 V to 1.95 V
VCC
0.5 x VCC
2.3 V to 2.7 V
VCC
0.5 x VCC
2.7 V
2.7 V
1.5 V
3.0 V to 3.6 V
2.7 V
1.5 V
74ALVC08
Product data sheet
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74ALVC08
Nexperia
Quad 2-input AND gate
VI
negative
pulse
tW
90 %
VM
0V
VI
positive
pulse
0V
VM
10 %
tf
tr
tr
tf
90 %
VM
VM
10 %
tW
VEXT
VCC
G
VI
RL
VO
DUT
RT
CL
RL
001aae331
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
VEXT = Test voltage for switching times.
Figure 8. Test circuit for measuring switching times
Table 9. Test data
Supply voltage
VCC
Input
VI
tr, tf
CL
RL
tPLH, tPHL
tPLZ, tPZL
tPHZ, tPZH
1.65 V to 1.95 V
VCC
≤ 2.0 ns
30 pF
1 kΩ
open
2 × VCC
GND
2.3 V to 2.7 V
VCC
≤ 2.0 ns
30 pF
500 Ω
open
2 × VCC
GND
2.7 V
2.7 V
≤ 2.5 ns
50 pF
500 Ω
open
6V
GND
3.0 V to 3.6 V
2.7 V
≤ 2.5 ns
50 pF
500 Ω
open
6V
GND
74ALVC08
Product data sheet
Load
VEXT
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74ALVC08
Nexperia
Quad 2-input AND gate
11 Package outline
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
c
y
HE
v M A
Z
8
14
A2
Q
A
(A 3)
A1
pin 1 index
θ
Lp
1
L
7
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
inches
0.069
0.010 0.057
0.004 0.049
0.01
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.05
0.01
0.01
0.004
0.028
0.012
0.244
0.039 0.028
0.041
0.228
0.016 0.024
θ
o
8
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT108-1
076E06
MS-012
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Figure 9. Package outline SOT108-1 (SO14)
74ALVC08
Product data sheet
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74ALVC08
Nexperia
Quad 2-input AND gate
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
D
SOT402-1
E
A
X
c
y
HE
v M A
Z
8
14
Q
A2
pin 1 index
(A 3 )
A1
A
θ
Lp
1
L
7
detail X
w M
bp
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
0.65
6.6
6.2
1
0.75
0.50
0.4
0.3
0.2
0.13
0.1
0.72
0.38
8o
0o
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT402-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
MO-153
Figure 10. Package outline SOT402-1 (TSSOP14)
74ALVC08
Product data sheet
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Rev. 3 — 5 October 2017
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9 / 14
74ALVC08
Nexperia
Quad 2-input AND gate
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm
B
D
SOT762-1
A
A
A1
E
c
detail X
terminal 1
index area
terminal 1
index area
C
e1
e
v
w
b
2
6
C A B
C
y
y1 C
L
1
7
Eh
e
14
8
k
13
9
Dh
X
k
0
2
Dimensions (mm are the original dimensions)
Unit
mm
max
nom
min
A(1)
1
A1
b
0.05 0.30
0.02 0.25
0.00 0.18
4 mm
scale
c
D(1)
Dh
E(1)
Eh
e
e1
0.2
3.1
3.0
2.9
1.65
1.50
1.35
2.6
2.5
2.4
1.15
1.00
0.85
0.5
2
k
L
v
0.2
0.5
0.4
0.3
0.1
w
y
0.05 0.05
y1
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
Outline
version
SOT762-1
References
IEC
JEDEC
JEITA
sot762-1_po
European
projection
Issue date
15-04-10
15-05-05
MO-241
Figure 11. Package outline SOT762-1 (DHVQFN14)
74ALVC08
Product data sheet
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74ALVC08
Nexperia
Quad 2-input AND gate
12 Abbreviations
Table 10. Abbreviations
Acronym
Description
CMOS
Complementary Metal-Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
TTL
Transistor-Transistor Logic
13 Revision history
Table 11. Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74ALVC08 v.3
20171005
Product data sheet
-
74ALVC08 v.2
Modifications:
• The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
• Legal texts have been adapted to the new company name where appropriate.
74ALVC08 v.2
20030516
Product specification
-
74ALVC08 v.1
74ALVC08 v.1
20030204
Product specification
-
-
74ALVC08
Product data sheet
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11 / 14
74ALVC08
Nexperia
Quad 2-input AND gate
14 Legal information
14.1 Data sheet status
Document status
[1][2]
Product status
[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product
development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple
devices. The latest product status information is available on the Internet at URL http://www.nexperia.com.
14.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the
relevant full data sheet, which is available on request via the local Nexperia
sales office. In case of any inconsistency or conflict with the short data sheet,
the full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
14.3 Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia. In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory. Notwithstanding any damages that
customer might incur for any reason whatsoever, Nexperia's aggregate and
cumulative liability towards customer for the products described herein shall
be limited in accordance with the Terms and conditions of commercial sale of
Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
74ALVC08
Product data sheet
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification. Customers are responsible for the
design and operation of their applications and products using Nexperia
products, and Nexperia accepts no liability for any assistance with
applications or customer product design. It is customer’s sole responsibility
to determine whether the Nexperia product is suitable and fit for the
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products. Nexperia does not accept
any liability related to any default, damage, costs or problem which is based
on any weakness or default in the customer’s applications or products, or
the application or use by customer’s third party customer(s). Customer is
responsible for doing all necessary testing for the customer’s applications
and products using Nexperia products in order to avoid a default of the
applications and the products or of the application or use by customer’s third
party customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or
the grant, conveyance or implication of any license under any copyrights,
patents or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 5 October 2017
© Nexperia B.V. 2017. All rights reserved.
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Nexperia
Quad 2-input AND gate
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications. In the event that customer
uses the product for design-in and use in automotive applications to
automotive specifications and standards, customer (a) shall use the product
without Nexperia's warranty of the product for such automotive applications,
use and specifications, and (b) whenever customer uses the product for
automotive applications beyond Nexperia's specifications such use shall be
solely at customer’s own risk, and (c) customer fully indemnifies Nexperia
for any liability, damages or failed product claims resulting from customer
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Product data sheet
design and use of the product for automotive applications beyond Nexperia's
standard warranty and Nexperia's product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
14.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 5 October 2017
© Nexperia B.V. 2017. All rights reserved.
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Quad 2-input AND gate
Contents
1
2
3
4
5
5.1
5.2
6
7
8
9
10
10.1
11
12
13
14
General description ............................................ 1
Features and benefits .........................................1
Ordering information .......................................... 1
Functional diagram ............................................. 2
Pinning information ............................................ 2
Pinning ............................................................... 2
Pin description ................................................... 3
Functional description ........................................3
Limiting values .................................................... 3
Recommended operating conditions ................ 4
Static characteristics .......................................... 4
Dynamic characteristics .....................................5
Waveforms and test circuit ................................ 6
Package outline ...................................................8
Abbreviations .................................................... 11
Revision history ................................................ 11
Legal information .............................................. 12
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section 'Legal information'.
© Nexperia B.V. 2017.
All rights reserved.
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 5 October 2017
Document identifier: 74ALVC08