74ALVC74
Dual D-type flip-flop with set and reset; positive-edge trigger
Rev. 4 — 16 August 2017
1
Product data sheet
General description
The 74ALVC74 is a dual positive edge triggered, D-type flip-flop. It has individual data
(nD) inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and
nQ outputs.
The set and reset are asynchronous active LOW inputs that operate independently
of the clock input. Information on the data input is transferred to the nQ output on the
LOW-to-HIGH transition of the clock pulse. The nD inputs must be stable one set-up
time prior to the LOW-to-HIGH clock transition, for predictable operation. Schmitt-trigger
action in the clock input makes the circuit highly tolerant to slower clock rise and fall
times.
2
Features and benefits
• Wide supply voltage range from 1.65 V to 3.6 V
• Complies with JEDEC standard:
– JESD8-7 (1.65 to 1.95 V)
– JESD8-5 (2.3 to 2.7 V)
– JESD8B/JESD36 (2.7 to 3.6 V)
• 3.6 V tolerant inputs/outputs
• CMOS low power consumption
• Direct interface with TTL levels (2.7 V to 3.6 V)
• Power-down mode
• Latch-up performance exceeds 250 mA
• ESD protection:
– HBM JESD22-A114-A exceeds 2000 V
– MM JESD22-A115-A exceeds 200 V
• Specified from -40 °C to +85 °C
74ALVC74
Nexperia
Dual D-type flip-flop with set and reset; positive-edge trigger
3
Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
Name
Description
Version
74ALVC74D
-40 °C to +85 °C
SO14
plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74ALVC74PW
-40 °C to +85 °C
TSSOP14
plastic thin shrink small outline package;
14 leads; body width 4.4 mm
SOT402-1
74ALVC74BQ
-40 °C to +85 °C
DHVQFN14
plastic dual in-line compatible thermal
enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm
SOT762-1
4
Functional diagram
4
4 10
1SD 2SD
2
12
1D
D
2D
SD
3 1CP
CP
11 2CP
2
1Q
Q
2Q
5
9
1
FF
RD
1Q
Q
2Q
10
6
8
C1
1D
R
1RD 2RD
13
1 13
C2
2D
74ALVC74
Product data sheet
8
R
aaa-008836
Figure 1. Logic symbol
6
9
S
11
12
5
S
3
aaa-008837
Figure 2. IEC logic symbol
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2 / 18
74ALVC74
Nexperia
Dual D-type flip-flop with set and reset; positive-edge trigger
4
1SD
2
1D
3
1CP
SD
D
Q
CP
1Q
5
1Q
6
2Q
9
2Q
8
FF1
Q
RD
1
1RD
10
2SD
12
2D
11
2CP
SD
Q
D
CP
FF2
Q
RD
13
2RD
aaa-008838
Figure 3. Functional diagram
Q
C
C
C
C
C
C
D
Q
C
C
RD
SD
CP
C
aaa-008839
C
Figure 4. Logic diagram (one flip-flop)
74ALVC74
Product data sheet
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3 / 18
74ALVC74
Nexperia
Dual D-type flip-flop with set and reset; positive-edge trigger
5
Pinning information
5.1 Pinning
1
terminal 1
index area
1D
2
13 2RD
1CP
3
12 2D
1SD
4
11 2CP
1Q
5
10 2SD
1Q
6
9
2Q
GND
7
8
2Q
3
12 2D
1SD
4
11 2CP
1Q
5
1Q
6
74ALVC74
1RD
1
1D
2
14 VCC
13 2RD
1CP
3
12 2D
1SD
4
11 2CP
1Q
5
10 2SD
1Q
6
9
2Q
GND
7
8
2Q
aaa-027303
aaa-027304
GND(1)
13 2RD
10 2SD
9
8
14 VCC
1CP
2Q
1
2
7
1RD
1D
GND
74ALVC74
14 VCC
1RD
74ALVC74
2Q
aaa-027305
Transparent top view
(1) This is not a supply pin. The substrate
is attached to this pad using conductive die
attach material. There is no electrical or
mechanical requirement to solder this pad.
However, if it is soldered, the solder land
should remain floating or be connected to
GND.
Figure 5. Pin configuration SO14 Figure 6. Pin configuration TSSOP14 Figure 7. Pin configuration DHVQFN14
5.2 Pin description
Table 2. Pin description
Symbol
Pin
Description
1RD
1
asynchronous reset-direct input (active-LOW)
1D
2
data input
1CP
3
clock input (LOW-to-HIGH), edge-triggered
1SD
4
asynchronous set-direct input (active-LOW)
1Q
5
true flip-flop output
1Q
6
complement flip-flop output
GND
7
ground (0 V)
2Q
8
complement flip-flop output
2Q
9
true flip-flop output
2SD
10
asynchronous set-direct input (active-LOW)
2CP
11
clock input (LOW-to-HIGH), edge-triggered
2D
12
data input
2RD
13
asynchronous reset-direct input (active-LOW)
VCC
14
supply voltage
74ALVC74
Product data sheet
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4 / 18
74ALVC74
Nexperia
Dual D-type flip-flop with set and reset; positive-edge trigger
6
Functional description
Table 3. Function table
[1]
Input
Output
nSD
nRD
nCP
nD
nQ
nQ
nQn+1
nQn+1
L
H
X
X
H
L
-
-
H
L
X
X
L
H
-
-
L
L
X
X
H
H
-
-
H
H
↑
L
-
-
L
H
H
H
↑
H
-
-
H
L
[1]
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
↑ = LOW-to-HIGH clock transition;
nQn+1 = state after the next LOW-to-HIGH CP transition
7
Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
VCC
Conditions
supply voltage
VI
VO
Min
Max
Unit
-0.5
+4.6
V
input voltage
[1]
-0.5
+4.6
V
output voltage
[1]
-0.5
[1] [2]
-0.5
+4.6
-50
-
mA
Power-down mode
VCC + 0.5 V
V
IIK
input clamping current
VI < 0 V
IOK
output clamping current
VO > VCC or VO < 0 V
-
±50
mA
IO
output current
VO = 0 V to VCC
-
±50
mA
ICC
supply current
-
100
mA
IGND
ground current
-100
-
mA
Tstg
storage temperature
-65
+150
°C
-
500
mW
Ptot
[1]
[2]
[3]
total power dissipation
Tamb = -40 °C to +85 °C
[3]
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
When VCC = 0 V (Power-down mode), the output voltage can be 3.6 V in normal operation.
For SO14 packages: above 70 °C derate linearly with 8 mW/K.
For TSSOP14 packages: above 60 °C derate linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60 °C derate linearly with 4.5 mW/K.
74ALVC74
Product data sheet
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5 / 18
74ALVC74
Nexperia
Dual D-type flip-flop with set and reset; positive-edge trigger
8
Recommended operating conditions
Table 5. Recommended operating conditions
Symbol Parameter
VCC
supply voltage
VI
input voltage
VO
output voltage
Conditions
Min
Max
1.65
3.6
V
0
3.6
V
VCC = 1.65 to 3.6 V
0
VCC
V
VCC = 0 V; Power-down mode
0
3.6
V
-40
+85
°C
0
20
ns/V
0
10
ns/V
Max
Unit
Tamb
ambient temperature
in free air
Δt/ΔV
input transition rise and fall rate VCC = 1.65 V to 2.7 V
VCC = 2.7 V to 3.6 V
9
Unit
Static characteristics
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
VIH
VCC = 1.65 V to 1.95 V
VIL
VOH
VOL
HIGH-level input
voltage
LOW-level input
voltage
HIGH-level output
voltage
LOW-level output
voltage
74ALVC74
Product data sheet
Min
Typ
[1]
0.65 × VCC
-
-
V
VCC = 2.3 V to 2.7 V
1.7
-
-
V
VCC = 2.7 V to 3.6 V
2.0
-
-
V
VCC = 1.65 V to 1.95 V
-
-
VCC = 2.3 V to 2.7 V
-
-
0.7
V
VCC = 2.7 V to 3.6 V
-
-
0.8
V
VCC - 0.2
-
-
V
VCC = 1.65 V; IO = -6 mA
1.25
1.51
-
V
VCC = 2.3 V; IO = -12 mA
1.8
2.10
-
V
VCC = 2.3 V; IO = -18 mA
1.7
2.01
-
V
VCC = 2.7 V; IO = -12 mA
2.2
2.53
-
V
VCC = 3.0 V; IO = -18 mA
2.4
2.76
-
V
VCC = 3.0 V; IO = -24 mA
2.2
2.68
-
V
VCC = 1.65 V to 3.6 V; IO = 100 μA
-
-
0.2
V
VCC = 1.65 V; IO = 6 mA
-
0.11
0.3
V
VCC = 2.3 V; IO = 12 mA
-
0.17
0.4
V
VCC = 2.3 V; IO = 18 mA
-
0.25
0.6
V
VCC = 2.7 V; IO = 12 mA
-
0.16
0.4
V
VCC = 3.0 V; IO = 18 mA
-
0.23
0.4
V
VCC = 3.0 V; IO = 24 mA
-
0.30
0.55
V
0.35 × VCC V
VI = VIH or VIL
VCC = 1.65 V to 3.6 V; IO = -100 μA
VI = VIH or VIL
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74ALVC74
Nexperia
Dual D-type flip-flop with set and reset; positive-edge trigger
Conditions
II
input leakage current
VCC = 3.6 V; VI = VCC or GND
-
±0.1
±5
μA
IOFF
power-off leakage
current
VCC = GND; VI or VO = 3.6 V
-
±0.1
±10
μA
ICC
supply current
VCC = 3.6 V; VI = VCC or GND; IO = 0 A
-
0.2
10
μA
ΔICC
additional supply
current
VCC = 3.0 V to 3.6 V; VI = VCC – 0.6 V;
IO = 0 A
-
5
750
μA
CI
input capacitance
-
3.5
-
pF
[1]
Min
[1]
Symbol Parameter
Typ
Max
Unit
Typical values are measured at Tamb = 25 °C.
10 Dynamic characteristics
Table 7. Dynamic characteristics
GND (ground = 0 V): for test circuit, see Figure 10
Symbol Parameter
Conditions
tpd
nCP to nQ, nQ; see Figure 8
propagation
delay
[1]
Min
Typ
Max
Unit
VCC = 1.65 to 1.95 V
1.0
3.7
6.2
ns
VCC = 2.3 to 2.7 V
1.0
2.6
4.2
ns
VCC = 2.7 V
1.0
2.8
4.2
ns
VCC = 3.0 V to 3.6 V
1.0
2.7
3.8
ns
VCC = 1.65 to 1.95 V
1.0
3.4
5.4
ns
VCC = 2.3 to 2.7 V
1.0
2.4
3.8
ns
VCC = 2.7 V
1.0
3.2
4.2
ns
VCC = 3.0 V to 3.6 V
1.0
2.3
3.5
ns
VCC = 1.65 to 1.95 V
1.0
3.5
5.4
ns
VCC = 2.3 to 2.7 V
1.0
2.5
3.8
ns
VCC = 2.7 V
1.0
3.1
4.3
ns
VCC = 3.0 V to 3.6 V
1.0
2.3
3.5
ns
[2]
nSD to nQ, nQ; see Figure 9
nRD to nQ, nQ; see Figure 9
74ALVC74
Product data sheet
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74ALVC74
Nexperia
Dual D-type flip-flop with set and reset; positive-edge trigger
Symbol Parameter
Conditions
tW
nCP; HIGH or LOW; see Figure 8
pulse width
[1]
Min
Typ
Max
Unit
VCC = 1.65 to 1.95 V
2.5
0.9
-
ns
VCC = 2.3 to 2.7 V
2.5
0.6
-
ns
VCC = 2.7 V
2.5
1.3
-
ns
VCC = 3.0 V to 3.6 V
2.5
1.3
-
ns
VCC = 1.65 to 1.95 V
2.5
0.9
-
ns
VCC = 2.3 to 2.7 V
2.5
0.9
-
ns
VCC = 2.7 V
2.5
1.0
-
ns
VCC = 3.0 V to 3.6 V
2.5
0.7
-
ns
VCC = 1.65 to 1.95 V
0.7
−0.2
-
ns
VCC = 2.3 to 2.7 V
0.7
−0.1
-
ns
VCC = 2.7 V
0.7
−0.1
-
ns
VCC = 3.0 V to 3.6 V
0.7
−0.1
-
ns
VCC = 1.65 to 1.95 V
1.2
0.6
-
ns
VCC = 2.3 to 2.7 V
1.2
0.8
-
ns
VCC = 2.7 V
0.9
0.5
-
ns
VCC = 3.0 V to 3.6 V
0.8
0.4
-
ns
VCC = 1.65 to 1.95 V
0.6
−0.4
-
ns
VCC = 2.3 to 2.7 V
0.6
−0.3
-
ns
VCC = 2.7 V
0.7
−0.4
-
ns
VCC = 3.0 V to 3.6 V
0.8
−0.1
-
ns
VCC = 1.65 to 1.95 V
150
275
-
MHz
VCC = 2.3 to 2.7 V
200
325
-
MHz
VCC = 2.7 V
250
375
-
MHz
300
425
-
MHz
-
35
-
pF
nSD or nRD; LOW; see Figure 9
trec
recovery time
tsu
set-up time
th
hold time
fmax
maximum frequency
nRD to nCP; see Figure 9
nD to nCP; see Figure 8
nD to nCP; see Figure 8
nCP; see Figure 8
VCC = 3.0 V to 3.6 V
CPD
[1]
[2]
[3]
power dissipation
capacitance
per buffer; VI = GND to VCC; VCC = 3.3 V
[3]
Typical values are measured at Tamb = 25 °C.
Typical values are measured at VCC = 1.8 V for VCC = 1.65 V to 1.95 V.
Typical values are measured at VCC = 2.5 V for VCC = 2.3 V to 2.7 V.
Typical values are measured at VCC = 3.3 V for VCC = 3.0 V to 3.6 V
tpd is the same as tPHL and tPLH.
2
2
CPD is used to determine the dynamic power dissipation PD = CPD x VCC x fi x N + Σ (CL x VCC x fo), where:
PD in μW
fi = input frequency in MHz;
74ALVC74
Product data sheet
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74ALVC74
Nexperia
Dual D-type flip-flop with set and reset; positive-edge trigger
fo = output frequency in MHz;
N = total load switching outputs
2
Σ (CL x VCC x fo) = sum of outputs;
CL = output load capacitance in pF;
VCC = supply voltage in V.
10.1 Waveforms and test circuit
VI
nD input
VM
GND
tsu
th
1/fmax
VI
nCP input
tsu
th
VM
GND
tPHL
VOH
nQ output
tW
tPLH
VM
VOL
VOH
nQ output
VM
VOL
tPLH
tPHL
aaa-008840
Measurement points are given in Table 8.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Figure 8. Clock pulse (nCP) to output (nQ, nQ) propagation delays, nCP pulse width, the nD to nCP set-up times,
the nCP to nD hold times and maximum frequency
74ALVC74
Product data sheet
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Rev. 4 — 16 August 2017
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9 / 18
74ALVC74
Nexperia
Dual D-type flip-flop with set and reset; positive-edge trigger
VI
nCP input
VM
GND
trec
VI
nSD input
VM
GND
tW
VI
tW
VM
nRD input
GND
tPLH
VOH
nQ output
tPHL
VM
VOL
VOH
nQ output
VM
VOL
tPHL
tPLH
aaa-008842
Measurement points are given in Table 8.
Figure 9. Set (nSD) and reset (nRD) input to output (nQ, nQ) propagation delays, set (nSD) and reset (nRD) pulse
widths and nRD to nCP recovery time
Table 8. Measurement points
Supply voltage
Input
VCC
VI
VM
VM
1.65 V to 1.95 V
VCC
0.5VCC
0.5VCC
2.3 V to 2.7 V
VCC
0.5VCC
0.5VCC
2.7 V
2.7 V
1.5 V
1.5 V
3.0 V to 3.6 V
2.7 V
1.5 V
1.5 V
74ALVC74
Product data sheet
Output
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74ALVC74
Nexperia
Dual D-type flip-flop with set and reset; positive-edge trigger
VI
negative
pulse
tW
90 %
VM
0V
VI
positive
pulse
0V
VM
10 %
tf
tr
tr
tf
90 %
VM
VM
10 %
tW
VEXT
VCC
G
VI
RL
VO
DUT
RT
CL
RL
001aae331
Test data is given in Table 9.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Figure 10. Test circuit for measuring switching times
Table 9. Test data
Supply voltage
Input
VEXT
Load
VI
tr, tf
CL
RL
tPHL, tPLH
1.65 V to 1.95 V
VCC
≤ 2.0 ns
30 pF
1 kΩ
open
2.3 V to 2.7 V
VCC
≤ 2.0 ns
30 pF
500 Ω
open
2.7 V
2.7 V
≤ 2.5 ns
50 pF
500 Ω
open
3.0 V to 3.6 V
2.7 V
≤ 2.5 ns
50 pF
500 Ω
open
74ALVC74
Product data sheet
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11 / 18
74ALVC74
Nexperia
Dual D-type flip-flop with set and reset; positive-edge trigger
11 Package outline
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
c
y
HE
v M A
Z
8
14
A2
Q
A
(A 3)
A1
pin 1 index
θ
Lp
1
L
7
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
inches
0.069
0.010 0.057
0.004 0.049
0.01
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.05
0.01
0.01
0.004
0.028
0.012
0.244
0.039 0.028
0.041
0.228
0.016 0.024
θ
o
8
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT108-1
076E06
MS-012
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Figure 11. Package outline SOT108-1 (SO14)
74ALVC74
Product data sheet
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12 / 18
74ALVC74
Nexperia
Dual D-type flip-flop with set and reset; positive-edge trigger
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
D
SOT402-1
E
A
X
c
y
HE
v M A
Z
8
14
Q
A2
pin 1 index
(A 3 )
A1
A
θ
Lp
1
L
7
detail X
w M
bp
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
θ
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
0.65
6.6
6.2
1
0.75
0.50
0.4
0.3
0.2
0.13
0.1
0.72
0.38
8o
0o
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT402-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-18
MO-153
Figure 12. Package outline SOT402-1 (TSSOP14)
74ALVC74
Product data sheet
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Rev. 4 — 16 August 2017
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74ALVC74
Nexperia
Dual D-type flip-flop with set and reset; positive-edge trigger
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm
B
D
SOT762-1
A
A
A1
E
c
detail X
terminal 1
index area
terminal 1
index area
C
e1
e
v
w
b
2
6
C A B
C
y
y1 C
L
1
7
Eh
e
14
8
k
13
9
Dh
X
k
0
2
Dimensions (mm are the original dimensions)
Unit
mm
max
nom
min
A(1)
1
A1
b
0.05 0.30
0.02 0.25
0.00 0.18
4 mm
scale
c
D(1)
Dh
E(1)
Eh
e
e1
0.2
3.1
3.0
2.9
1.65
1.50
1.35
2.6
2.5
2.4
1.15
1.00
0.85
0.5
2
k
L
v
0.2
0.5
0.4
0.3
0.1
w
y
0.05 0.05
y1
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
Outline
version
SOT762-1
References
IEC
JEDEC
JEITA
sot762-1_po
European
projection
Issue date
15-04-10
15-05-05
MO-241
Figure 13. Package outline SOT762-1 (DHVQFN14)
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Product data sheet
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Rev. 4 — 16 August 2017
© Nexperia B.V. 2017. All rights reserved.
14 / 18
74ALVC74
Nexperia
Dual D-type flip-flop with set and reset; positive-edge trigger
12 Abbreviations
Table 10. Abbreviations
Acronym
Description
CMOS
Complementary Metal-Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
TTL
Transistor-Transistor Logic
13 Revision history
Table 11. Revision history
Document ID
Release date
Data sheet status Change notice Supersedes
74ALVC74 v.4
20170816
Product data sheet
Modifications:
• The format of this data sheet has been redesigned to comply with the identity guidelines
of Nexperia.
• Legal texts have been adapted to the new company name where appropriate.
74ALVC74 v.3
20030526
Product specification -
74ALVC74 v.2
74ALVC74 v.2
20030124
Product specification -
74ALVC74 v.1
74ALVC74 v.1
20021115
Product specification -
-
74ALVC74
Product data sheet
-
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Rev. 4 — 16 August 2017
74ALVC74 v.3
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15 / 18
74ALVC74
Nexperia
Dual D-type flip-flop with set and reset; positive-edge trigger
14 Legal information
14.1 Data sheet status
Document status
[1][2]
Product status
[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product
development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple
devices. The latest product status information is available on the Internet at URL http://www.nexperia.com.
14.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the
relevant full data sheet, which is available on request via the local Nexperia
sales office. In case of any inconsistency or conflict with the short data sheet,
the full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
14.3 Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia. In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory. Notwithstanding any damages that
customer might incur for any reason whatsoever, Nexperia's aggregate and
cumulative liability towards customer for the products described herein shall
be limited in accordance with the Terms and conditions of commercial sale of
Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
74ALVC74
Product data sheet
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification. Customers are responsible for the
design and operation of their applications and products using Nexperia
products, and Nexperia accepts no liability for any assistance with
applications or customer product design. It is customer’s sole responsibility
to determine whether the Nexperia product is suitable and fit for the
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products. Nexperia does not accept
any liability related to any default, damage, costs or problem which is based
on any weakness or default in the customer’s applications or products, or
the application or use by customer’s third party customer(s). Customer is
responsible for doing all necessary testing for the customer’s applications
and products using Nexperia products in order to avoid a default of the
applications and the products or of the application or use by customer’s third
party customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or
the grant, conveyance or implication of any license under any copyrights,
patents or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 16 August 2017
© Nexperia B.V. 2017. All rights reserved.
16 / 18
74ALVC74
Nexperia
Dual D-type flip-flop with set and reset; positive-edge trigger
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications. In the event that customer
uses the product for design-in and use in automotive applications to
automotive specifications and standards, customer (a) shall use the product
without Nexperia's warranty of the product for such automotive applications,
use and specifications, and (b) whenever customer uses the product for
automotive applications beyond Nexperia's specifications such use shall be
solely at customer’s own risk, and (c) customer fully indemnifies Nexperia
for any liability, damages or failed product claims resulting from customer
74ALVC74
Product data sheet
design and use of the product for automotive applications beyond Nexperia's
standard warranty and Nexperia's product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
14.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
All information provided in this document is subject to legal disclaimers.
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74ALVC74
Nexperia
Dual D-type flip-flop with set and reset; positive-edge trigger
Contents
1
2
3
4
5
5.1
5.2
6
7
8
9
10
10.1
11
12
13
14
General description ............................................ 1
Features and benefits .........................................1
Ordering information .......................................... 2
Functional diagram ............................................. 2
Pinning information ............................................ 4
Pinning ............................................................... 4
Pin description ................................................... 4
Functional description ........................................5
Limiting values .................................................... 5
Recommended operating conditions ................ 6
Static characteristics .......................................... 6
Dynamic characteristics .....................................7
Waveforms and test circuit ................................ 9
Package outline .................................................12
Abbreviations .................................................... 15
Revision history ................................................ 15
Legal information .............................................. 16
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section 'Legal information'.
© Nexperia B.V. 2017.
All rights reserved.
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 16 August 2017
Document identifier: 74ALVC74