74ALVCH16543
16-bit D-type registered transceiver; 3-state
Rev. 3 — 15 December 2017
1
Product data sheet
General description
The 74ALVCH16543 is a dual octal registered transceiver. Each section contains two
sets of D-type latches for temporary storage of the data flow in either direction.
Separate latch enable (nLEAB, nLEBA) and output enable (nOEAB, nOEBA) inputs are
provided for each register to permit independent control in either direction of the data
flow.
The 74ALVCH16543 contains two sections each consisting of two sets of eight D-type
latches with separate inputs and controls for each set. For data flow from A to B,
for example, the A-to-B enable (nEAB) inputs must be LOW in order to enter
data from nA0 to nA7, or take data from nB0 to nB7, as indicated in the function
table. With nEAB LOW, a LOW signal on the A-to-B latch enable (nLEAB) input
makes the A-to-B latches transparent; a subsequent LOW-to-HIGH transition of the
nLEAB signal stores the A data into the latches. With nEAB and nOEAB both LOW,
the 3-state B output buffers are active and display the data present at the output of
the A latches. Similarly, the nEBA, nLEBA and nOEBA signals control the data flow
from B-to-A.
Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic
level.
2
Features and benefits
•
•
•
•
•
•
•
•
•
•
CMOS low power consumption
Direct interface with TTL levels
MULTIBYTE flow-through standard pin-out architecture
Back-to-back registers for storage
Output drive capability 50 Ω transmission lines at 85 °C
All data inputs have bushold
Low inductance multiple VCC and GND pins for minimize noise and ground bounce
Current drive ±24 mA at VCC = 3.0 V.
3-state non-inverting outputs for bus oriented applications
Complies with JEDEC standards:
– JESD8-5 (2.3 V to 2.7 V)
– JESD8B/JESD36 (2.7 V to 3.6 V)
• ESD protection:
– HBM ANSI/ESDA/JEDEC JS-001 exceeds 2000 V
– CDM JESD22-C101E exceeds 1000 V
74ALVCH16543
Nexperia
16-bit D-type registered transceiver; 3-state
3
Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
74ALVCH16543DGG -40 °C to +85 °C
4
TSSOP56
Description
Version
plastic thin shrink small outline package;
56 leads; body width 6.1 mm
SOT364-1
Functional diagram
5
6
8
9
10
12
13
14
1
56
3
54
2
55
1A0
1B0
1A1
1B1
1A2
1B2
1A3
1B3
1A4
1B4
1A5
1B5
1A6
1B6
1A7
1B7
52
15
51
16
49
17
48
19
47
20
45
21
44
23
43
24
2A0
2B0
2A1
2B1
2A2
2B2
2A3
2B3
2A4
2B4
2A5
2B5
2A6
2B6
2A7
2B7
1OEAB
2OEAB
1OEBA
2OEBA
1EAB
2EAB
1EBA
2EBA
1LEAB
2LEAB
1LEBA
2LEBA
42
41
40
38
37
36
34
33
28
29
26
31
27
30
aaa-027924
Figure 1. Logic symbol
56
1EN3 (BA)
29
7EN9 (BA)
54
G1
31
G7
55
1C5
30
7C11
1
2EN4 (AB)
28
8EN10 (AB)
3
G2
26
G8
2
2C6
27
8C12
5
3
6D
5D
52
15
4
9
12D
11D
42
10
6
51
16
41
8
49
17
40
9
48
19
38
10
47
20
37
12
45
21
36
13
44
23
34
14
43
24
33
aaa-027925
Figure 2. IEC logic symbol
74ALVCH16543
Product data sheet
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2 / 17
74ALVCH16543
Nexperia
16-bit D-type registered transceiver; 3-state
nOEBA
nEBA
nLEBA
nOEAB
nEAB
nLEAB
LE
Q
nA1
D
nB1
LE
Q
8 IDENTICAL
CHANNELS
D
to 7 other channels
aaa-027926
Figure 3. Logic diagram
VCC
data
input
to internal circuit
mna004
Figure 4. Bushold circuit
74ALVCH16543
Product data sheet
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3 / 17
74ALVCH16543
Nexperia
16-bit D-type registered transceiver; 3-state
5
Pinning information
5.1 Pinning
74ALVCH16543
1OEAB
1
56 1OEBA
1LEAB
2
55 1LEBA
1EAB
3
54 1EBA
GND
4
53 GND
1A0
5
52 1B0
1A1
6
51 1B1
VCC
7
1A2
8
50 VCC
49 1B2
1A3
9
48 1B3
1A4 10
47 1B4
GND 11
46 GND
1A5 12
45 1B5
1A6 13
44 1B6
1A7 14
43 1B7
2A0 15
42 2B0
2A1 16
41 2B1
2A2 17
40 2B2
GND 18
39 GND
2A3 19
38 2B3
2A4 20
37 2B4
2A5 21
36 2B5
VCC 22
2A6 23
35 VCC
34 2B6
2A7 24
33 2B7
GND 25
32 GND
2EAB 26
31 2EBA
2LEAB 27
30 2LEBA
2OEAB 28
29 2OEBA
aaa-027927
Figure 5. Pin configuration for TSSOP56
74ALVCH16543
Product data sheet
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4 / 17
74ALVCH16543
Nexperia
16-bit D-type registered transceiver; 3-state
5.2 Pin description
Table 2. Pin description
Symbol
Pin
Description
1A0, 1A1, 1A2, 1A3, 1A4, 1A5, 1A6, 1A7
5, 6, 8, 9, 10, 12, 13, 14
data inputs/outputs
2A0, 2A1, 2A2, 2A3, 2A4, 2A5, 2A6, 2A7
15, 16, 17, 19, 20, 21, 23, 24
data inputs/outputs
1B0, 1B1, 1B2, 1B3, 1B4, 1B5, 1B6, 1B7
52, 51, 49, 48, 47, 45, 44, 43
data inputs/outputs
2B0, 2B1, 2B2, 2B3, 2B4, 2B5, 2B6, 2B7
42, 41, 40, 38, 37, 36, 34, 33
data inputs/outputs
1OEAB, 2OEAB
1, 28
A to B output enable inputs (active LOW)
1OEBA, 2OEBA
56, 29
B to A output enable inputs (active LOW)
1EAB, 2EAB
3, 26
A to B enable inputs (active LOW)
1EBA, 2EBA
54, 31
B to A enable inputs (active LOW)
1LEAB, 2LEAB
2, 27
A to B latch enable inputs (active LOW)
1LEBA, 2LEBA
55, 30
B to A latch enable inputs (active LOW)
GND
4, 11, 18, 25, 32, 39, 46, 53
ground (0 V)
VCC
7, 22, 35, 50
supply voltage
6
Functional description
Table 3. Function selection
[1]
Outputs
Inputs
Status
nOEAB or nOEBA nEAB or nEBA
nLEAB or nLEBA nAn or nBn
nBn or nAn
H
X
X
X
Z
disabled
X
H
X
X
Z
disabled
L
↑
L
h
Z
disabled + latch
L
↑
L
l
Z
disabled + latch
L
L
↑
h
H
latch + display
L
L
↑
l
L
latch + display
L
L
L
H
H
transparent
L
L
L
L
L
transparent
L
L
H
X
NC
hold
[1] H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH transition of nLEAB, nLEBA, nEAB or nEBA;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH transition of nLEAB, nLEBA, nEAB or nEBA;
X = don’t care;
↑ = LOW-to-HIGH transition of nLEAB, nLEBA, nEAB or nEBA;
NC = no change;
Z = high-impedance OFF-state.
74ALVCH16543
Product data sheet
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74ALVCH16543
Nexperia
16-bit D-type registered transceiver; 3-state
7
Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
Conditions
Min
Max
Unit
-0.5
+4.6
V
input voltage
[1]
-0.5
+4.6
V
VO
output voltage
[1]
-0.5
VCC + 0.5
V
IIK
input clamping current
VI < 0 V
-50
-
mA
IOK
output clamping current
VO > VCC or VO < 0 V
-
±50
mA
IO
output current
VO = 0 V to VCC
-
±50
mA
ICC
supply current
-
100
mA
IGND
ground current
-100
-
mA
Tstg
storage temperature
-65
+150
°C
-
600
mW
VI
Ptot
total power dissipation
Tamb = -40 °C to +85 °C
[2]
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] Above 55 °C the value of Ptot derates linearly with 8 mW/K.
8
Recommended operating conditions
Table 5. Recommended operating conditions
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VCC
supply voltage
maximum speed performance
CL = 30 pF
2.3
2.5
2.7
V
CL = 50 pF
3.0
3.3
3.6
V
1.2
2.4
3.6
V
low-voltage applications
VI
input voltage
0
-
VCC
V
VO
output voltage
0
-
VCC
V
Tamb
ambient temperature
in free air
-40
-
+85
°C
Δt/ΔV
input transition rise and fall rate
VCC = 2.3 V to 3.0 V
-
-
20
ns/V
VCC = 3.0 V to 3.6 V
-
-
10
ns/V
74ALVCH16543
Product data sheet
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74ALVCH16543
Nexperia
16-bit D-type registered transceiver; 3-state
9
Static characteristics
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Tamb = -40 °C to +85 °C
[1]
Symbol
Parameter
Conditions
Min
Typ
VIH
HIGH-level
input voltage
VCC = 2.3 V to 2.7 V
1.7
1.2
-
V
VCC = 2.7 V to 3.6 V
2.0
1.5
-
V
LOW-level
input voltage
VCC = 2.3 V to 2.7 V
-
1.2
0.7
V
VCC = 2.7 V to 3.6 V
-
1.5
0.8
V
HIGH-level
output voltage
VI = VIH or VIL
IO = -100 μA; VCC = 2.3 V to 3.6 V
VCC - 0.2
VCC
-
V
IO = -6 mA; VCC = 2.3 V
VCC - 0.3
VCC - 0.08
-
V
IO = -12 mA; VCC = 2.3 V
VCC - 0.6
VCC - 0.26
-
V
IO = -12 mA; VCC = 2.7 V
VCC - 0.5
VCC - 0.14
-
V
IO = -12 mA; VCC = 3.0 V
VCC - 0.6
VCC - 0.09
-
V
IO = -24 mA; VCC = 3.0 V
VCC - 1.0
VCC - 0.28
-
V
IO = 100 μA; VCC = 2.3 V to 3.6 V
-
GND
0.20
V
IO = 6 mA; VCC = 2.3 V
-
0.07
0.40
V
IO = 12 mA; VCC = 2.3 V
-
0.15
0.70
V
IO = 12 mA; VCC = 2.7 V
-
0.14
0.40
V
IO = 24 mA; VCC = 3.0 V
-
0.27
0.55
V
VIL
VOH
VOL
LOW-level
output voltage
Max
Unit
VI = VIH or VIL
II
input
leakage current
VCC = 2.3 V to 3.6 V; VI = VCC or GND
-
0.1
5
μA
IOZ
OFF-state
output current
VCC = 2.3 V to 3.6 V; VI = VIH or VIL;
VO = VCC or GND
-
0.1
10
μA
ICC
supply current
VCC = 2.3 V to 3.6 V; VI = VCC or GND;
IO = 0 A
-
0.2
40
μA
ΔICC
additional
supply current
per data I/O pin; VCC = 2.3 V to 3.6 V;
VI = VCC - 0.6 V; IO = 0 A
-
150
750
μA
IBHL
bus hold LOW
current
VCC = 2.3 V; VI = 0.7 V
45
-
-
μA
VCC = 3.0 V; VI = 0.8 V
75
150
-
μA
bus hold HIGH
current
VCC = 2.3 V; VI = 1.7 V
-45
-
-
μA
VCC = 3.0 V; VI = 2.0 V
-75
-175
-
μA
IBHLO
bus hold LOW
overdrive current
VCC = 3.6 V
500
-
-
μA
IBHHO
bus hold HIGH
overdrive current
VCC = 3.6 V
-500
-
-
μA
CI
input capacitance
-
4.0
-
pF
IBHH
[1] All typical values are measured at Tamb = 25 °C.
74ALVCH16543
Product data sheet
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74ALVCH16543
Nexperia
16-bit D-type registered transceiver; 3-state
10 Dynamic characteristics
Table 7. Dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V);
for test circuit see Figure 10. Tamb = -40 °C to +85 °C
Symbol
tpd
Parameter
propagation delay
Conditions
Typ
1.0
[1]
Max
Unit
3.4
5.1
ns
-
2.9
4.8
ns
1.0
3.8
4.3
ns
1.0
3.3
6.5
ns
-
3.6
6.2
ns
1.4
3.1
5.0
ns
1.0
3.3
6.8
ns
-
3.4
6.3
ns
1.0
2.9
5.3
ns
1.0
3.3
7.2
ns
-
3.5
6.9
ns
1.0
3.0
5.6
ns
1.0
2.9
5.7
ns
-
3.3
4.8
ns
1.0
3.2
4.6
ns
1.3
3.3
6.1
ns
-
3.5
6.2
ns
1.1
3.3
5.1
ns
VCC = 2.3 V to 2.7 V
3.3
1.2
-
ns
VCC = 2.7 V
3.3
1.3
-
ns
VCC = 3.0 V to 3.6 V
3.3
0.9
-
ns
VCC = 2.3 V to 2.7 V
1.2
0.2
-
ns
VCC = 2.7 V
0.8
0.2
-
ns
VCC = 3.0 V to 3.6 V
1.3
0.1
-
ns
nAn to nBn; nBn to nAn; see Figure 6
Min
[2]
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
nLEAB to nBn; nLEBA to nAn; see Figure 7
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
ten
enable time
nOEBA to nAn; nOEAB to nBn; see Figure 8
[3]
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
nEBA to nAn; nEAB to nBn; see Figure 8
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
tdis
disable time
nOEBA to nAn; nOEAB to nBn; see Figure 8
[4]
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
nEBA to nAn; nEAB to nBn; see Figure 8
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
tW
tsu
pulse width
set-up time
74ALVCH16543
Product data sheet
nLEAB, nLEBA LOW; see Figure 7
nAn to nLEAB; nBn to nLEBA;
nAn to nEAB; nBn to nEBA; see Figure 9
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74ALVCH16543
Nexperia
16-bit D-type registered transceiver; 3-state
Symbol
Parameter
Conditions
th
hold time
nAn to nLEAB; nBn to nLEBA;
nAn to nEAB; nBn to nEBA; see Figure 9
Typ
VCC = 2.3 V to 2.7 V
1.2
0.2
-
ns
VCC = 2.7 V
0.4
0.1
-
ns
0.7
0.2
-
ns
outputs enabled
-
44
-
pF
outputs disabled
-
14
-
pF
VCC = 3.0 V to 3.6 V
CPD
power dissipation
capacitance
[1]
Min
per latch; VI = GND to VCC
Max
Unit
[5]
[1] Typical values are measured at Tamb = 25 °C
Typical values for VCC = 2.3 V to 2.7 V are measured at VCC = 2.5 V.
Typical values for VCC = 3.0 V to 3.6 V are measured at VCC = 3.3 V.
[2] tpd is the same as tPLH and tPHL.
[3] ten is the same as tPZL and tPZH.
[4] tdis is the same as tPLZ and tPHZ.
[5] CPD is used to determine the dynamic power dissipation (PD in μW).
2
2
PD = CPD × VCC × fi × N + ∑ (CL × VCC × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
2
∑(CL × VCC × fo) = sum of outputs.
74ALVCH16543
Product data sheet
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74ALVCH16543
Nexperia
16-bit D-type registered transceiver; 3-state
10.1 Waveforms and test circuit
VI
nAn, nBn input
VM
VM
tPHL
tPLH
GND
VOH
nBn, nAn output
VM
VM
VOL
aaa-027928
See Table 8 for measurement points.
VOL and VOH are typical output voltage levels that occur with the output load.
Figure 6. Input (nAn, nBn) to output (nBn, nAn) propagation delays
VI
nLEAB, nLEBA
input
VM
VM
VM
GND
tW
tPHL
tPLH
VOH
nAn, nBn output
VM
VM
VOL
aaa-027929
See Table 8 for measurement points.
VOL and VOH are typical output voltage levels that occur with the output load.
Figure 7. Input (nLEAB, nLEBA) to output (nBn, nAn) propagation delays and (nLEAB, nLEBA) pulse width
VI
nOEAB, nOEBA
nEAB, nEBA input
VM
GND
tPLZ
output
LOW-to-OFF
OFF-to-LOW
tPZL
VCC
VM
VX
VOL
tPHZ
output
HIGH-to-OFF
OFF-to-HIGH
VOH
tPZH
VY
VM
GND
outputs
enabled
outputs
disabled
outputs
enabled
aaa-027930
See Table 8 for measurement points.
VOL and VOH are typical output voltage levels that occur with the output load.
Figure 8. 3-state output enable and disable times
74ALVCH16543
Product data sheet
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74ALVCH16543
Nexperia
16-bit D-type registered transceiver; 3-state
VI
nAn, nBn input
VM
VM
VM
VM
GND
th
tsu
VI
nLEBA, nLEAB
nEBA, nEAB input
th
tsu
VM
VM
GND
aaa-027931
See Table 8 for measurement points.
VOL and VOH are typical output voltage levels that occur with the output load.
Figure 9. Data set-up and hold times for nAn, nBn inputs to nLEBA, nLEAB, nEBA and nEAB inputs
Table 8. Measurement points
Input
Output
VCC
VI
VM
VM
Vx
Vy
2.3 V to 2.7 V
VCC
0.5VCC
0.5VCC
VOL + 0.15 V
VOH - 0.15 V
2.7 V
2.7 V
1.5 V
1.5 V
VOL + 0.3 V
VOH - 0.3 V
3.0 V to 3.6 V
2.7 V
1.5 V
1.5 V
VOL + 0.3 V
VOH - 0.3 V
74ALVCH16543
Product data sheet
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74ALVCH16543
Nexperia
16-bit D-type registered transceiver; 3-state
VI
negative
pulse
tW
90 %
VM
0V
VI
tf
tr
tr
tf
90 %
positive
pulse
0V
VM
10 %
VM
VM
10 %
tW
VEXT
VCC
PULSE
GENERATOR
VI
RL
VO
DUT
RT
CL
RL
001aae235
Test data is given in Table 9.
Definitions test circuit:
RL = Load resistance;
CL = Load capacitance including jig and probe capacitance;
RT = Termination resistance should be equal to output impedance Zo of the pulse generator;
VEXT = External voltage for measuring switching times.
Figure 10. Test circuit for measuring switching times
Table 9. Test data
Input
Load
VEXT
VCC
VI
tr, tf
RL
CL
tPHZ, tPZH
tPLZ, tPZL
tPLH, tPHL
2.3 V to 2.7 V
VCC
≤ 2.0 ns
500 Ω
30 pF
GND
2 × VCC
open
2.7 V
2.7 V
≤ 2.5 ns
500 Ω
50 pF
GND
2 × VCC
open
3.0 V to 3.6 V
2.7 V
≤ 2.5 ns
500 Ω
50 pF
GND
2 × VCC
open
74ALVCH16543
Product data sheet
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12 / 17
74ALVCH16543
Nexperia
16-bit D-type registered transceiver; 3-state
11 Package outline
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm
SOT364-1
E
D
A
X
c
HE
y
v M A
Z
56
29
Q
A2
(A 3 )
A1
pin 1 index
A
θ
Lp
L
1
28
w M
bp
e
detail X
2.5
0
5 mm
scale
DIMENSIONS (mm are the original dimensions).
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z
θ
mm
1.2
0.15
0.05
1.05
0.85
0.25
0.28
0.17
0.2
0.1
14.1
13.9
6.2
6.0
0.5
8.3
7.9
1
0.8
0.4
0.50
0.35
0.25
0.08
0.1
0.5
0.1
8
o
0
o
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
SOT364-1
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
MO-153
Figure 11. Package outline SOT364-1 (TSSOP56)
74ALVCH16543
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 15 December 2017
© Nexperia B.V. 2017. All rights reserved.
13 / 17
74ALVCH16543
Nexperia
16-bit D-type registered transceiver; 3-state
12 Abbreviations
Table 10. Abbreviations
Acronym
Description
CDM
Charged Device Model
CMOS
Complementary Metal-Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
TTL
Transistor-Transistor Logic
13 Revision history
Table 11. Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74ALVCH16543 v.3
20171215
Product data sheet
-
74ALVCH16543 v.2
Modifications:
• The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
• Legal texts have been adapted to the new company name where appropriate.
74ALVCH16543 v.2
19991123
Product specification
-
74ALVCH16543 v.1
74ALVCH16543 v.1
19980831
Product specification
-
-
74ALVCH16543
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 15 December 2017
© Nexperia B.V. 2017. All rights reserved.
14 / 17
74ALVCH16543
Nexperia
16-bit D-type registered transceiver; 3-state
14 Legal information
14.1 Data sheet status
Document status
[1][2]
Product status
[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product
development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple
devices. The latest product status information is available on the Internet at URL http://www.nexperia.com.
14.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the
relevant full data sheet, which is available on request via the local Nexperia
sales office. In case of any inconsistency or conflict with the short data sheet,
the full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
14.3 Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia. In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory. Notwithstanding any damages that
customer might incur for any reason whatsoever, Nexperia's aggregate and
cumulative liability towards customer for the products described herein shall
be limited in accordance with the Terms and conditions of commercial sale of
Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
74ALVCH16543
Product data sheet
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification. Customers are responsible for the
design and operation of their applications and products using Nexperia
products, and Nexperia accepts no liability for any assistance with
applications or customer product design. It is customer’s sole responsibility
to determine whether the Nexperia product is suitable and fit for the
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products. Nexperia does not accept
any liability related to any default, damage, costs or problem which is based
on any weakness or default in the customer’s applications or products, or
the application or use by customer’s third party customer(s). Customer is
responsible for doing all necessary testing for the customer’s applications
and products using Nexperia products in order to avoid a default of the
applications and the products or of the application or use by customer’s third
party customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or
the grant, conveyance or implication of any license under any copyrights,
patents or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 15 December 2017
© Nexperia B.V. 2017. All rights reserved.
15 / 17
74ALVCH16543
Nexperia
16-bit D-type registered transceiver; 3-state
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications. In the event that customer
uses the product for design-in and use in automotive applications to
automotive specifications and standards, customer (a) shall use the product
without Nexperia's warranty of the product for such automotive applications,
use and specifications, and (b) whenever customer uses the product for
automotive applications beyond Nexperia's specifications such use shall be
solely at customer’s own risk, and (c) customer fully indemnifies Nexperia
for any liability, damages or failed product claims resulting from customer
74ALVCH16543
Product data sheet
design and use of the product for automotive applications beyond Nexperia's
standard warranty and Nexperia's product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
14.4 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 15 December 2017
© Nexperia B.V. 2017. All rights reserved.
16 / 17
74ALVCH16543
Nexperia
16-bit D-type registered transceiver; 3-state
Contents
1
2
3
4
5
5.1
5.2
6
7
8
9
10
10.1
11
12
13
14
General description ............................................ 1
Features and benefits .........................................1
Ordering information .......................................... 2
Functional diagram ............................................. 2
Pinning information ............................................ 4
Pinning ............................................................... 4
Pin description ................................................... 5
Functional description ........................................5
Limiting values .................................................... 6
Recommended operating conditions ................ 6
Static characteristics .......................................... 7
Dynamic characteristics .....................................8
Waveforms and test circuit .............................. 10
Package outline .................................................13
Abbreviations .................................................... 14
Revision history ................................................ 14
Legal information .............................................. 15
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section 'Legal information'.
© Nexperia B.V. 2017.
All rights reserved.
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 15 December 2017
Document identifier: 74ALVCH16543
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