74AUP2G240GF,115

74AUP2G240 Low-power dual inverting buffer/line driver; 3-state Rev. 9 — 19 March 2019 Product data sheet 1. General description The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (nOE). A HIGH level at pin nOE causes the output to assume a high-impedance OFF-state. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. This device has the input-disable feature, which allows floating input signals. The inputs are disabled when the output enable input nOE is HIGH. 2. Features and benefits • • • • • • • • • • • • Wide supply voltage range from 0.8 V to 3.6 V High noise immunity Complies with JEDEC standards: • JESD8-12 (0.8 V to 1.3 V) • JESD8-11 (0.9 V to 1.65 V) • JESD8-7 (1.2 V to 1.95 V) • JESD8-5 (1.8 V to 2.7 V) • JESD8-B (2.7 V to 3.6 V) ESD protection: • HBM JESD22-A114F Class 3A exceeds 5000 V • MM JESD22-A115-A exceeds 200 V • CDM JESD22-C101E exceeds 1000 V Low static power consumption; ICC = 0.9 μA (maximum) Latch-up performance exceeds 100 mA per JESD78 Class II Inputs accept voltages up to 3.6 V Low-noise overshoot and undershoot < 10 % of VCC Input-disable feature allows floating input conditions IOFF circuitry provides partial Power-down mode operation Multiple package options Specified from -40 °C to +85 °C and -40 °C to +125 °C 74AUP2G240 Nexperia Low-power dual inverting buffer/line driver; 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP2G240DC -40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74AUP2G240GT -40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 1 × 1.95 × 0.5 mm SOT833-1 74AUP2G240GF -40 °C to +125 °C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.35 × 1 × 0.5 mm SOT1089 74AUP2G240GM -40 °C to +125 °C XQFN8 plastic, extremely thin quad flat package; no leads; SOT902-2 8 terminals; body 1.6 × 1.6 × 0.5 mm 74AUP2G240GN -40 °C to +125 °C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.2 × 1.0 × 0.35 mm SOT1116 74AUP2G240GS -40 °C to +125 °C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.35 × 1.0 × 0.35 mm SOT1203 4. Marking Table 2. Marking codes Type number Marking code [1] 74AUP2G240DC p40 74AUP2G240GT p40 74AUP2G240GF p2 74AUP2G240GM p40 74AUP2G240GN p2 74AUP2G240GS p2 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram EN 1OE 1A 1Y EN 2OE 2A 2Y 001aah782 Fig. 1. Logic symbol 74AUP2G240 Product data sheet 001aah783 Fig. 2. IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 9 — 19 March 2019 © Nexperia B.V. 2019. All rights reserved 2 / 21 74AUP2G240 Nexperia Low-power dual inverting buffer/line driver; 3-state 6. Pinning information 6.1. Pinning 74AUP2G240 1OE 1 8 VCC 1A 2 7 2OE 2Y 3 6 1Y GND 4 5 2A 74AUP2G240 1OE 1 8 VCC 1A 2 7 2OE 2Y 3 6 1Y GND 4 5 2A 001aaf408 Transparent top view 001aaf407 Fig. 3. Fig. 4. Pin configuration SOT765-1 (VSSOP8) Pin configuration SOT833-1, SOT1089, SOT1116 and SOT1203 (XSON8) 74AUP2G240 2OE 1 1Y 2A 8 VCC terminal 1 index area 1OE 2 6 1A 3 5 2Y GND 4 7 001aaf409 Transparent top view Fig. 5. Pin configuration SOT902-2 (XQFN8) 6.2. Pin description Table 3. Pin description Symbol Pin Description SOT765-1, SOT833-1, SOT1089, SOT1116 and SOT1203 SOT902-2 1OE, 2OE 1, 7 7, 1 output enable input (active LOW) 1A, 2A 2, 5 6, 3 data input GND 4 4 ground (0 V) 1Y, 2Y 6, 3 2, 5 data output VCC 8 8 supply voltage 74AUP2G240 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 19 March 2019 © Nexperia B.V. 2019. All rights reserved 3 / 21 74AUP2G240 Nexperia Low-power dual inverting buffer/line driver; 3-state 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. Output Input nOE nA nY L L H L H L H X Z 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit -0.5 +4.6 V -50 - -0.5 +4.6 -50 - -0.5 +4.6 V VCC supply voltage IIK input clamping current VI input voltage IOK output clamping current VO < 0 V VO output voltage Active mode and Power-down mode IO output current VO = 0 V to VCC - ±20 mA ICC supply current - 50 mA IGND ground current -50 - mA Tstg storage temperature -65 +150 °C Ptot total power dissipation - 250 mW Min Max Unit 0.8 3.6 V [1] [2] VI < 0 V [1] Tamb = -40 °C to +125 °C [1] [2] mA V mA The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. For VSSOP8 packages: above 110 °C the value of Ptot derates linearly with 8.0 mW/K. For XSON8 and XQFN8 packages: above 118 °C the value of Ptot derates linearly with 7.8 mW/K. 9. Recommended operating conditions Table 6. Operating conditions Symbol Parameter VCC supply voltage VI input voltage VO output voltage Tamb ambient temperature Δt/ΔV input transition rise and fall rate 74AUP2G240 Product data sheet Conditions 0 3.6 V Active mode 0 VCC V Power-down mode; VCC = 0 V 0 3.6 V -40 +125 °C 0 200 ns/V VCC = 0.8 V to 3.6 V All information provided in this document is subject to legal disclaimers. Rev. 9 — 19 March 2019 © Nexperia B.V. 2019. All rights reserved 4 / 21 74AUP2G240 Nexperia Low-power dual inverting buffer/line driver; 3-state 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VCC = 0.8 V 0.70VCC - - V VCC = 0.9 V to 1.95 V 0.65VCC - - V VCC = 2.3 V to 2.7 V 1.6 - - V VCC = 3.0 V to 3.6 V 2.0 - - V VCC = 0.8 V - - 0.30VCC V VCC = 0.9 V to 1.95 V - - 0.35VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 3.0 V to 3.6 V - - 0.9 V IO = -20 μA; VCC = 0.8 V to 3.6 V VCC - 0.1 - - V IO = -1.1 mA; VCC = 1.1 V 0.75VCC - - V IO = -1.7 mA; VCC = 1.4 V 1.11 - - V IO = -1.9 mA; VCC = 1.65 V 1.32 - - V IO = -2.3 mA; VCC = 2.3 V 2.05 - - V IO = -3.1 mA; VCC = 2.3 V 1.9 - - V IO = -2.7 mA; VCC = 3.0 V 2.72 - - V IO = -4.0 mA; VCC = 3.0 V 2.6 - - V IO = 20 μA; VCC = 0.8 V to 3.6 V - - 0.1 V IO = 1.1 mA; VCC = 1.1 V - - 0.3VCC V IO = 1.7 mA; VCC = 1.4 V - - 0.31 V IO = 1.9 mA; VCC = 1.65 V - - 0.31 V IO = 2.3 mA; VCC = 2.3 V - - 0.31 V IO = 3.1 mA; VCC = 2.3 V - - 0.44 V IO = 2.7 mA; VCC = 3.0 V - - 0.31 V IO = 4.0 mA; VCC = 3.0 V - - 0.44 V Tamb = 25 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VI = VIH or VIL VI = VIH or VIL II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - ±0.1 μA IOZ OFF-state output current VI = VIH or VIL; VO = 0 V to 3.6 V; VCC = 0 V to 3.6 V - - ±0.1 μA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.2 μA ΔIOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.2 μA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 0.5 μA ΔICC additional supply current data input; VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V [1] - - 40 μA nOE input; VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V [1] - - 110 μA - - 1 μA disabled inputs; VI = GND to 3.6 V; nOE = VCC; VCC = 0.8 V to 3.6 V 74AUP2G240 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 19 March 2019 © Nexperia B.V. 2019. All rights reserved 5 / 21 74AUP2G240 Nexperia Low-power dual inverting buffer/line driver; 3-state Symbol Parameter Conditions Min Typ Max CI input capacitance CO output capacitance Unit VCC = 0 V to 3.6 V; VI = GND or VCC - 0.6 - pF output enabled; VO = GND; VCC = 0 V - 1.7 - pF output disabled; VCC = 0 V to 3.6 V; VO = GND or VCC - 1.5 - pF VCC = 0.8 V 0.70VCC - - V VCC = 0.9 V to 1.95 V 0.65VCC - - V VCC = 2.3 V to 2.7 V 1.6 - - V VCC = 3.0 V to 3.6 V 2.0 - - V VCC = 0.8 V - - 0.30VCC V VCC = 0.9 V to 1.95 V - - 0.35VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 3.0 V to 3.6 V - - 0.9 V VCC - 0.1 - - V IO = -1.1 mA; VCC = 1.1 V 0.7VCC - - V IO = -1.7 mA; VCC = 1.4 V 1.03 - - V IO = -1.9 mA; VCC = 1.65 V 1.30 - - V IO = -2.3 mA; VCC = 2.3 V 1.97 - - V IO = -3.1 mA; VCC = 2.3 V 1.85 - - V IO = -2.7 mA; VCC = 3.0 V 2.67 - - V IO = -4.0 mA; VCC = 3.0 V 2.55 - - V IO = 20 μA; VCC = 0.8 V to 3.6 V - - 0.1 V IO = 1.1 mA; VCC = 1.1 V - - 0.3VCC V IO = 1.7 mA; VCC = 1.4 V - - 0.37 V IO = 1.9 mA; VCC = 1.65 V - - 0.35 V IO = 2.3 mA; VCC = 2.3 V - - 0.33 V IO = 3.1 mA; VCC = 2.3 V - - 0.45 V IO = 2.7 mA; VCC = 3.0 V - - 0.33 V IO = 4.0 mA; VCC = 3.0 V - - 0.45 V Tamb = -40 °C to +85 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VI = VIH or VIL IO = -20 μA; VCC = 0.8 V to 3.6 V VI = VIH or VIL II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - ±0.5 μA IOZ OFF-state output current VI = VIH or VIL; VO = 0 V to 3.6 V; VCC = 0 V to 3.6 V - - ±0.5 μA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.5 μA ΔIOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.6 μA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 0.9 μA ΔICC additional supply current data input; VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V [1] - - 50 μA nOE input; VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V [1] - - 120 μA - - 1 μA disabled inputs; VI = GND to 3.6 V; nOE = VCC; VCC = 0.8 V to 3.6 V 74AUP2G240 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 19 March 2019 © Nexperia B.V. 2019. All rights reserved 6 / 21 74AUP2G240 Nexperia Low-power dual inverting buffer/line driver; 3-state Symbol Parameter Conditions Min Typ Max Unit VCC = 0.8 V 0.75VCC - - V VCC = 0.9 V to 1.95 V 0.70VCC - - V VCC = 2.3 V to 2.7 V 1.6 - - V VCC = 3.0 V to 3.6 V 2.0 - - V VCC = 0.8 V - - 0.25VCC V VCC = 0.9 V to 1.95 V - - 0.30VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 3.0 V to 3.6 V - - 0.9 V VCC - 0.11 - - V IO = -1.1 mA; VCC = 1.1 V 0.6VCC - - V IO = -1.7 mA; VCC = 1.4 V 0.93 - - V IO = -1.9 mA; VCC = 1.65 V 1.17 - - V IO = -2.3 mA; VCC = 2.3 V 1.77 - - V IO = -3.1 mA; VCC = 2.3 V 1.67 - - V IO = -2.7 mA; VCC = 3.0 V 2.40 - - V IO = -4.0 mA; VCC = 3.0 V 2.30 - - V IO = 20 μA; VCC = 0.8 V to 3.6 V - - 0.11 V IO = 1.1 mA; VCC = 1.1 V - - IO = 1.7 mA; VCC = 1.4 V - - 0.41 V IO = 1.9 mA; VCC = 1.65 V - - 0.39 V IO = 2.3 mA; VCC = 2.3 V - - 0.36 V IO = 3.1 mA; VCC = 2.3 V - - 0.50 V IO = 2.7 mA; VCC = 3.0 V - - 0.36 V IO = 4.0 mA; VCC = 3.0 V - - 0.50 V Tamb = -40 °C to +125 °C VIH HIGH-level input voltage VIL LOW-level input voltage VOH VOL HIGH-level output voltage LOW-level output voltage VI = VIH or VIL IO = -20 μA; VCC = 0.8 V to 3.6 V VI = VIH or VIL 0.33VCC V II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - ±0.75 μA IOZ OFF-state output current VI = VIH or VIL; VO = 0 V to 3.6 V; VCC = 0 V to 3.6 V - - ±0.75 μA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.75 μA ΔIOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.75 μA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 1.4 μA ΔICC additional supply current data input; VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V [1] - - 75 μA nOE input; VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V [1] - - 180 μA - - 1 μA disabled inputs; VI = GND to 3.6 V; nOE = VCC; VCC = 0.8 V to 3.6 V [1] One input at VCC - 0.6 V, other input at VCC or GND. 74AUP2G240 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 19 March 2019 © Nexperia B.V. 2019. All rights reserved 7 / 21 74AUP2G240 Nexperia Low-power dual inverting buffer/line driver; 3-state 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V; for test circuit see Fig. 8. Symbol Parameter Conditions 25 °C -40 °C to +125 °C Unit Min Typ [1] Max Min Max Max (85 °C) (125 °C) - 22.3 - - - - ns VCC = 1.1 V to 1.3 V 3.0 5.8 12.6 2.8 14.1 15.5 ns VCC = 1.4 V to 1.6 V 2.3 4.0 7.3 2.1 8.5 9.4 ns VCC = 1.65 V to 1.95 V 2.0 3.2 5.5 1.9 6.7 7.4 ns VCC = 2.3 V to 2.7 V 1.8 2.6 4.1 1.5 4.8 5.3 ns VCC = 3.0 V to 3.6 V 1.4 2.3 3.6 1.3 4.1 4.6 ns - 70.2 - - - - ns VCC = 1.1 V to 1.3 V 3.1 6.4 14.3 2.8 15.9 17.5 ns VCC = 1.4 V to 1.6 V 2.5 4.4 8.1 2.2 9.5 10.5 ns VCC = 1.65 V to 1.95 V 2.1 3.6 6.2 1.9 7.4 8.2 ns VCC = 2.3 V to 2.7 V 1.8 2.8 4.6 1.7 5.4 6.0 ns VCC = 3.0 V to 3.6 V 1.7 2.5 4.0 1.7 4.7 5.3 ns - 14.8 - - - - ns VCC = 1.1 V to 1.3 V 2.0 4.3 7.4 2.3 8.3 9.2 ns VCC = 1.4 V to 1.6 V 1.6 3.2 5.2 1.7 5.9 6.5 ns VCC = 1.65 V to 1.95 V 1.5 3.0 4.8 1.5 5.5 6.1 ns VCC = 2.3 V to 2.7 V 1.1 2.2 3.5 1.4 4.0 4.5 ns VCC = 3.0 V to 3.6 V 1.3 2.5 3.9 1.4 4.5 5.0 ns - 25.7 - - - - ns VCC = 1.1 V to 1.3 V 3.5 6.6 14.5 3.2 16.3 18.0 ns VCC = 1.4 V to 1.6 V 2.2 4.6 8.4 2.0 9.9 10.9 ns VCC = 1.65 V to 1.95 V 2.0 3.8 6.4 1.8 7.7 8.6 ns VCC = 2.3 V to 2.7 V 1.8 3.1 4.8 1.7 5.7 6.4 ns VCC = 3.0 V to 3.6 V 1.7 2.8 4.3 1.7 5.0 5.5 ns - 74.0 - - - - ns VCC = 1.1 V to 1.3 V 3.6 7.4 16.3 3.2 18.2 20.1 ns VCC = 1.4 V to 1.6 V 2.3 5.1 9.2 2.1 10.9 12.0 ns VCC = 1.65 V to 1.95 V 2.0 4.1 7.1 1.8 8.5 9.4 ns VCC = 2.3 V to 2.7 V 1.8 3.4 5.4 1.7 6.4 7.1 ns VCC = 3.0 V to 3.6 V 1.8 3.1 4.8 1.7 5.7 6.3 ns CL = 5 pF tpd ten propagation delay enable time nA to nY; see Fig. 6 [2] VCC = 0.8 V nOE to nY; see Fig. 7 [3] VCC = 0.8 V tdis disable time nOE to nY; see Fig. 7 [4] VCC = 0.8 V CL = 10 pF tpd ten propagation delay enable time nA to nY; see Fig. 6 [2] VCC = 0.8 V nOE to nY; see Fig. 7 [3] VCC = 0.8 V 74AUP2G240 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 19 March 2019 © Nexperia B.V. 2019. All rights reserved 8 / 21 74AUP2G240 Nexperia Low-power dual inverting buffer/line driver; 3-state Symbol Parameter tdis disable time Conditions 25 °C -40 °C to +125 °C Unit Min Typ [1] Max Min - 33.7 - - - - ns VCC = 1.1 V to 1.3 V 3.4 5.4 9.0 3.2 10.0 11.0 ns VCC = 1.4 V to 1.6 V 2.1 4.1 6.3 2.1 7.1 7.9 ns VCC = 1.65 V to 1.95 V 2.3 4.2 6.3 1.8 7.1 7.9 ns VCC = 2.3 V to 2.7 V 1.6 3.0 4.6 1.7 5.2 5.7 ns VCC = 3.0 V to 3.6 V 2.1 3.8 5.7 1.7 6.4 7.1 ns - 29.0 - - - - ns VCC = 1.1 V to 1.3 V 3.9 7.4 16.3 3.6 18.4 20.2 ns VCC = 1.4 V to 1.6 V 3.0 5.1 9.4 2.5 11.1 12.3 ns VCC = 1.65 V to 1.95 V 2.2 4.2 7.2 2.1 8.7 9.6 ns VCC = 2.3 V to 2.7 V 2.0 3.5 5.4 1.9 6.5 7.2 ns VCC = 3.0 V to 3.6 V 2.0 3.3 4.9 1.9 5.7 6.4 ns - 77.8 - - - - ns VCC = 1.1 V to 1.3 V 4.0 8.2 18.2 3.6 20.4 22.5 ns VCC = 1.4 V to 1.6 V 3.0 5.6 10.3 2.5 12.2 13.4 ns VCC = 1.65 V to 1.95 V 2.3 4.6 7.9 2.1 9.5 10.5 ns VCC = 2.3 V to 2.7 V 2.1 3.9 6.0 2.0 7.2 7.9 ns VCC = 3.0 V to 3.6 V 2.1 3.6 5.5 1.9 6.4 7.1 ns - 62.5 - - - - ns VCC = 1.1 V to 1.3 V 4.3 6.6 10.4 3.6 11.6 12.8 ns VCC = 1.4 V to 1.6 V 3.0 5.0 7.4 2.5 8.4 9.3 ns VCC = 1.65 V to 1.95 V 3.0 5.3 7.8 2.1 8.7 9.7 ns VCC = 2.3 V to 2.7 V 2.1 3.8 5.7 2.0 6.4 7.1 ns VCC = 3.0 V to 3.6 V 2.9 5.0 7.4 1.9 8.3 9.1 ns - 39.1 - - - - ns VCC = 1.1 V to 1.3 V 5.0 9.7 21.6 4.6 24.3 26.8 ns VCC = 1.4 V to 1.6 V 4.0 6.7 12.3 3.0 14.6 16.1 ns VCC = 1.65 V to 1.95 V 2.9 5.5 9.5 2.7 11.5 12.6 ns VCC = 2.3 V to 2.7 V 2.7 4.6 7.1 2.5 8.6 9.5 ns VCC = 3.0 V to 3.6 V 2.6 4.3 6.4 2.5 7.7 8.5 ns nOE to nY; see Fig. 7 Max Max (85 °C) (125 °C) [4] VCC = 0.8 V CL = 15 pF tpd ten propagation delay enable time nA to nY; see Fig. 6 [2] VCC = 0.8 V nOE to nY; see Fig. 7 [3] VCC = 0.8 V tdis disable time nOE to nY; see Fig. 7 [4] VCC = 0.8 V CL = 30 pF tpd propagation delay 74AUP2G240 Product data sheet nA to nY; see Fig. 6 [2] VCC = 0.8 V All information provided in this document is subject to legal disclaimers. Rev. 9 — 19 March 2019 © Nexperia B.V. 2019. All rights reserved 9 / 21 74AUP2G240 Nexperia Low-power dual inverting buffer/line driver; 3-state Symbol Parameter ten enable time Conditions 25 °C disable time Unit Min Typ [1] Max Min - 89.4 - - - - ns VCC = 1.1 V to 1.3 V 5.2 10.6 23.8 4.6 26.7 29.5 ns VCC = 1.4 V to 1.6 V 4.0 7.3 13.2 3.0 15.7 17.4 ns VCC = 1.65 V to 1.95 V 3.0 6.0 10.2 2.7 12.3 13.6 ns VCC = 2.3 V to 2.7 V 2.8 5.0 7.8 2.6 9.3 10.3 ns VCC = 3.0 V to 3.6 V 2.8 4.8 7.1 2.6 8.4 9.3 ns - 68.9 - - - - ns VCC = 1.1 V to 1.3 V 6.0 9.3 15.0 4.6 16.5 18.2 ns VCC = 1.4 V to 1.6 V 4.4 7.7 11.0 3.0 12.2 13.4 ns VCC = 1.65 V to 1.95 V 5.1 8.8 12.4 2.7 13.7 15.1 ns VCC = 2.3 V to 2.7 V 3.6 6.2 9.0 2.6 10.0 11.0 ns VCC = 3.0 V to 3.6 V 5.2 8.8 12.7 2.6 14.0 15.4 ns VCC = 0.8 V - 2.7 - - - - pF VCC = 1.1 V to 1.3 V - 2.9 - - - - pF VCC = 1.4 V to 1.6 V - 3.0 - - - - pF VCC = 1.65 V to 1.95 V - 3.2 - - - - pF VCC = 2.3 V to 2.7 V - 3.7 - - - - pF VCC = 3.0 V to 3.6 V - 4.2 - - - - pF nOE to nY; see Fig. 7 Max Max (85 °C) (125 °C) [3] VCC = 0.8 V tdis -40 °C to +125 °C nOE to nY; see Fig. 7 [4] VCC = 0.8 V CL = 5 pF, 10 pF, 15 pF and 30 pF CPD [1] [2] [3] [4] [5] power dissipation capacitance f = 1 MHz; VI = GND to VCC [5] All typical values are measured at nominal VCC. tpd is the same as tPLH and tPHL. ten is the same as tPZH and tPZL. tdis is the same as tPHZ and tPLZ. CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD × VCC × fi × N + Σ(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; 2 Σ(CL × VCC × fo) = sum of the outputs. 74AUP2G240 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 19 March 2019 © Nexperia B.V. 2019. All rights reserved 10 / 21 74AUP2G240 Nexperia Low-power dual inverting buffer/line driver; 3-state 11.1. Waveforms and test circuit VI VM nA input VM GND t PHL t PLH VOH VM VM nY output VOL mna960 Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 6. The data input (nA) to output (nY) propagation delays VI nOE input VM GND t PLZ output LOW-to-OFF OFF-to-LOW t PZL VCC VM VX VOL t PHZ output HIGH-to-OFF OFF-to-HIGH VOH t PZH VY VM GND outputs enabled outputs disabled outputs enabled mna961 Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 7. 3-state enable and disable times Table 9. Measurement points Supply voltage Input Output VCC VM VI tr = tf VM VX VY 0.8 V to 1.6 V 0.5 × VCC VCC ≤ 3.0 ns 0.5 × VCC VOL + 0.1 V VOH - 0.1 V 1.65 V to 2.7 V 0.5 × VCC VCC ≤ 3.0 ns 0.5 × VCC VOL + 0.15 V VOH - 0.15 V 3.0 V to 3.6 V 0.5 × VCC VCC ≤ 3.0 ns 0.5 × VCC VOL + 0.3 V VOH - 0.3 V 74AUP2G240 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 19 March 2019 © Nexperia B.V. 2019. All rights reserved 11 / 21 74AUP2G240 Nexperia Low-power dual inverting buffer/line driver; 3-state VCC G VI DUT VEXT 5 kΩ VO RT CL RL 001aac521 Test data is given in Table 10. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig. 8. Test circuit for measuring switching times Table 10. Test data Supply voltage Load VCC CL RL [1] tPLH, tPHL tPZH, tPHZ tPZL, tPLZ 0.8 V to 3.6 V 5 pF, 10 pF, 15 pF and 30 pF 5 kΩ or 1 MΩ open GND 2 × VCC [1] VEXT For measuring enable and disable times RL = 5 kΩ. For measuring propagation delays, setup and hold times and pulse width RL = 1 MΩ. 74AUP2G240 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 19 March 2019 © Nexperia B.V. 2019. All rights reserved 12 / 21 74AUP2G240 Nexperia Low-power dual inverting buffer/line driver; 3-state 12. Package outline VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm D SOT765-1 E A X c y HE v A Z 5 8 Q A A2 A1 pin 1 index (A3) θ Lp 1 detail X 4 e L w bp 0 5 mm scale Dimensions (mm are the original dimensions) Unit mm A max. max nom min 1 A1 A2 0.15 0.85 0.00 0.60 A3 0.12 D(1) E(2) 0.27 0.23 2.1 2.4 0.17 0.08 1.9 2.2 bp c e HE 0.5 3.2 3.0 L 0.4 Lp Q 0.40 0.21 0.15 0.19 v w y 0.2 0.08 0.1 Z(1) θ 0.4 8° 0.1 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. Outline version SOT765-1 Fig. 9. References IEC JEDEC JEITA sot765-1_po European projection Issue date 07-06-02 16-05-31 MO-187 Package outline SOT765-1 (VSSOP8) 74AUP2G240 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 19 March 2019 © Nexperia B.V. 2019. All rights reserved 13 / 21 74AUP2G240 Nexperia Low-power dual inverting buffer/line driver; 3-state XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm 1 2 SOT833-1 b 4 3 4× (2) L L1 e 8 7 6 e1 5 e1 e1 8× A (2) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max A1 max b D E e e1 L L1 mm 0.5 0.04 0.25 0.17 2.0 1.9 1.05 0.95 0.6 0.5 0.35 0.27 0.40 0.32 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT833-1 --- MO-252 --- EUROPEAN PROJECTION ISSUE DATE 07-11-14 07-12-07 Fig. 10. Package outline SOT833-1 (XSON8) 74AUP2G240 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 19 March 2019 © Nexperia B.V. 2019. All rights reserved 14 / 21 74AUP2G240 Nexperia Low-power dual inverting buffer/line driver; 3-state XSON8: extremely thin small outline package; no leads; 8 terminals; body 1.35 x 1 x 0.5 mm SOT1089 E terminal 1 index area D A A1 detail X (4×)(2) e L (8×)(2) b 4 5 e1 1 terminal 1 index area 8 L1 X 0 0.5 scale Dimensions Unit mm max nom min 1 mm A(1) 0.5 A1 b D E e e1 L L1 0.04 0.20 1.40 1.05 0.35 0.40 0.15 1.35 1.00 0.55 0.35 0.30 0.35 0.12 1.30 0.95 0.27 0.32 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. Outline version SOT1089 sot1089_po References IEC JEDEC JEITA European projection Issue date 10-04-09 10-04-12 MO-252 Fig. 11. Package outline SOT1089 (XSON8) 74AUP2G240 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 19 March 2019 © Nexperia B.V. 2019. All rights reserved 15 / 21 74AUP2G240 Nexperia Low-power dual inverting buffer/line driver; 3-state XQFN8: plastic, extremely thin quad flat package; no leads; 8 terminals; body 1.6 x 1.6 x 0.5 mm SOT902-2 X D B A terminal 1 index area E A A1 detail X e v w b 4 3 C C A B C y1 C y 5 e1 terminal 1 index area 2 6 L 1 7 k 8 L2 L k metal area not for soldering L3 L1 0 1 Dimensions Unit(1) mm max nom min 2 mm scale A 0.5 A1 b D E e 0.05 0.25 1.65 1.65 0.20 1.60 1.60 0.55 0.00 0.15 1.55 1.55 e1 0.5 k 0.2 L L1 L2 L3 0.35 0.15 0.25 0.35 0.30 0.10 0.20 0.30 0.25 0.05 0.15 0.25 v 0.1 w y y1 0.05 0.05 0.05 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. References Outline version IEC JEDEC JEITA SOT902-2 --- MO-255 --- sot902-2_po European projection Issue date 16-07-14 16-11-08 Fig. 12. Package outline SOT902-2 (XQFN8) 74AUP2G240 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 19 March 2019 © Nexperia B.V. 2019. All rights reserved 16 / 21 74AUP2G240 Nexperia Low-power dual inverting buffer/line driver; 3-state XSON8: extremely thin small outline package; no leads; 8 terminals; body 1.2 x 1.0 x 0.35 mm 1 2 SOT1116 b 4 3 (4×)(2) L L1 e 8 7 e1 6 e1 5 e1 (8×)(2) A1 A D E terminal 1 index area 0 0.5 Dimensions Unit mm 1 mm scale A(1) A1 b D E e max 0.35 0.04 0.20 1.25 1.05 nom 0.15 1.20 1.00 0.55 min 0.12 1.15 0.95 e1 0.3 L L1 0.35 0.40 0.30 0.35 0.27 0.32 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. Outline version sot1116_po References IEC JEDEC JEITA European projection Issue date 10-04-02 10-04-07 SOT1116 Fig. 13. Package outline SOT1116 (XSON8) 74AUP2G240 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 19 March 2019 © Nexperia B.V. 2019. All rights reserved 17 / 21 74AUP2G240 Nexperia Low-power dual inverting buffer/line driver; 3-state XSON8: extremely thin small outline package; no leads; 8 terminals; body 1.35 x 1.0 x 0.35 mm SOT1203 b 1 2 3 (4×)(2) 4 L L1 e 8 7 6 e1 e1 5 e1 (8×)(2) A1 A D E terminal 1 index area 0 0.5 Dimensions Unit mm 1 mm scale A(1) A1 b D E e e1 L L1 max 0.35 0.04 0.20 1.40 1.05 0.35 0.40 nom 0.15 1.35 1.00 0.55 0.35 0.30 0.35 min 0.12 1.30 0.95 0.27 0.32 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. Outline version sot1203_po References IEC JEDEC JEITA European projection Issue date 10-04-02 10-04-06 SOT1203 Fig. 14. Package outline SOT1203 (XSON8) 74AUP2G240 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 19 March 2019 © Nexperia B.V. 2019. All rights reserved 18 / 21 74AUP2G240 Nexperia Low-power dual inverting buffer/line driver; 3-state 13. Abbreviations Table 11. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 14. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AUP2G240 v.9 20190319 Product data sheet - Modifications: • • • • • 74AUP2G240 v.8 The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Type number 74AUP2G240GD (SOT996-2) removed. Package outline drawing SOT765-1 (VSSOP8) updated. Package outline drawing SOT902-2 (XQFN8) updated. 74AUP2G240 v.8 20130124 Modifications: • 74AUP2G240 v.7 20120606 Product data sheet - 74AUP2G240 v.6 74AUP2G240 v.6 20111205 Product data sheet - 74AUP2G240 v.5 74AUP2G240 v.5 20100913 Product data sheet - 74AUP2G240 v.4 74AUP2G240 v.4 20090630 Product data sheet - 74AUP2G240 v.3 74AUP2G240 v.3 20090407 Product data sheet - 74AUP2G240 v.2 74AUP2G240 v.2 20080222 Product data sheet - 74AUP2G240 v.1 74AUP2G240 v.1 20061006 Product data sheet - - 74AUP2G240 Product data sheet Product data sheet - 74AUP2G240 v.7 For type number 74AUP2G240GD XSON8U has changed to XSON8. All information provided in this document is subject to legal disclaimers. Rev. 9 — 19 March 2019 © Nexperia B.V. 2019. All rights reserved 19 / 21 74AUP2G240 Nexperia Low-power dual inverting buffer/line driver; 3-state 15. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the internet at https://www.nexperia.com. Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal 74AUP2G240 Product data sheet Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 9 — 19 March 2019 © Nexperia B.V. 2019. All rights reserved 20 / 21 74AUP2G240 Nexperia Low-power dual inverting buffer/line driver; 3-state Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................2 4. Marking.......................................................................... 2 5. Functional diagram.......................................................2 6. Pinning information......................................................3 6.1. Pinning.........................................................................3 6.2. Pin description............................................................. 3 7. Functional description................................................. 4 8. Limiting values............................................................. 4 9. Recommended operating conditions..........................4 10. Static characteristics..................................................5 11. Dynamic characteristics.............................................8 11.1. Waveforms and test circuit.......................................11 12. Package outline........................................................ 13 13. Abbreviations............................................................ 19 14. Revision history........................................................19 15. Legal information......................................................20 © Nexperia B.V. 2019. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 19 March 2019 74AUP2G240 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 9 — 19 March 2019 © Nexperia B.V. 2019. All rights reserved 21 / 21