74CBTLV3245BQ-Q100

74CBTLV3245-Q100 8-bit bus switch with output enable Rev. 4 — 7 May 2020 Product data sheet 1. General description The 74CBTLV3245-Q100 is an 8-pole, single-throw bus switch. The device features a single output enable input (OE) that controls eight switch channels. The switches are disabled when OE is HIGH. Schmitt-trigger action at control inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits • • • • • • • • • • • Automotive product qualification in accordance with AEC-Q100 (Grade 1) • Specified from -40 °C to +85 °C and from -40 °C to +125 °C Supply voltage range from 2.3 V to 3.6 V High noise immunity Complies with JEDEC standard: • JESD8-5 (2.3 V to 2.7 V) • JESD8-B/JESD36 (2.7 V to 3.6 V) ESD protection: • MIL-STD-883, method 3015 exceeds 2000 V • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω) 5 Ω switch connection between two ports Rail to rail switching on data I/O ports CMOS low power consumption Latch-up performance exceeds 250 mA per JESD78B Class I level A IOFF circuitry provides partial Power-down mode operation DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74CBTLV3245PW-Q100 -40 °C to +125 °C TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 74CBTLV3245BQ-Q100 -40 °C to +125 °C DHVQFN20 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 × 4.5 × 0.85 mm SOT764-1 74CBTLV3245-Q100 Nexperia 8-bit bus switch with output enable 4. Functional diagram OE A1 A2 A3 A4 A5 A6 2 3 4 5 6 7 A7 A8 8 9 19 18 17 B1 16 B2 B3 15 B4 14 B5 13 B6 12 B7 11 B8 001aan323 Fig. 1. Logic symbol nA OE Fig. 2. nB 001aan324 Logic diagram (one switch) 5. Pinning information 5.1. Pinning n.c. 1 1 A1 2 20 VCC 19 OE A2 3 18 B1 A3 4 17 B2 A4 5 16 B3 A5 6 15 B4 A6 7 14 B5 A7 8 13 B6 A8 9 12 B7 GND 10 11 B8 Pin configuration SOT360-1 (TSSOP20) 74CBTLV3245_Q100 Product data sheet 19 OE A2 3 18 B1 A3 4 17 B2 A4 5 16 B3 A5 6 15 B4 A6 7 14 B5 A7 8 A8 9 GND(1) 13 B6 12 B7 aaa-022127 Transparent top view (1) This is not a ground pin. There is no electrical or mechanical requirement to solder the pad. In case soldered, the solder land should remain floating or connected to GND. aaa-022126 Fig. 3. 2 B8 11 n.c. A1 GND 10 74CBTLV3245-Q100 20 VCC 74CBTLV3245-Q100 terminal 1 index area Fig. 4. Pin configuration SOT764-1 (DHVQFN20) All information provided in this document is subject to legal disclaimers. Rev. 4 — 7 May 2020 © Nexperia B.V. 2020. All rights reserved 2 / 15 74CBTLV3245-Q100 Nexperia 8-bit bus switch with output enable 5.2. Pin description Table 2. Pin description Symbol Pin Description nc 1 not connected A1 to A8 2, 3, 4, 5, 6, 7, 8, 9 data input/output (A port) GND 10 ground (0 V) B1 to B8 18, 17, 16, 15, 14, 13, 12, 11 data input/output (B port) OE 19 output enable input (active LOW) VCC 20 positive supply voltage 6. Functional description Table 3. Function selection H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. Input Input/output OE An, Bn L An = Bn H Z 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit -0.5 +4.6 V [1] -0.5 +4.6 V [1] -0.5 VCC supply voltage VI input voltage VSW switch voltage enable and disable mode IIK input clamping current VI < -0.5 V -50 - mA ISK switch clamping current VI < -0.5 V -50 - mA ISW switch current VSW = 0 V to VCC - ±128 mA ICC supply current - +100 mA IGND ground current -100 - mA Tstg storage temperature -65 +150 °C Ptot total power dissipation - 500 mW [1] [2] Tamb = -40 °C to +125 °C [2] VCC + 0.5 V The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SOT360-1 (TSSOP20) package: Ptot derates linearly with 10.0 mW/K above 100 °C. For SOT764-1 (DHVQFN20) package: Ptot derates linearly with 12.9 mW/K above 111 °C. 74CBTLV3245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 7 May 2020 © Nexperia B.V. 2020. All rights reserved 3 / 15 74CBTLV3245-Q100 Nexperia 8-bit bus switch with output enable 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter VCC supply voltage VI input voltage VSW switch voltage Tamb ambient temperature Δt/ΔV input transition rise and fall rate [1] Conditions enable and disable mode VCC = 2.3 V to 3.6 V [1] Min Max Unit 2.3 3.6 V 0 3.6 V 0 VCC V -40 +125 °C - 200 ns/V Applies to control signal levels. 9. Static characteristics Table 6. Static characteristics At recommended operating conditions voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Tamb = -40 °C to +85 °C Tamb = -40 °C to +125 °C Min Typ [1] Max Min Max Unit HIGH-level input voltage VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V VCC = 3.0 V to 3.6 V 2.0 - - 2.0 - V LOW-level input voltage VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V VCC = 3.0 V to 3.6 V - - 0.9 - 0.9 V II input leakage current pin OE; VI = GND to VCC; VCC = 3.6 V - - ±1 - ±20 μA IS(OFF) OFF-state leakage VCC = 3.6 V; see Fig. 5 current - - ±1 - ±20 μA IS(ON) ON-state leakage current - - ±1 - ±20 μA IOFF power-off leakage VI or VO = 0 V to 3.6 V; VCC = 0 V current - - ±10 - ±50 μA ICC supply current VI = GND or VCC; IO = 0 A; VSW = GND or VCC; VCC = 3.6 V - - 10 - 50 μA ΔICC additional supply current pin OE; VI = VCC - 0.6 V; VSW = GND or VCC; VCC = 3.6 V - - 300 - 2000 μA CI input capacitance pin OE; VCC = 3.3 V; VI = 0 V to 3.3 V - 0.9 - - - pF CS(OFF) OFF-state capacitance VCC = 3.3 V; VI = 0 V to 3.3 V - 5.2 - - - pF CS(ON) ON-state capacitance VCC = 3.3 V; VI = 0 V to 3.3 V - 14.3 - - - pF VIH VIL [1] [2] VCC = 3.6 V; see Fig. 6 [2] All typical values are measured at Tamb = 25 °C. One input at 3 V, other inputs at VCC or GND. 74CBTLV3245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 7 May 2020 © Nexperia B.V. 2020. All rights reserved 4 / 15 74CBTLV3245-Q100 Nexperia 8-bit bus switch with output enable 9.1. Test circuits VCC VCC OE VIH IS A Bn VI OE VIL An IS IS A A GND VO An Bn GND VI VO 001aan328 001aan329 VI = VCC or GND and VO = GND or VCC. Fig. 5. VI = VCC or GND and VO = open circuit. Test circuit for measuring OFF-state leakage current (one switch) Fig. 6. Test circuit for measuring ON-state leakage current (one switch) 9.2. ON resistance Table 7. Resistance RON At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7. Symbol Parameter RON ON resistance Conditions Tamb = -40 °C to +85 °C Tamb = -40 °C to +125 °C Min Typ [1] Max Min Max ISW = 64 mA; VI = 0 V - 4.2 8.0 - 15.0 Ω ISW = 24 mA; VI = 0 V - 4.2 8.0 - 15.0 Ω ISW = 15 mA; VI = 1.7 V - 8.4 40 - 60.0 Ω ISW = 64 mA; VI = 0 V - 4.0 7.0 - 11.0 Ω ISW = 24 mA; VI = 0 V - 4.0 7.0 - 11.0 Ω ISW = 15 mA; VI = 2.4 V - 6.2 15 - 25.5 Ω VCC = 2.3 V to 2.7 V; see Fig. 8 to Fig. 10 Unit [2] VCC = 3.0 V to 3.6 V; see Fig. 11 to Fig. 13 [1] [2] Typical values are measured at Tamb = 25 °C and nominal VCC. Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is determined by the lower of the voltages of the two (A or B) terminals. 74CBTLV3245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 7 May 2020 © Nexperia B.V. 2020. All rights reserved 5 / 15 74CBTLV3245-Q100 Nexperia 8-bit bus switch with output enable 9.3. ON resistance test circuit and graphs 001aai109 11 RON (Ω) 9 7 VSW V (1) VCC 5 (2) (3) OE VIL (4) An 3 Bn GND VI ISW RON = VSW / ISW. Test circuit for measuring ON resistance (one switch) 001aai110 11 1.0 1.5 2.0 Fig. 8. VI (V) 2.5 ON resistance as a function of input voltage; VCC = 2.5 V; ISW = 15 mA 001aai111 11 RON (Ω) RON (Ω) 9 9 7 7 (1) (1) (2) 5 (2) 5 (3) (3) (4) 3 0 (4) 0.5 1.0 1.5 2.0 VI (V) 3 2.5 (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = -40 °C. Fig. 9. 0.5 (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = -40 °C. 001aan330 Fig. 7. 0 Product data sheet 0.5 1.0 1.5 2.0 VI (V) 2.5 (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = -40 °C. ON resistance as a function of input voltage; VCC = 2.5 V; ISW = 24 mA 74CBTLV3245_Q100 0 Fig. 10. ON resistance as a function of input voltage; VCC = 2.5 V; ISW = 64 mA All information provided in this document is subject to legal disclaimers. Rev. 4 — 7 May 2020 © Nexperia B.V. 2020. All rights reserved 6 / 15 74CBTLV3245-Q100 Nexperia 8-bit bus switch with output enable 001aai105 8 001aai106 8 RON (Ω) RON (Ω) 6 6 (1) (1) (2) (2) (3) 4 (3) 4 (4) 2 0 (4) 1 2 3 VI (V) 2 4 (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = -40 °C. 0 1 2 3 VI (V) 4 (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = -40 °C. Fig. 11. ON resistance as a function of input voltage; VCC = 3.3 V; ISW = 15 mA Fig. 12. ON resistance as a function of input voltage; VCC = 3.3 V; ISW = 24 mA 001aai107 7.5 RON (Ω) 6.5 5.5 (1) (2) 4.5 (3) 3.5 2.5 (4) 0 1 2 3 VI (V) 4 (1) Tamb = 125 °C. (2) Tamb = 85 °C. (3) Tamb = 25 °C. (4) Tamb = -40 °C. Fig. 13. ON resistance as a function of input voltage; VCC = 3.3 V; ISW = 64 mA 74CBTLV3245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 7 May 2020 © Nexperia B.V. 2020. All rights reserved 7 / 15 74CBTLV3245-Q100 Nexperia 8-bit bus switch with output enable 10. Dynamic characteristics Table 8. Dynamic characteristics GND = 0 V; for test circuit see Fig. 16 Symbol Parameter tpd ten tdis [1] [2] [3] [4] [5] Conditions propagation delay enable time disable time Tamb = -40 °C to +85 °C Tamb = -40 °C to +125 °C Min Typ [1] Max Min Max VCC = 2.3 V to 2.7 V - - 0.13 - 0.20 ns VCC = 3.0 V to 3.6 V - - 0.20 - 0.31 ns VCC = 2.3 V to 2.7 V 1.0 3.4 5.5 1.0 8.0 ns VCC = 3.0 V to 3.6 V 1.0 3.0 4.9 1.0 7.0 ns VCC = 2.3 V to 2.7 V 1.0 3.0 5.5 1.0 8.0 ns VCC = 3.0 V to 3.6 V 1.0 3.4 5.8 1.0 8.5 ns An to Bn or Bn to An; see Fig. 14 Unit [2][3] OE to An or Bn; see Fig. 15 OE to An or Bn; see Fig. 15 [4] [5] All typical values are measured at Tamb = 25 °C and at nominal VCC. The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the load capacitance, when driven by an ideal voltage source (zero output impedance). tpd is the same as tPLH and tPHL. ten is the same as tPZH and tPZL. tdis is the same as tPHZ and tPLZ. 10.1. Waveforms and test circuit VI input VM VM 0V tPHL tPLH VOH output VM VOL VM 001aai367 Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig. 14. The data input (An, Bn) to output (Bn, An) propagation delay times 74CBTLV3245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 7 May 2020 © Nexperia B.V. 2020. All rights reserved 8 / 15 74CBTLV3245-Q100 Nexperia 8-bit bus switch with output enable VI VM OE input VM GND tPLZ tPZL VCC output LOW to OFF OFF to LOW VM VX VOL tPHZ output HIGH to OFF OFF to HIGH tPZH VOH VY VM GND switch enabled switch disabled switch enabled 001aan331 Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig. 15. Enable and disable times Table 9. Measurement points Supply voltage Input Output VCC VM VI tr = tf VM VX VY 2.3 V to 2.7 V 0.5VCC VCC ≤ 2.0 ns 0.5VCC VOL + 0.15 V VOH - 0.15 V 3.0 V to 3.6 V 0.5VCC VCC ≤ 2.0 ns 0.5VCC VOL + 0.3 V VOH - 0.3 V VI negative pulse tW 90 % VM 0V VI positive pulse 0V VM 10 % tf tr tr tf 90 % VM VM 10 % tW VEXT VCC G VI RL VO DUT RT CL RL 001aae331 Test data is given in Table 10. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig. 16. Test circuit for measuring switching times 74CBTLV3245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 7 May 2020 © Nexperia B.V. 2020. All rights reserved 9 / 15 74CBTLV3245-Q100 Nexperia 8-bit bus switch with output enable Table 10. Test data Supply voltage Load VCC CL RL tPLH, tPHL tPZH, tPHZ tPZL, tPLZ 2.3 V to 2.7 V 30 pF 500 Ω open GND 2VCC 3.0 V to 3.6 V 50 pF 500 Ω open GND 2VCC VEXT 10.2. Additional dynamic characteristics Table 11. Additional dynamic characteristics GND = 0 V. Symbol Parameter f(-3dB) [1] -3 dB frequency response Conditions Tamb = 25 °C VCC = 3.3 V; RL = 50 Ω; see Fig. 17 [1] Unit Min Typ Max - 406 - MHz fi is biased at 0.5VCC. VCC 0.5VCC OE VIL RL Bn fi An GND dB 001aan156 Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads -3 dB. Fig. 17. Test circuit for measuring the frequency response when channel is in ON-state 74CBTLV3245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 7 May 2020 © Nexperia B.V. 2020. All rights reserved 10 / 15 74CBTLV3245-Q100 Nexperia 8-bit bus switch with output enable 11. Package outline TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm D SOT360-1 E A X c HE y v M A Z 11 20 Q A2 pin 1 index (A 3 ) A1 A θ Lp 1 L 10 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.5 0.2 8o 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT360-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-153 Fig. 18. Package outline SOT360-1 (TSSOP20) 74CBTLV3245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 7 May 2020 © Nexperia B.V. 2020. All rights reserved 11 / 15 74CBTLV3245-Q100 Nexperia 8-bit bus switch with output enable DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x 0.85 mm B D SOT764-1 A A A1 E c detail X terminal 1 index area terminal 1 index area e1 C e b 2 9 v w C A B C y1 C y L 1 10 Eh e 20 11 19 12 X Dh 0 2.5 5 mm scale Dimensions (mm are the original dimensions) Unit mm A(1) A1 b max 1.00 0.05 0.30 nom 0.90 0.02 0.25 min 0.80 0.00 0.18 c D(1) Dh E(1) Eh e e1 L v 0.2 4.6 4.5 4.4 3.15 3.00 2.85 2.6 2.5 2.4 1.15 1.00 0.85 0.5 3.5 0.5 0.4 0.3 0.1 w y 0.05 0.05 y1 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. References Outline version IEC JEDEC JEITA SOT764-1 --- MO-241 --- sot764-1_po European projection Issue date 03-01-27 14-12-12 Fig. 19. Package outline SOT764-1 (DHVQFN20) 74CBTLV3245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 7 May 2020 © Nexperia B.V. 2020. All rights reserved 12 / 15 74CBTLV3245-Q100 Nexperia 8-bit bus switch with output enable 12. Abbreviations Table 12. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MIL Military MM Machine Model 13. Revision history Table 13. Revision history Document ID Release date Data sheet status Change notice Supersedes 74CBTLV3245_Q100 v.4 20200507 Product data sheet - Modifications: • • 74CBTLV3245_Q100 v.3 20190412 Modifications: • • Section 2 updated. Table 4: Derating values for Ptot total power dissipation updated. 20161110 Modifications: • 74CBTLV3245_Q100 v.1 20160414 Product data sheet Product data sheet - 74CBTLV3245_Q100 v.2 The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. 74CBTLV3245_Q100 v.2 74CBTLV3245_Q100 74CBTLV3245_Q100 v.3 Product data sheet - 74CBTLV3245_Q100 v.1 Additional dynamic characteristics added. Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 4 — 7 May 2020 - © Nexperia B.V. 2020. All rights reserved 13 / 15 74CBTLV3245-Q100 Nexperia 8-bit bus switch with output enable equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. 14. Legal information Data sheet status Document status [1][2] Product status [3] Definition Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the internet at https://www.nexperia.com. Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 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This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This Nexperia product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or 74CBTLV3245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 7 May 2020 © Nexperia B.V. 2020. All rights reserved 14 / 15 74CBTLV3245-Q100 Nexperia 8-bit bus switch with output enable Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................1 4. Functional diagram.......................................................2 5. Pinning information......................................................2 5.1. Pinning.........................................................................2 5.2. Pin description............................................................. 3 6. Functional description................................................. 3 7. Limiting values............................................................. 3 8. Recommended operating conditions..........................4 9. Static characteristics....................................................4 9.1. Test circuits..................................................................5 9.2. ON resistance..............................................................5 9.3. ON resistance test circuit and graphs..........................6 10. Dynamic characteristics............................................ 8 10.1. Waveforms and test circuit........................................ 8 10.2. Additional dynamic characteristics...........................10 11. Package outline........................................................ 11 12. Abbreviations............................................................ 13 13. Revision history........................................................13 14. Legal information......................................................14 © Nexperia B.V. 2020. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 7 May 2020 74CBTLV3245_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 7 May 2020 © Nexperia B.V. 2020. All rights reserved 15 / 15