74HC2G66DP-Q100H

74HC2G66-Q100; 74HCT2G66-Q100 Dual single-pole single-throw analog switch Rev. 2 — 6 November 2018 Product data sheet 1. General description The 74HC2G66-Q100; 74HCT2G66-Q100 is a dual single pole, single-throw analog switch. Each switch has two input/output terminals (nY and nZ) and a digital enable input (nE). When nE is LOW, the analog switch is turned off. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits • • • • • • • • Automotive product qualification in accordance with AEC-Q100 (Grade 1) • Specified from -40 °C to +85 °C and from -40 °C to +125 °C Wide supply voltage range from 2.0 V to 10.0 V for 74HC2G66-Q100 Very low ON resistance: • 41 Ω (typ.) at VCC = 4.5 V • 30 Ω (typ.) at VCC = 6.0 V • 21 Ω (typ.) at VCC = 9.0 V High noise immunity Low power dissipation 25 mA continuous switch current Multiple package options ESD protection: • MIL-STD-883, method 3015 exceeds 2000 V • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω) 3. Ordering information Table 1. Ordering information Type number Package 74HC2G66DP-Q100 Temperature range Name Description Version -40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 -40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74HCT2G66DP-Q100 74HC2G66DC-Q100 74HCT2G66DC-Q100 Nexperia 74HC2G66-Q100; 74HCT2G66-Q100 Dual single-pole single-throw analog switch 4. Marking Table 2. Marking codes Type number Marking [1] 74HC2G66DP-Q100 H66 74HCT2G66DP-Q100 T66 74HC2G66DC-Q100 H66 74HCT2G66DC-Q100 T66 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 1Y 1Z 1E 2Z 2Y Y 2E E 001aag497 Fig. 1. Z Logic symbol Fig. 2. 001aah372 Logic diagram for 1 switch 6. Pinning information 6.1. Pinning 74HC2G66-Q100 74HCT2G66-Q100 1Y 1 8 VCC 1Z 2 7 1E 2E 3 6 2Z GND 4 5 2Y aaa-009546 Fig. 3. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8) 6.2. Pin description Table 3. Pin description Symbol Pin Description 1Y, 2Y 1, 5 independent input or output 1Z, 2Z 2, 6 independent input or output GND 4 ground (0 V) 1E, 2E 7, 3 enable input (active HIGH) VCC 8 supply voltage 74HC_HCT2G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 6 November 2018 © Nexperia B.V. 2018. All rights reserved 2 / 17 Nexperia 74HC2G66-Q100; 74HCT2G66-Q100 Dual single-pole single-throw analog switch 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level. Input nE Switch L OFF H ON 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit -0.5 +11.0 V VCC supply voltage IIK input clamping current VI < -0.5 V or VI > VCC + 0.5 V [1] - ±20 mA ISK switch clamping current VI < -0.5 V or VI > VCC + 0.5 V [1] - ±20 mA ISW switch current VSW > -0.5 V or VSW < VCC + 0.5 V - ±20 mA ICC supply current - 30 mA IGND ground current -30 - mA Tstg storage temperature -65 +150 °C Ptot total power dissipation [1] [2] Tamb = -40 °C to +125 °C per package [2] - 300 mW per switch [2] - 100 mW 74HCT2G66-Q100 Unit The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For TSSOP8 packages: above 55 °C the value of Ptot derates linearly with 2.5 mW/K. For VSSOP8 packages: above 110 °C the value of Ptot derates linearly with 8.0 mW/K. 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage VI input voltage VO output voltage VSW switch voltage Tamb ambient temperature Δt/ΔV input transition rise and fall rate [1] Conditions 74HC2G66-Q100 Min Typ Max Min Typ Max 2.0 5.0 10.0 4.5 5.0 5.5 V 0 - VCC 0 - VCC V 0 - VCC 0 - VCC V 0 - VCC 0 - VCC V -40 +25 +125 -40 +25 +125 °C VCC = 2.0 V - - 625 - - - ns/V VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V VCC = 10.0 V - - 35 - - - ns/V [1] To avoid drawing VCC current out of pin nZ, when switch current flows in pin nY, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into pin nZ, no VCC current will flow out of terminal nY. In this case there is no limit for the voltage drop across the switch, but the voltage at pins nY and nZ may not exceed VCC or GND. 74HC_HCT2G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 6 November 2018 © Nexperia B.V. 2018. All rights reserved 3 / 17 Nexperia 74HC2G66-Q100; 74HCT2G66-Q100 Dual single-pole single-throw analog switch 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions -40 °C to +85 °C Min Typ [1] Max VCC = 2.0 V 1.5 1.2 VCC = 4.5 V 3.15 2.4 VCC = 6.0 V 4.2 VCC = 9.0 V -40 °C to +125 °C Unit Min Max - 1.5 - V - 3.15 - V 3.2 - 4.2 - V 6.3 4.7 - 6.3 - V VCC = 2.0 V - 0.8 0.5 - 0.5 V VCC = 4.5 V - 2.1 1.35 - 1.35 V VCC = 6.0 V - 2.8 1.8 - 1.8 V VCC = 9.0 V - 4.3 2.7 - 2.7 V VCC = 6.0 V - - ±0.1 - ±0.1 μA VCC = 9.0 V 74HC2G66-Q100 VIH HIGH-level input voltage VIL LOW-level input voltage II input leakage current nE; VI = VCC or GND - - ±0.2 - ±0.2 μA IS(OFF) OFF-state leakage current nY or nZ; VCC = 9.0 V; see Fig. 4 - 0.1 1.0 - 1.0 μA IS(ON) ON-state leakage current nY or nZ; VCC = 9.0 V; see Fig. 5 - 0.1 1.0 - 1.0 μA ICC supply current nE, nY and nZ = VCC or GND VCC = 6.0 V - - 10 - 20 μA VCC = 9.0 V - - 20 - 40 μA CI input capacitance - 3.5 - - - pF CPD power dissipation capacitance - 9 - - - pF CS(ON) ON-state capacitance - 8 - - - pF 74HCT2G66-Q100 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 V II input leakage current nE; VI = VCC or GND; VCC = 5.5 V - - ±1.0 - ±1.0 μA IS(OFF) OFF-state leakage current nY or nZ; VCC = 5.5 V; see Fig. 4 - 0.1 1.0 - 1.0 μA IS(ON) ON-state leakage current nY or nZ; VCC = 5.5 V; see Fig. 5 - 0.1 1.0 - 1.0 μA ICC supply current nE, nY and nZ = VCC or GND; VCC = 4.5 V to 5.5 V - - 10 - 20 μA ΔICC additional supply current nE = VCC - 2.1 V; IO = 0 A; VCC = 4.5 V to 5.5 V; - - 375 - 410 μA CI input capacitance - 3.5 - - - pF CPD power dissipation capacitance - 9 - - - pF CS(ON) ON-state capacitance - 8 - - - pF [1] Typical values are measured at Tamb = 25 °C. 74HC_HCT2G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 6 November 2018 © Nexperia B.V. 2018. All rights reserved 4 / 17 Nexperia 74HC2G66-Q100; 74HCT2G66-Q100 Dual single-pole single-throw analog switch 10.1. Test circuits VCC VCC nE VIL IS nE VIH nY nZ IS GND VI nY IS VO nZ GND VI VO 001aaj465 001aaj466 VI = VCC or GND and VO = GND or VCC. Fig. 4. Test circuit for measuring OFF-state leakage current VI = VCC or GND and VO = open circuit. Fig. 5. Test circuit for measuring ON-state leakage current 10.2. ON resistance Table 8. ON resistance for 74HC2G66-Q100 and 74HCT2G66-Q100 At recommended operating conditions; voltages are referenced to GND (ground 0 V); for graph see Fig. 7. Symbol Parameter Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ [1] Max Min Max ISW = 0.1 mA; VCC = 2.0 V - 250 - - - Ω ISW = 1.0 mA; VCC = 4.5 V - 41 118 - 142 Ω ISW = 1.0 mA; VCC = 6.0 V - 30 105 - 126 Ω ISW = 1.0 mA; VCC = 9.0 V - 21 88 - 105 Ω ISW = 0.1 mA; VCC = 2.0 V - 65 - - - Ω ISW = 1.0 mA; VCC = 4.5 V - 28 95 - 115 Ω ISW = 1.0 mA; VCC = 6.0 V - 22 82 - 100 Ω ISW = 1.0 mA; VCC = 9.0 V - 18 70 - 80 Ω ISW = 0.1 mA; VCC = 2.0 V - 65 - - - Ω ISW = 1.0 mA; VCC = 4.5 V - 31 106 - 128 Ω ISW = 1.0 mA; VCC = 6.0 V - 23 94 - 113 Ω ISW = 1.0 mA; VCC = 9.0 V - 19 78 - 95 Ω VCC = 4.5 V - 5 - - - Ω VCC = 6.0 V - 4 - - - Ω VCC = 9.0 V - 3 - - - Ω 74HC2G66-Q100 [2] RON(peak) ON resistance (peak) RON(rail) VI = GND to VCC; see Fig. 6 and Fig. 7 ON resistance (rail) VI = GND; see Fig. 6 and Fig. 7 VI = VCC; see Fig. 6 and Fig. 7 ΔRON ON resistance mismatch between channels 74HC_HCT2G66_Q100 Product data sheet VI = VCC to GND; see Fig. 6 and Fig. 7 All information provided in this document is subject to legal disclaimers. Rev. 2 — 6 November 2018 © Nexperia B.V. 2018. All rights reserved 5 / 17 Nexperia 74HC2G66-Q100; 74HCT2G66-Q100 Dual single-pole single-throw analog switch Symbol Parameter Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ [1] Max Min Max - 41 118 - 142 Ω - 28 95 - 115 Ω - 31 106 - 128 Ω - 5 - - - Ω 74HCT2G66-Q100 VI = GND to VCC; see Fig. 6 and Fig. 7 RON(peak) ON resistance (peak) RON(rail) ISW = 1.0 mA; VCC = 4.5 V ON resistance (rail) VI = GND; see Fig. 6 and Fig. 7 ISW = 1.0 mA; VCC = 4.5 V VI = VCC; see Fig. 6 and Fig. 7 ISW = 1.0 mA; VCC = 4.5 V ΔRON [1] [2] VI = VCC to GND; see Fig. 6 and Fig. 7 ON resistance mismatch between channels VCC = 4.5 V Typical values are measured at Tamb = 25 °C. At supply voltages approaching 2 V, the ON resistance becomes extremely non-linear. Therefore it is recommended that these devices be used to transmit digital signals only, when using this supply voltage. 10.3. ON resistance test circuit and graphs mnb006 60 RON (Ω) VSW VCC = 4.5 V 40 VCC VCC = 6.0 V nE VIH 20 nY VI GND ISW 0 001aaj467 RON = VSW / ISW. Fig. 6. Test circuit for measuring ON resistance 74HC_HCT2G66_Q100 Product data sheet VCC = 9.0 V nZ 0 2 4 6 8 VI (V) 10 Tamb = 25 °C. Fig. 7. Typical ON resistance as a function of input voltage All information provided in this document is subject to legal disclaimers. Rev. 2 — 6 November 2018 © Nexperia B.V. 2018. All rights reserved 6 / 17 Nexperia 74HC2G66-Q100; 74HCT2G66-Q100 Dual single-pole single-throw analog switch 11. Dynamic characteristics Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); For test circuit see Fig. 10. Symbol Parameter Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ [1] Max Min Max VCC = 2.0 V - 6.5 65 - 80 ns VCC = 4.5 V - 2 13 - 15 ns VCC = 6.0 V - 1.5 11 - 14 ns - 1.2 10 - 12 ns VCC = 2.0 V - 40 125 - 150 ns VCC = 4.5 V - 12 29 - 30 ns VCC = 6.0 V - 10 21 - 26 ns - 7 16 - 20 ns VCC = 2.0 V - 21 145 - 175 ns VCC = 4.5 V - 12 29 - 35 ns VCC = 6.0 V - 11 28 - 33 ns 74HC2G66-Q100 tpd propagation delay nY to nZ or nZ to nY; RL = ∞ Ω; see Fig. 8 [2] VCC = 9.0 V ten enable time nE to nY or nZ; see Fig. 9 [2] VCC = 9.0 V tdis disable time nE to nY or nZ; see Fig. 9 [2] VCC = 9.0 V CPD power dissipation capacitance - 10 23 - 27 ns VI = GND to VCC [3] - 9 - - - pF 74HCT2G66-Q100 tpd propagation delay nY to nZ or nZ to nY; RL = ∞ Ω; VCC = 4.5 V; see Fig. 8 [2] - 2 15 - 18 ns ten enable time nE to nY or nZ; VCC = 4.5; see Fig. 9 [2] - 13 30 - 36 ns tdis disable time nE to nY or nZ; VCC = 4.5 V; see Fig. 9 [2] - 13 44 - 53 ns CPD power dissipation capacitance VI = GND to VCC - 1.5 V [3] - 9 - - - pF [1] [2] [3] All typical values are measured at Tamb = 25 °C. tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. CPD is used to determine the dynamic power dissipation PD (μW). 2 2 PD = CPD × VCC × fi + Σ((CL × CSW) × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; CSW = maximum switch capacitance in pF (see Table 7); VCC = supply voltage in volts; 2 Σ((CL × CSW) × VCC × fo) = sum of outputs. 74HC_HCT2G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 6 November 2018 © Nexperia B.V. 2018. All rights reserved 7 / 17 Nexperia 74HC2G66-Q100; 74HCT2G66-Q100 Dual single-pole single-throw analog switch 11.1. Waveforms and test circuit VI nY or nZ input VM VM GND t PLH t PHL VOH nZ or nY output VM VM VOL 001aaa541 Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig. 8. Input (nY or nZ) to output (nZ or nY) propagation delays VI nE input VM GND t PLZ nY or nZ output LOW-to-OFF OFF-to-LOW t PZL VCC VM VX VOL t PZH t PHZ nY or nZ output HIGH-to-OFF OFF-to-HIGH VOH VY VM GND switch enabled switch disabled switch enabled 001aaa542 Measurement points are given in Table 10. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig. 9. Enable and disable times Table 10. Measurement points Type Input Output VM VM VX VY 74HC2G66-Q100 0.5VCC 0.5VCC VOL + 10 % VOH - 10 % 74HCT2G66-Q100 1.3 V 1.3 V VOL + 10 % VOH - 10 % 74HC_HCT2G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 6 November 2018 © Nexperia B.V. 2018. All rights reserved 8 / 17 Nexperia 74HC2G66-Q100; 74HCT2G66-Q100 Dual single-pole single-throw analog switch VI negative pulse tW 90 % VM 0V VI positive pulse 0V VM 10 % tf tr tr tf 90 % VM VM 10 % tW VCC G VI DUT VCC VO RT RL S1 open CL 001aad983 Test data is given in Table 11. Definitions for test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Fig. 10. Test circuit for measuring switching times Table 11. Test data Type Input Load S1 position VI tr, tf [1] CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ 74HC2G66-Q100 GND to VCC 6 ns 50 pF 1 kΩ open GND VCC 74HCT2G66-Q100 GND to 3 V 6 ns 50 pF 1 kΩ open GND VCC [1] There is no constraint on tr, tf with a 50 % duty factor when measuring fmax. 74HC_HCT2G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 6 November 2018 © Nexperia B.V. 2018. All rights reserved 9 / 17 Nexperia 74HC2G66-Q100; 74HCT2G66-Q100 Dual single-pole single-throw analog switch 11.2. Additional dynamic characteristics Table 12. Additional dynamic characteristics for 74HC2G66-Q100 and 74HCT2G66-Q100 GND = 0 V; tr = tf = 6.0 ns; CL = 50 pF; unless otherwise specified. All typical values are measured at Tamb = 25 °C. Symbol Parameter Conditions THD fi = 1 kHz; RL = 10 kΩ; see Fig. 11 total harmonic distortion Min Typ Max Unit VCC = 4.5 V; VI = 4.0 V (p-p) - 0.04 - % VCC = 9.0 V; VI = 8.0 V (p-p) - 0.02 - % VCC = 4.5 V; VI = 4.0 V (p-p) - 0.12 - % VCC = 9.0 V; VI = 8.0 V (p-p) - 0.06 - % VCC = 4.5 V - 180 - MHz VCC = 9.0 V - 200 - MHz VCC = 4.5 V - -50 - dB VCC = 9.0 V - -50 - dB VCC = 4.5 V - 110 - mV VCC = 9.0 V - 220 - mV VCC = 4.5 V - -60 - dB VCC = 9.0 V - -60 - dB fi = 10 kHz; RL = 10 kΩ; see Fig. 11 f(-3dB) αiso -3 dB frequency response RL = 50 Ω; CL = 10 pF; see Fig. 12 and Fig. 13 RL = 600 Ω; fi = 1 MHz; see Fig. 14 and Fig. 15 isolation (OFF-state) Vct between digital input and switch (peak to peak value); RL = 600 Ω; fi = 1 MHz; see Fig. 16 crosstalk voltage Xtalk between switches; RL = 600 Ω; fi = 1 MHz; see Fig. 17 crosstalk 11.3. Test circuits and graphs VCC nE VIH VCC nE VIH nY/nZ nY/nZ fi 2RL 10 µF 2RL 0.1 µF VCC nZ/nY VCC nZ/nY VO 2RL CL dB VO 001aaj469 fi 2RL CL D 001aaj468 Fig. 11. Test circuit for measuring total harmonic distortion 74HC_HCT2G66_Q100 Product data sheet With fi = 1 MHz adjust the switch input voltage for a 0 dBm level at the switch output, (0 dBm = 1 mW into 50 Ω). Then Increase the input frequency until the dB meter reads -3 dB. Fig. 12. Test circuit for measuring the -3 dB frequency response All information provided in this document is subject to legal disclaimers. Rev. 2 — 6 November 2018 © Nexperia B.V. 2018. All rights reserved 10 / 17 Nexperia 74HC2G66-Q100; 74HCT2G66-Q100 Dual single-pole single-throw analog switch mna083 5 (dB) 0 -5 10 102 103 104 105 fi (kHz) 106 Test conditions: VCC = 4.5 V; GND = 0 V; RL = 50 Ω; RSOURCE = 1 kΩ. Fig. 13. Typical -3 dB frequency response VCC VCC nE VIL 2RL 0.1 µF nY/nZ nZ/nY fi VO CL 2RL dB 001aaj470 Adjust the switch input voltage for a 0 dBm level (0 dBm = 1 mW into 600 Ω) Fig. 14. Test circuit for measuring isolation (OFF-state) mna082 0 (dB) - 20 - 40 - 60 - 80 - 100 10 102 103 104 105 fi (kHz) 106 Test conditions: VCC = 4.5 V; GND = 0 V; RL = 50 Ω; RSOURCE = 1 kΩ. Fig. 15. Typical isolation (OFF-state) as a function of frequency 74HC_HCT2G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 6 November 2018 © Nexperia B.V. 2018. All rights reserved 11 / 17 Nexperia 74HC2G66-Q100; 74HCT2G66-Q100 Dual single-pole single-throw analog switch VCC nE VCC GND 2RL nY/nZ VCC 2RL nZ/nY DUT 2RL 2RL oscilloscope CL GND mnb011 a. Circuit V(p- p) mnb012 b. Crosstalk voltage Adjust the switch input voltage for a 0 dBm level (0 dBm = 1 mW into 600 Ω) Fig. 16. Test circuit for measuring crosstalk voltage (between the digital input and the switch) VCC 1E VIH 0.1 µF RL 2RL 1Y or 1Z 1Z or 1Y CHANNEL ON fi 2RL CL V VO1 V VO2 2E VIL VCC VCC 2RL 2RL 2Y or 2Z 2RL 2Z or 2Y CHANNEL OFF 2RL CL 001aai846 Adjust the switch input voltage for a 0 dBm level (0 dBm = 1 mW into 600 Ω) Fig. 17. Test circuit for measuring crosstalk (between the switches) 74HC_HCT2G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 6 November 2018 © Nexperia B.V. 2018. All rights reserved 12 / 17 Nexperia 74HC2G66-Q100; 74HCT2G66-Q100 Dual single-pole single-throw analog switch 12. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm D E A SOT505-2 X c HE y v M A Z 5 8 A A2 pin 1 index (A3) A1 θ Lp L 1 4 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e HE L Lp v w y Z(1) θ mm 1.1 0.15 0.00 0.95 0.75 0.25 0.38 0.22 0.18 0.08 3.1 2.9 3.1 2.9 0.65 4.1 3.9 0.5 0.47 0.33 0.2 0.13 0.1 0.70 0.35 8° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT505-2 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 02-01-16 --- Fig. 18. Package outline SOT505-2 (TSSOP8) 74HC_HCT2G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 6 November 2018 © Nexperia B.V. 2018. All rights reserved 13 / 17 Nexperia 74HC2G66-Q100; 74HCT2G66-Q100 Dual single-pole single-throw analog switch VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm D SOT765-1 E A X c y HE v A Z 5 8 Q A A2 A1 pin 1 index (A3) θ Lp 1 detail X 4 e L w bp 0 5 mm scale Dimensions (mm are the original dimensions) Unit mm A max. max nom min 1 A1 A2 0.15 0.85 0.00 0.60 A3 0.12 D(1) E(2) 0.27 0.23 2.1 2.4 0.17 0.08 1.9 2.2 bp c e HE 0.5 3.2 3.0 L 0.4 Lp Q 0.40 0.21 0.15 0.19 v w y 0.2 0.08 0.1 Z(1) θ 0.4 8° 0.1 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. Outline version SOT765-1 References IEC JEDEC JEITA sot765-1_po European projection Issue date 07-06-02 16-05-31 MO-187 Fig. 19. Package outline SOT765-1 (VSSOP8) 74HC_HCT2G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 6 November 2018 © Nexperia B.V. 2018. All rights reserved 14 / 17 Nexperia 74HC2G66-Q100; 74HCT2G66-Q100 Dual single-pole single-throw analog switch 13. Abbreviations Table 13. Abbreviations Acronym Description DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MIL Military MM Machine Model 14. Revision history Table 14. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT2G66_Q100 v.2 20181106 Product data sheet - Modifications: • • • • 74HC_HCT2G66_Q100 v.1 74HC_HCT2G66_Q100 Product data sheet 74HC_HCT2G66_Q100 v.1 The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Corrected Fig. 2 Package outline drawing SOT765-1 updated 20131118 Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 2 — 6 November 2018 - © Nexperia B.V. 2018. All rights reserved 15 / 17 Nexperia 74HC2G66-Q100; 74HCT2G66-Q100 Dual single-pole single-throw analog switch equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. 15. Legal information Data sheet status Document status [1][2] Product status [3] Definition Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Objective [short] data sheet Development This document contains data from the objective specification for product development. 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In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This Nexperia product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or 74HC_HCT2G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 6 November 2018 © Nexperia B.V. 2018. All rights reserved 16 / 17 Nexperia 74HC2G66-Q100; 74HCT2G66-Q100 Dual single-pole single-throw analog switch Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................1 4. Marking.......................................................................... 2 5. Functional diagram.......................................................2 6. Pinning information......................................................2 6.1. Pinning.........................................................................2 6.2. Pin description............................................................. 2 7. Functional description................................................. 3 8. Limiting values............................................................. 3 9. Recommended operating conditions..........................3 10. Static characteristics..................................................4 10.1. Test circuits................................................................5 10.2. ON resistance............................................................5 10.3. ON resistance test circuit and graphs........................6 11. Dynamic characteristics.............................................7 11.1. Waveforms and test circuit........................................ 8 11.2. Additional dynamic characteristics........................... 10 11.3. Test circuits and graphs........................................... 10 12. Package outline........................................................ 13 13. Abbreviations............................................................ 15 14. Revision history........................................................15 15. Legal information......................................................16 © Nexperia B.V. 2018. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 6 November 2018 74HC_HCT2G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 6 November 2018 © Nexperia B.V. 2018. All rights reserved 17 / 17