74LVT16245BDGG,112

74LVT16245B; 74LVTH16245B 3.3 V 16-bit transceiver; 3-state Rev. 11 — 31 October 2018 Product data sheet 1. General description The 74LVT16245B; 74LVTH16245B is a high-performance BiCMOS product designed for VCC operation at 3.3 V. This device is a 16-bit transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The control function implementation minimizes external timing requirements. The device features an output enable input (nOE) for easy cascading and a direction input (nDIR) for direction control. 2. Features and benefits • • • • • • • • • • • 16-bit bidirectional bus interface 3-state buffers Output capability: +64 mA and -32 mA TTL input and output switching levels Input and output interface capability to systems at 5 V supply Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs Live insertion and extraction permitted Power-up 3-state No bus current loading when output is tied to 5 V bus Latch-up protection: • JESD78B Class II exceeds 500 mA ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V 3. Ordering information Table 1. Ordering information Type number Package 74LVT16245BDL Temperature range Name Description Version -40 °C to +85 °C SSOP48 plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1 -40 °C to +85 °C TSSOP48 plastic thin shrink small outline package; 48 leads; SOT362-1 body width 6.1 mm 74LVTH16245BDL 74LVT16245BDGG 74LVTH16245BDGG 74LVT16245B; 74LVTH16245B Nexperia 3.3 V 16-bit transceiver; 3-state 4. Functional diagram 2DIR 1DIR 2OE 1OE 2A0 1A0 1B0 1A1 2B0 2A1 1B1 1A2 2B1 2A2 1B2 1A3 2B2 2A3 1B3 1A4 2B3 2A4 1B4 1A5 2B4 2A5 1B5 1A6 2B5 2A6 1B6 2B6 2A7 1A7 1B7 2B7 001aaa789 Fig. 1. Logic symbol 74LVT_LVTH16245B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 31 October 2018 © Nexperia B.V. 2018. All rights reserved 2 / 14 74LVT16245B; 74LVTH16245B Nexperia 3.3 V 16-bit transceiver; 3-state 1OE 1DIR 48 1 25 2OE 24 2DIR 1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7 47 G3 3EN1 [BA] 3EN2 [AB] G6 6EN4 [BA] 6EN5 [AB] 2 1 2 46 3 44 5 43 6 41 8 40 9 38 11 37 12 36 35 13 4 5 14 33 16 32 17 30 19 29 20 27 22 26 23 1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7 2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7 mna709 Fig. 2. IEC logic symbol 74LVT_LVTH16245B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 31 October 2018 © Nexperia B.V. 2018. All rights reserved 3 / 14 74LVT16245B; 74LVTH16245B Nexperia 3.3 V 16-bit transceiver; 3-state 5. Pinning information 5.1. Pinning 74LVT16245B 74LVTH16245B 1DIR 1 48 1OE 1B0 2 47 1A0 1B1 3 46 1A1 GND 4 45 GND 1B2 5 44 1A2 1B3 6 43 1A3 VCC 7 42 VCC 1B4 8 41 1A4 1B5 9 40 1A5 GND 10 39 GND 1B6 11 38 1A6 1B7 12 37 1A7 2B0 13 36 2A0 2B1 14 35 2A1 GND 15 34 GND 2B2 16 33 2A2 2B3 17 32 2A3 VCC 18 31 VCC 2B4 19 30 2A4 2B5 20 29 2A5 GND 21 28 GND 2B6 22 27 2A6 2B7 23 26 2A7 2DIR 24 25 2OE 001aae471 Fig. 3. Pin configuration SOT370-1 (SSOP48) and SOT362-1 (TSSOP48) 5.2. Pin description Table 2. Pin description Symbol Pin Description 1DIR, 2DIR 1, 24 direction control input 1B0, 1B1, 1B2, 1B3, 1B4, 1B5, 1B6, 1B7 2, 3, 5, 6, 8, 9, 11, 12 data input/output 2B0, 2B1, 2B2, 2B3, 2B4, 2B5, 2B6, 2B7 13, 14, 16, 17, 19, 20, 22, 23 data input/output GND 4, 10, 15, 21, 28, 34, 39, 45 ground (0 V) VCC 7, 18, 31, 42 supply voltage 1OE, 2OE 48, 25 output enable input (active LOW) 2A0, 2A1, 2A2, 2A3, 2A4, 2A5, 2A6, 2A7 36, 35, 33, 32, 30, 29, 27, 26 data input/output 1A0, 1A1, 1A2, 1A3, 1A4, 1A5, 1A6, 1A7 47, 46, 44, 43, 41, 40, 38, 37 data input/output 74LVT_LVTH16245B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 31 October 2018 © Nexperia B.V. 2018. All rights reserved 4 / 14 74LVT16245B; 74LVTH16245B Nexperia 3.3 V 16-bit transceiver; 3-state 6. Functional description Table 3. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. Control Input/output nOE nDIR nAn nBn L L output nAn = nBn input L H input output nBn = nAn H X Z Z 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions VCC supply voltage VI input voltage VO output voltage output in OFF-state or HIGH-state IIK input clamping current IOK IO Unit -0.5 +4.6 V -0.5 +7.0 V [1] -0.5 +7.0 V VI < 0 V -50 - mA output clamping current VO < 0 V -50 - mA output current output in LOW-state - 128 mA output in HIGH-state -64 - mA -65 +150 °C [2] - 150 °C [3] - 500 mW storage temperature Tj junction temperature Ptot total power dissipation [3] Max [1] Tstg [1] [2] Min Tamb = -40 °C to +85 °C; The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. Above 60 °C the value of Ptot derates linearly with 5.5 mW/K. 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit VCC supply voltage 2.7 - 3.6 V VI input voltage 0 - 5.5 V VIH HIGH-level input voltage 2.0 - - V VIL LOW-level input voltage - - 0.8 V IOH HIGH-level output current -32 - - mA IOL LOW-level output current - - 32 mA Tamb ambient temperature in free-air Δt/ΔV input transition rise and fall rate outputs enabled none current duty cycle ≤ 50 %; fi ≥ 1 kHz 74LVT_LVTH16245B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 31 October 2018 - - 64 mA -40 - +85 °C - - 10 ns/V © Nexperia B.V. 2018. All rights reserved 5 / 14 74LVT16245B; 74LVTH16245B Nexperia 3.3 V 16-bit transceiver; 3-state 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; Tamb = -40 °C to +85 °C ; Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ [1] Max VIK input clamping voltage VCC = 2.7 V; IIK = -18 mA -1.2 -0.85 - V VOH HIGH-level output voltage IOH = -100 μA; VCC = 2.7 V to 3.6 V VCC - 0.2 VCC - V IOH = -8 mA; VCC = 2.7 V 2.4 2.5 - V IOH = -32 mA; VCC = 3.0 V 2.0 2.3 - V IOL = 100 μA - 0.07 0.2 V IOL = 24 mA - 0.3 0.5 V IOL = 16 mA - 0.25 0.4 V IOL = 32 mA - 0.3 0.5 V IOL = 64 mA - 0.4 0.55 V VCC = 3.6 V; VI = VCC or GND - 0.1 ±1 μA VCC = 0 V or 3.6 V; VI = 5.5 V - 0.1 10 μA VI = 5.5 V - 0.1 20 μA VI = VCC - 0.5 10 μA VI = 0 V -5 -0.1 - μA - 0.1 ±100 μA VOL Unit LOW-level output voltage VCC = 2.7 V VCC = 3.0 V II input leakage current control pins input/output data pins; VCC = 3.6 V [2] IOFF power-off leakage current VCC = 0 V; VI or VO = 0 V to 4.5 V IBHL bus hold LOW current VCC = 3 V; VI = 0.8 V 75 135 - μA IBHH bus hold HIGH current VCC = 3 V; VI = 2.0 V - -135 -75 μA IBHLO bus hold LOW overdrive current nAn input; VI = 0 V to 3.6 V; VCC = 3.6 V [3] 500 - - μA IBHHO bus hold HIGH overdrive current nAn input; VI = 0 V to 3.6 V; VCC = 3.6 V [3] - - -500 μA ILO output leakage current output in HIGH-state when VO ˃ VCC; VO = 5.5 V; VCC = 3.0 V - 75 125 μA - 40 ±100 μA IO(pu/pd) power-up/power-down output current 74LVT_LVTH16245B Product data sheet VCC ≤ 1.2 V; VO = 0.5 V to VCC; VI = GND or VCC; nOE = don’t care [4] All information provided in this document is subject to legal disclaimers. Rev. 11 — 31 October 2018 © Nexperia B.V. 2018. All rights reserved 6 / 14 74LVT16245B; 74LVTH16245B Nexperia 3.3 V 16-bit transceiver; 3-state Symbol Parameter Conditions ICC VCC = 3.6 V; VI = GND or VCC; IO = 0 A supply current Min Typ [1] Max Unit - 0.07 0.12 mA outputs HIGH outputs LOW outputs disabled - 4.7 6.0 mA [5] - 0.07 0.12 mA [6] - 0.1 0.2 mA ΔICC additional supply current per input pin; VCC = 3.0 V to 3.6 V; one input at VCC - 0.6 V, other inputs at VCC or GND CI input capacitance pins nDIR and nOE, VO = 0 V or 3.0 V - 3 - pF Cio(off) off-state input/output capacitance pins nAn and nBn, outputs disabled; VO = GND or VCC - 9 - pF [1] [2] [3] [4] [5] [6] Typical values are measured at VCC = 3.3 V and at Tamb = 25 °C. Unused pins at VCC or GND. This is the bus hold overdrive current required to force the input to the opposite logic state. This parameter is valid for any VCC between 0 V and 1.2 V with a transition time of up to 10 ms. From VCC = 1.2 V to VCC = 3.3 V ± 0.3 V a transition time of 100 μs is permitted. This parameter is valid for Tamb = 25 °C only. ICC is measured with outputs pulled to VCC or GND. This is the increase in supply current for each input at the specified voltage level other than VCC or GND. 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); Tamb = -40 °C to +85 °C; For test circuit see Fig. 6. Symbol Parameter Conditions tPLH nAn to nBn or nBn to nAn; see Fig. 4 LOW to HIGH propagation delay VCC = 2.7 V VCC = 3.0 V to 3.6 V tPHL HIGH to LOW propagation delay VCC = 2.7 V OFF-state to HIGH propagation delay nOE to nAn or nBn; see Fig. 5 OFF-state to LOW propagation delay nOE to nAn or nBn; see Fig. 5 VCC = 2.7 V VCC = 3.0 V to 3.6 V tPZL VCC = 2.7 V VCC = 3.0 V to 3.6 V tPHZ HIGH to OFF-state propagation delay LOW to OFF-state propagation delay VCC = 2.7 V Unit - - 3.5 ns 1.0 1.9 3.3 ns - - 3.5 ns 1.0 1.7 3.3 ns - - 5.3 ns 1.0 2.8 4.5 ns - - 5.1 ns 1.0 2.8 4.1 ns - - 5.7 ns 1.5 3.2 5.1 ns - - 4.6 ns 1.5 3.0 4.6 ns nOE to nAn or nBn; see Fig. 5 VCC = 2.7 V VCC = 3.0 V to 3.6 V [1] Max nOE to nAn or nBn; see Fig. 5 VCC = 3.0 V to 3.6 V tPLZ Typ [1] nAn to nBn or nBn to nAn; see Fig. 4 VCC = 3.0 V to 3.6 V tPZH Min All typical values are at VCC = 3.3 V and Tamb = 25 °C. 74LVT_LVTH16245B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 31 October 2018 © Nexperia B.V. 2018. All rights reserved 7 / 14 74LVT16245B; 74LVTH16245B Nexperia 3.3 V 16-bit transceiver; 3-state 10.1. Waveforms and test circuit VI nAn, nBn input VM GND t PHL t PLH VOH nBn, nAn output VM VOL mna477 Measurements points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig. 4. Propagation delay input (nAn, nBn) to output (nBn, nAn) VI nOE input VM 0V tPZL tPLZ 3.0 V nAn or nBn output VM VX VOL tPHZ tPZH VOH VY nBn or nAn output VM 0V 001aaj658 Measurements points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig. 5. 3-state output enable and disable times Table 8. Measurement points Input Output VM VM VX VY 1.5 V 1.5 V VOL + 0.3 V VOH - 0.3 V 74LVT_LVTH16245B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 31 October 2018 © Nexperia B.V. 2018. All rights reserved 8 / 14 74LVT16245B; 74LVTH16245B Nexperia 3.3 V 16-bit transceiver; 3-state VI negative pulse tW 90 % VM 0V VI tf tr tr tf 90 % positive pulse 0V VM 10 % VM VM 10 % tW VEXT VCC PULSE GENERATOR VI RL VO DUT RT CL RL 001aae235 Test data is given in Table 9. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig. 6. Test circuit for measuring switching times Table 9. Test data Input Load VEXT VI fi tW tr, tf CL RL tPHZ, tPZH tPLZ, tPZL tPLH, tPHL 2.7 V ≤ 10 MHz 500 ns ≤ 2.5 ns 50 pF 500 Ω GND 6V open 74LVT_LVTH16245B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 31 October 2018 © Nexperia B.V. 2018. All rights reserved 9 / 14 74LVT16245B; 74LVTH16245B Nexperia 3.3 V 16-bit transceiver; 3-state 11. Package outline SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1 D E A X c y HE v M A Z 25 48 Q A2 A1 A (A 3 ) θ pin 1 index Lp L 24 1 detail X w M bp e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2.8 0.4 0.2 2.35 2.20 0.25 0.3 0.2 0.22 0.13 16.00 15.75 7.6 7.4 0.635 10.4 10.1 1.4 1.0 0.6 1.2 1.0 0.25 0.18 0.1 0.85 0.40 8o 0o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT370-1 Fig. 7. REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-118 Package outline SOT370-1 (SSOP48) 74LVT_LVTH16245B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 31 October 2018 © Nexperia B.V. 2018. All rights reserved 10 / 14 74LVT16245B; 74LVTH16245B Nexperia 3.3 V 16-bit transceiver; 3-state TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm SOT362-1 D E A X c v HE y A Z 48 25 Q A2 A1 (A3) pin 1 index A θ Lp 1 L 24 bp e detail X w 0 5 mm 2.5 scale Dimensions (mm are the original dimensions) Unit mm max nom min A 1.2 A1 A2 0.15 1.05 0.05 0.85 A3 0.25 bp c D(1) E(2) 0.28 0.2 12.6 6.2 0.17 0.1 12.4 6.0 e HE 0.5 8.3 7.9 L 1 Lp Q 0.8 0.50 0.4 0.35 v w 0.25 0.08 y 0.1 Z θ 0.8 8° 0.4 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. Outline version SOT362-1 Fig. 8. References IEC JEDEC JEITA sot362-1_po European projection Issue date 03-02-19 13-08-05 MO-153 Package outline SOT362-1 (TSSOP48) 74LVT_LVTH16245B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 31 October 2018 © Nexperia B.V. 2018. All rights reserved 11 / 14 74LVT16245B; 74LVTH16245B Nexperia 3.3 V 16-bit transceiver; 3-state 12. Abbreviations Table 10. Abbreviations Acronym Description BiCMOS Bipolar Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 13. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVT_LVTH16245B v.11 20181031 Product data sheet - Modifications: • • • • 74LVT_LVTH16245B v.10 The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Type numbers 74LVT16245BEV (SOT702-1), 74LVT16245BBX and 74LVTH16245BBX (SOT1134-2) removed. Package outline drawing SOT362-1 updated. 74LVT_LVTH16245B v.10 20120301 Modifications: • 74LVT_LVTH16245B v.9 20111122 Modifications: • 74LVT_LVTH16245B v.8 20110617 74LVT_LVTH16245B v.7 20100329 74LVT_LVTH16245B v.6 Product data sheet - 74LVT_LVTH16245B v.9 For type number 74LVT16245BBX and 74LVTH16245BBX the sot code has changed to SOT1134-2. - 74LVT_LVTH16245B v.8 Product data sheet - 74LVT_LVTH16245B v.7 Product data sheet - 74LVT_LVTH16245B v.6 20090409 Product data sheet - 74LVT_LVTH16245B v.5 74LVT_LVTH16245B v.5 20090312 Product data sheet - 74LVT_LVTH16245B v.4 74LVT_LVTH16245B v.4 20060323 Product data sheet - 74LVT16245B v.3 74LVT16245B v.3 20021031 Product data sheet - 74LVT16245B v.2 74LVT16245B v.2 19980219 Product specification - 74LVT16245B v.1 74LVT16245B v.1 19940523 Product specification - - 74LVT_LVTH16245B Product data sheet Product data sheet Legal pages updated. All information provided in this document is subject to legal disclaimers. Rev. 11 — 31 October 2018 © Nexperia B.V. 2018. All rights reserved 12 / 14 74LVT16245B; 74LVTH16245B Nexperia 3.3 V 16-bit transceiver; 3-state 14. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. 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Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal 74LVT_LVTH16245B Product data sheet Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. 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Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. 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Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 11 — 31 October 2018 © Nexperia B.V. 2018. All rights reserved 13 / 14 74LVT16245B; 74LVTH16245B Nexperia 3.3 V 16-bit transceiver; 3-state Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................1 4. Functional diagram.......................................................2 5. Pinning information......................................................4 5.1. Pinning.........................................................................4 5.2. Pin description............................................................. 4 6. Functional description................................................. 5 7. Limiting values............................................................. 5 8. Recommended operating conditions..........................5 9. Static characteristics....................................................6 10. Dynamic characteristics............................................ 7 10.1. Waveforms and test circuit........................................ 8 11. Package outline........................................................ 10 12. Abbreviations............................................................ 12 13. Revision history........................................................12 14. Legal information......................................................13 © Nexperia B.V. 2018. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 31 October 2018 74LVT_LVTH16245B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 11 — 31 October 2018 © Nexperia B.V. 2018. All rights reserved 14 / 14