K1B6416B6C

K1B6416B6C Document Title 4Mx16 bit Synchronous Burst Uni-Transistor Random Access Memory UtRAM Revision History Revision No. History 0.0 Initial Draft - Design target Revised - Deleted Deep Power Down Mode support Revised - Changed product code from K1B6416B7C into K1B6416B6C Draft Date March 11, 2004 Remark Advance 0.1 April 19, 2004 Advance 0.2 May 10, 2004 Advance 0.3 Revised September 1, 2004 Preliminary - Filled out Package type(54ball FBGA 6.0mm x 8.0mm) - Changed Hi-Z parameters(tCHZ, tOHZ, tBHZ, tWZ) from Max.7ns into Max.12ns and changed tHZ from Max.10ns into Max.12ns - Updated "Fig.17 TIMING WAVEFORM OF WRITE CYCLE(1)" in page 23 - Added comment on standby current(ISB1) measure condition as "Standby mode is supposed to be set up after at least one active operation after power up. ISB1 is measured after 60ms from the time when standby mode is set up." - Added comment on restriction of the transition between Asynchronous Write operation and Fully Synchronous bus operation(Page 10,11) - Filled out ISB1 value, ISBP value and ICC2 value in Table 17(DC AND OPERATING CHARACTERISTICS) - Added Synchronous Operating Current(ICC3, Max.40mA) - Added tCSHP(A)(CS high pulse width) parameter as Min.10ns in the ASYNCHRONOUS AC CHARACTERISTICS Revised October 12, 2004 - Changed ISB1(< 40°C) and ISBP(3/4 block, < 40°C) from 100µA into 120µA - Changed ISBP(1/2 block and 1/4 block, < 40°C) from 95µA into 115µA Finalized January 20, 2005 Preliminary 0.4 1.0 Final The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices. -1- Revision 1.0 January 2005 K1B6416B6C 4M x 16 bit Synchronous Burst Uni-Transistor CMOS RAM FEATURES • • • • • • • UtRAM GENERAL DESCRIPTION The world is moving into the mobile multi-media era and therefore the mobile handsets need much bigger memory capacity to handle the multi-media data. SAMSUNG’s UtRAM products are designed to meet all the request from the various customers who want to cope with the fast growing mobile market. UtRAM is the perfect solution for the mobile market with its low cost, high density and high performance feature. K1B6416B6C is fabricated by SAMSUNG′s advanced CMOS technology using one transistor memory cell. The device supports the traditional SRAM like asynchronous bus operation(asynchronous page read and asynchronous write), the NOR flash like synchronous bus operation(synchronous burst read and asynchronous write) and the fully synchronous bus operation(synchronous burst read and synchronous burst write). These three bus operation modes are defined through the mode register setting. The device also supports the special features for the standby power saving. Those are the Partial Array Refresh(PAR) mode and internal Temperature Compensated Self Refresh(TCSR) mode. The optimization of output driver strength is possible through the mode register setting to adjust for the different data loadings. Through this driver strength optimization, the device can minimize the noise generated on the data bus during read operation. Process Technology: CMOS Organization: 4M x16 bit Power Supply Voltage: 1.7~2.0V Three State Outputs Supports MRS (Mode Register Set) MRS control - MRS Pin Control Supports Power Saving modes - Partial Array Refresh mode Internal TCSR • Supports Driver Strength Optimization for system environment power saving. • Supports Asynchronous 4-Page Read and Asynchronous Write Operation • Supports Synchronous Burst Read and Asynchronous Write Operation(Address Latch Type and Low ADV Type) • Supports Synchronous Burst Read and Synchronous Burst Write Operation • Synchronous Burst(Read/Write) Operation - Supports 4 word / 8 word / 16 word and Full Page(256 word) burst - Supports Linear Burst type & Interleave Burst type - Latency support : Latency 5 @ 66MHz(tCD 10ns) Latency 4 @ 54MHz(tCD 10ns) - Supports Burst Read Suspend in No Clock toggling - Supports Burst Write Data Masking by /UB & /LB pin control - Supports WAIT pin function for indicating data availability. • Max. Burst Clock Frequency : 66MHz • Package Type : 54 ball FBGA 6.0mm x 8.0mm Table 1. PRODUCT FAMILY Product Family Operating Temp. Vcc Range Current Consumption Clock Async. Standby(Max) Standby(Max) Operating Freq.(Max) Speed(tAA) (ISB1,