K4S510432D-UC75

General Information SDRAM SDRAM Product Guide November 2007 Memory Division November 2007 General Information SDRAM A. SDRAM Component Ordering Information 1 2 3 4 5 6 7 8 9 10 11 K 4 S X X X X X X X - X X X X Speed SAMSUNG Memory Temperature & Power DRAM Package Type Product Revision Density & Refresh Interface (VDD, VDDQ) Organization 1. SAMSUNG Memory : K 2. DRAM : 4 3. Product S : SDRAM 4. Density & Refresh 16 : 16Mb, 4K/64ms 64 : 64Mb, 4K/64ms 28 : 128Mb, 4K/64ms 56 : 256Mb, 8K/64ms 51 : 512Mb, 8K/64ms 5. Organization 04 : 06 : 07 : 08 : 16 : 32 : x4 x 4 Stack (Flex frame) x 8 Stack (Flex frame) x8 x16 x32 6. Bank 2 : 2 Banks 3 : 4 Banks Bank 8. Revision M A B C D E F H : 1st Gen. : 2nd Gen. : 3rd Gen. : 4th Gen. : 5th Gen. : 6th Gen. : 7th Gen : 9th Gen J : 11th Gen. K : 12th Gen N : 14th Gen 9. Package Type U : TSOP II (Lead-free)*1 T : TSOP II V : sTSOP II (Lead-free)*1 N : sTSOP II (Lead-free & Halogen-free)*1 L : TSOP II Note 1: All of Lead-free or Halogen-free product are in compliance with RoHS 10. Temperature & Power C : Commercial Temp.( 0°C ~ 70°C) & Normal Power L : Commercial Temp.( 0°C ~ 70°C) & Low Power I : Industrial Temp.( -40°C ~ 85°C) & Normal Power P : Industrial Temp.( -40°C ~ 85°C) & Low Power 11. Speed (Default CL= 3) 75 : 7.5ns, PC133 (133MHz CL=3) 60 : 6.0ns (166MHz CL=3) 50 : 5.0ns (200MHz CL=3) 7. Interface ( VDD, VDDQ) 2 : LVTTL (3.3V, 3.3V) November 2007 General Information SDRAM B. SDRAM Component Product Guide Density Bank 64Mb K-die 4Banks 64Mb N-die Part Number K4S640832K UC75 UL75 K4S641632K UC50/C60/C75 UL50/L60/L75 K4S640832N LC75 LL75 4Banks 128Mb I-die 4Banks 4Banks 128Mb K-die 256Mb H-die 4Banks 4Banks 256Mb J-die 512Mb D-die 4Banks Package*1 & Power*2 & Speed*3 K4S280432I UC75 UL75 32M x 4 K4S280832I UC75 UL75 16M x 8 K4S281632I UC60/C75 UL60/L75 8M x 16 K4S280432K U*4C75 UL75 32M x 4 K4S280832K UC75 UL75 16M x 8 K4S281632K UC60/C75 UL60/L75 8M x 16 K4S560432H UC75 UL75 64M x 4 K4S560832H UC75 UL75 32M x 8 K4S561632H UC60/C75 UL60/L75 16M x 16 K4S560432J U*4C75 UL75 64M x 4 K4S560832J UC75 UL75 32M x 8 K4S561632J UC60/C75 UL60/L75 16M x 16 K4S510432D UC75 UL75 128M x 4 K4S510832D UC75 UL75 64M x 8 K4S511632D UC75 UL75 32M x 16 C Temperature, Normal Power L Temperature, Low Power Power (V) Package Avail. LVTTL 4K/64ms 3.3 ± 0.3V Lead-free 54pin TSOP(II) EOL DEC. ’08 LVTTL 4K/64ms 3.3 ± 0.3V Lead-free & Halogenfree 54pin TSOP(II) 4Q’07 CS LVTTL 4K/64ms 3.3 ± 0.3V Lead-free 54pin TSOP(II) EOL AUG. ’08 LVTTL 4K/64ms 3.3 ± 0.3V Lead-free & Halogenfree 54pin TSOP(II)*4 Now LVTTL 8K/64ms 3.3 ± 0.3V Lead-free 54pin TSOP(II) EOL SEP. ’08 LVTTL 8K/64ms 3.3 ± 0.3V Lead-free & Halogenfree 54pin TSOP(II)*4 Now LVTTL 8K/64ms 3.3 ± 0.3V Lead-free 54pin TSOP(II) Now 8M x 8 4M x 16 Description Refresh 4M x 16 K4S641632N Note 2 : Interface 8M x 8 LC50/C60/C75 LL50/L60/L75 Note 1 : U : TSOP(II) (Lead-free) L : TSOP(II) (Lead-free & Halogen-free) Temperature and Power Org. Note 3 : Speed Description 75 7.5ns, PC133 (133Mhz @ CL=3) 60 6.0 ns (166Mhz @ CL=3) 50 5.0 ns (200Mhz @ CL=3) * All products have backward compatibility with PC100. - Commercial Temp (0°C < Ta < 70°C) Note 4 : 128Mb K-die SDR and 256Mb J-die SDR DRAMs support Lead-free & Halogen-free package with Lead-free package code(-U) November 2007 General Information SDRAM C. Industrial Temperature SDRAM Component Product Guide Density Bank 64Mb K-die 4Banks Part Number Package*1 & Power*2 & Speed*3 Org. Interface Refresh Power (V) Package Avail. KS641632K UI60/I75 UP60/P75 4M x 16 LVTTL 4K/64ms 3.3 ± 0.3V Lead-free 54pin TSOP(II) EOL DEC.’08 64Mb N-die 4Banks KS641632N LI60/I75 LP60/P75 4M x 16 LVTTL 4K/64ms 3.3 ± 0.3V Lead-free & Halogen-free 54pin TSOP(II) 1Q’08 128Mb I-die 4Banks K4S281632I UI60/I75 UP60/P75 8M x 16 LVTTL 4K/64ms 3.3 ± 0.3V Lead-free 54pin TSOP(II) EOL AUG.’08 128Mb K-die 4Banks K4S281632K U*4I60/I75 UP60/P75 8M x 16 LVTTL 4K/64ms 3.3 ± 0.3V Lead-free & Halogen-free 54pin TSOP(II)*4 Now 256Mb H-die 4Banks K4S561632H UI60/I75 UP60/P75 16M x 16 LVTTL 8K/64ms 3.3 ± 0.3V Lead-free 54pin TSOP(II) EOL SEP.’08 256Mb J-die 4Banks K4S561632J U*4I60/I75 UP60/P75 16M x 16 LVTTL 8K/64ms 3.3 ± 0.3V Lead-free & Halogen-free 54pin TSOP(II)*4 Now Note 1 : U : TSOP(II) (Lead-free) L : TSOP(II) (Lead-free & Halogen-free) Note 2 : Temperature and Power Description I Industrial Temperature, Normal Power P Industrial Temperature, Low Power Note 3 : Speed Description 75 7.5ns, PC133 (133Mhz @ CL=3) 60 6.0 ns (166Mhz @ CL=3) 50 5.0 ns (200Mhz @ CL=3) - Industrial Temp (-40°C < Ta < 85°C) Note 4 : 128Mb K-die SDR and 256Mb J-die SDR DRAMs support Lead-free & Halogen-free package with Lead-free package code(-U) November 2007 General Information SDRAM D. SDRAM Module Ordering Information 1 2 3 4 5 6 7 8 9 10 11 12 M X X X S X X X X X X X - X X X Memory Module Speed DIMM Configuration Power Data bits PCB revision & Type Feature Package Depth Component Revision Refresh, # of Banks in Comp. & Interface Composition Component 7. Composition Component 1. Memory Module : M 0 3 4 8 9 2. DIMM Configuration 3 : DIMM 4 : SODIMM 3. Data Bits 63 : x63 PC100 / PC133 µSODIMM with SPD for 144pin 64 : x64 PC100 / PC133 SODIMM with SPD for 144pin (Intel/JEDEC) 66 : x64 Unbuffered DIMM with SPD for 144pin/168pin (Intel/JEDEC) 74 : x72 /ECC Unbuffered DIMM with SPD for 168pin (Intel/JEDEC) 77 : x72 /ECC PLL + Register DIMM with SPD for 168pin (Intel PC100) 90 : x72 /ECC PLL + Register DIMM with SPD for 168pin (JEDEC PC133) 4. Feature S : SDRAM : : : : : x4 x8 x16 x 4 Stack (Flexframe) x 8 Stack (Flexframe) 8. Component Revision M B D F J : 1st Gen. : 3rd Gen. : 5th Gen. : 7th Gen. : 11h Gen. A C E H : : : : 2nd Gen. 4th Gen. 6th Gen. 9h Gen. 9. Package T N U V : : : : TSOP(II) (400mil) sTSOP(II) (400mil) TSOP(II) Lead-free (400mil) sTSOP(II) Lead-free (400mil) 10. PCB Revision & Type 5. Depth 16 : 16M 32 : 32M 64 : 64M 28 : 128M 56 : 256M 09 17 33 65 29 59 : 8M (for 128Mb/512Mb) : 16M (for 128Mb/512Mb) : 32M (for 128Mb/512Mb) : 64M (for 128Mb/512Mb) : 128M (for 128Mb/512Mb) : 256M (for 128Mb/512Mb) 0 : Mother PCB 2 : 2nd Rev. U : Low Profile DIMM 1 : 1st Rev. 3 : 3rd Rev. S : 4Layer PCB. 11. Power C : Commercial Normal L : Commercial Low ( 0°C ~ 70°C) ( 0°C ~ 70°C) 6. Refresh, # of Banks in comp. & Interface 2 : 5 : 4K/ 64ms Ref., 4Banks & LVTTL 8K/ 64ms Ref., 4Banks & LVTTL 12. Speed (Default CL= 3 ) 7A : PC133 (133MHz CL=3/PC100 CL2) November 2007 General Information SDRAM E. SDRAM Module Product Guide Org. Density Part No. Speed Comp. Version Composition Power (V) Internal Banks External Banks Feature 1 DS, 1500mil 1 DS, 1700mil 1 DS, 1200mil Avail. 168pin PC133 Registered DIMM 32Mx72 256MB 64Mx72 512MB M390S3253HU1 C7A 32M x 8 * 9 pcs 256Mb H-die M390S6450HU1 C7A 64M x 4 * 18 pcs 256Mb H-die M390S6450HUU C7A 64M x 4 * 18 pcs 256Mb H-die 3.3 V 4 EOL JUN.’08 168pin PC133 Unbuffered DIMM 8Mx64 16Mx64 64MB 128MB M366S0924IUS C7A 8M x 16 * 4 pcs 128Mb I-die 1 SS, 1000mil M366S1723IUS C7A 16M x 8 * 8 pcs 128Mb I-die 1 SS, 1375mil M366S1654HUS C7A 16M x 16 * 4 pcs 256Mb H-die 1 SS, 1000mil EOL JUN.’08 Now M366S1654JUS C7A 16M x 16 * 4 pcs 256Mb J-die 1 SS, 1000mil 16Mx72 M374S1723IUS C7A 16M x 8 * 9 pcs 128Mb I-die 1 SS, 1375mil 32Mx64 M366S3323IUS C7A 16M x 8 * 16 pcs 128Mb I-die 2 DS, 1375mil 32Mx72 256MB 32Mx64 64Mx64 512MB 3.3V 4 EOL JUN.’08 EOL JUN.’08 M374S3323IUS C7A 16M x 8 * 18 pcs 128Mb I-die 2 DS, 1375mil M366S3253JUS C7A 32M x 8 * 8 pcs 256Mb J-die 1 SS, 1375mil Now M366S6453HUS C7A 32M x 8 * 16 pcs 256Mb H-die 2 DS, 1375mil EOL JUN.’08 M366S6453JUS C7A 32M x 8 * 16 pcs 256Mb J-die 2 DS, 1375mil Now 144pin PC133 SODIMM 16Mx64 32Mx64 64Mx64 128MB 256MB 512MB M464S1724IUS L7A 8M x 16 * 8 pcs 128Mb I-die 1 DS, 1250mil EOL JUN.’08 M464S1724KUS L7A 8M x 16 * 8 pcs 128Mb K-die 1 DS, 1250mil Now M464S3254HUS L7A 16M x 16 * 8 pcs 256Mb H-die 1 DS, 1250mil EOL JUN.’08 M464S3254JUS L7A 16M x 16 * 8 pcs 256Mb J-die 1 DS, 1250mil Now M464S6453HV0 L7A 32M x 8 * 16 pcs 256Mb H-die 2 DS, 1250mil EOL JUN.’08 M464S6453JV0 L7A 32M x 8 * 16 pcs 256Mb J-die 2 DS, 1250mil Now 3.3V 4 November 2007 General Information SDRAM F. Package Dimension (10.76) NOTE 1. ( ) IS REFERENCE 2. [ ] IS ASS’Y OUT QUALITY (0.50) 0.45 ~ 0.75 0.075 MAX (4°) [ 0. 25 ) +0.10 0.35 - 0.05 0. 25 ) (10°) +0.075 - 0.035 (R (0.71) 0.80TYP [0.80 ± 0.08] 0.05 MIN 0. 15 ) 0.10 MAX (R (10°) (10°) 1.20 MAX 1.00 ± 0.10 (10°) 0.1 5) (0.80) (1.50) 0.210 ± 0.05 (R 0.125 [ 0.665 ± 0.05 22.22 ± 0.10 (R #27 11.76 ± 0.20 #1 (1.50) (0.80) #28 10.16 ± 0.10 #54 (0.50) Unit : mm 0.25TYP (0° ∼ 8°) 54Pin TSOP(II) Package Dimension November 2007 General Information SDRAM For further information, semiconductor@samsung.com November 2007