M368L3223HUS

General Information DDR SDRAM DDR SDRAM Product Guide December 2007 Memory Division December 2007 General Information A. DDR SDRAM Component Ordering Information 1 2 3 4 5 6 7 8 9 10 11 DDR SDRAM K4 HXXXXXXX-XXXX SAMSUNG Memory DRAM Product Density & Refresh Organization Speed Temperature & Power Package Type Revision Interface (VDD, VDDQ) Bank 1. SAMSUNG Memory : K 2. DRAM : 4 3. Product H : DDR SDRAM 8. Revision M : 1st Gen. A : 2nd Gen. B : 3rd Gen. C : 4th Gen. D : 5th Gen. E : 6th Gen. F : 7th Gen. G : 8th Gen. H : 9th Gen. J : 11st Gen. N : 14th Gen. 4. Density & Refresh 28 : 128Mb, 4K/64ms 56 : 256Mb, 8K/64ms 51 : 512Mb, 8K/64ms 1G: 1Gb, 8K/64ms 2G: 2Gb, 8K/64ms 9. Package Type T : TSOP II N : sTSOP II G : FBGA L H F 6 : : : : U : TSOP II (Lead-free)*1 V : sTSOP II (Lead-free)*1 Z : FBGA (Lead-free)*1 5. Organization 04 : 06 : 07 : 08 : 16 : x4 x 4 Stack x 8 Stack x8 x16 TSOP II (Lead-free & Halogen-free)*1 FBGA (Lead-free & Halogen-free)*1 FBGA for 64Mb DDR (Lead-free & Halogen-free)*1 sTSOP II (Lead-free & Halogen-free)*1 Note 1: All of Lead-free or Halogen-free product are in compliance with RoHS 10. Temperature & Power C : Commercial Temp.( 0°C ~ 70°C) & Normal Power L : Commercial Temp.( 0°C ~ 70°C) & Low Power I : Industrial Temp.( -40°C ~ 85°C) & Normal Power P : Industrial Temp.( -40°C ~ 85°C) & Low Power 6. Bank 3 : 4 Banks 7. Interface ( VDD, VDDQ) 8 : SSTL-2 (2.5V, 2.5V) 11. Speed CC B3 A2 B0 : : : : DDR400 DDR333 DDR266 DDR266 (200MHz @ CL=3, tRCD=3, tRP=3) (166MHz @ CL=2.5, tRCD=3, tRP=3)*1 (133MHz @ CL=2 , tRCD=3, tRP=3) (133MHz @ CL=2.5, tRCD=3, tRP=3) Note 1: "B3" has compatibility with "A2" and "B0" December 2007 General Information B. DDR SDRAM Component Product Guide Density Bank Part Number Package*1 & Power*2 & Speed*3 LCCC/CB3 LLCC/LB3 FCCC/CB3 FLCC/LB3 UCA2/CB0 ULA2/LB0 ZCCC/CB3 ZLCC/LB3 UCCC/CB3 ULCC/LB3 ZCCC/CB3 ZLCC/LB3 UCCC/CB3 ULCC/LB3 ZCCC/CB3 ZLCC/LB3 LCB3/CB0 LLB3/LB0 LCCC/CB3 LLCC/LB3 LCCC/CB3 LLCC/LB3 UCB0 ULB0 ZCCC ZLCC UCCC/CB3 ULCC/LB3 ZCCC/CB3 ZLCC/LB3 UCCC/CB3 ULCC/LB3 ZCCC/CB3 ZLCC/LB3 Note 2 : C L Commercial Temperature, Normal Power Commercial Temperature, Low Power CL = 2 CL = 2.5 CL = 3 DDR SDRAM Org. Interface Refresh Power (V) Package 66pinTSOPII Avail. Now CS 64Mb N-die 4Banks K4H641638N 4M x 16 SSTL_2 4K/64m 2.5 ± 0.2V 60ball FBGA 66pinTSOPII K4H560438H 64M x 4 60ball FBGA 60ball FBGA 32M x 8 SSTL_2 8K/64m 2.5 ± 0.2V*4 60ball FBGA 66pinTSOPII 16M x 16 60ball FBGA 64M x 4 32M x 8 16M x 16 SSTL_2 8K/64m 2.5 ± 0.2V*4 66pinTSOPII 66pinTSOPII 66pinTSOPII 66pinTSOPII 128M x 4 60ball FBGA 66pinTSOPII 64M x 8 SSTL_2 8K/64m 2.5 ± 0.2V*4 60ball FBGA 66pinTSOPII 32M x 16 60ball FBGA Now CS 256Mb H-die 4Banks K4H560838H Now K4H561638H K4H560438J 256Mb J-die 4Banks K4H560838J K4H561638J CS CS K4H510438D 512Mb D-die 4Banks K4H510838D K4H511638D Note 1 : U : TSOP II (Lead-free) V : sTSOP II (Lead-free) Z : FBGA (Lead-free) L H F 6 : : : : TSOP II (Lead-free & Halogen-free) FBGA (Lead-free & Halogen-free) FBGA for 64Mb DDR (Lead-free & Halogen-free) sTSOP II (Lead-free & Halogen-free) Note 3 : 133Mhz DDR266(A2) DDR266(B0) 166Mhz DDR333(B3) 200Mhz DDR400(CC) - Commercial Temp. (0°C