S1T8528

ENHANCED-1 CHIP CT0 RF IC S1T8528 INTRODUCTION S1T8528 is a 1 CHIP RF IC which can be used in high performance CTO CLP systems at max. 60MHz. S1T8528 is designed to include a receiver, PLL and COMPANDER to minimize PCB space requirements. Improved RX characteristics such as inter-modulation, spurious response and adjacent channel interface have been included to satisfy the universal standards. The 1 CHIP RF IC has considerably reduced the cost by including a build-in 1’st mixer, low battery detector, fMCU, RSSI, RF regulator and speaker amp. Also, it fulfills carrier detector threshold control, speaker volume control, operating mode selection and MUTE function using S/W, thus making external application easier. 48−QFP−1010E FEATURES • • • • • • • Operating voltage range: 2.0V ~ 5.5V Typical supply current: 8.9mA at 3.6V Built-in low battery detection function ( selectable 3.45V, 3.3V, 3.0V, 2.2V, 2.1V ) Built-in speaker volume control and speaker amplifier Built-in splatter filter Support mode selection ( Active, Rx, Standby and Inactive mode ) FM Receiver — Excellent Receiver characteristics < 10.7MHz crystal filter used > Input sensitivity 0.7µ Vrms at 12dB SINAD • Adjacent channel rejection > 55dB Spurious rejection (image of the second IF) > 60dB Intermodulation rejection > 50dB • — RSSI ( Linear ) and Carrier detector output ( Digital ) function Compander — Easy gain control and application using external component — -Included ALC (Automatic Level Control) circuit Universal PLL — RX (TX) divided counter range : 1/16 ~ 1/16383 — Reference frequency divided counter range : 1/16 ~ 1/4095 — Lock detector signal output — Serial interface with MICOM for controlling each block — Clock Output for MICOM oscillator substitution. ( X-tal divided clock by 2, 3, 4 and 5 ) ORDERING INFORMATION Device + S1T8528X01-Q0R0 + : New product Package 48−QFP−1010E Operating Temperature −20C to + 70C 1 S1T8528 ENHANCED-1 CHIP CT0 RF IC BLOCK DIAGRAM GND(RX) VCC(RX) DSCO DSCI 2MI 36 35 34 33 32 31 30 29 28 27 26 25 2LOI 37 X-tal OSC IF AMP (455KHz) Limiting IF AMP FSK COMP RSSI 2LOI 2MO RAO QCI LD LI AMP Quadrature Detector Regulator (Vcc/2) PRE AMP + VREF 24 VREF (COMP) 2nd MIX 1MO 23 22 ALC EPI 38 RSSI 1LOI 39 1LOI 40 RX VCO Rectifier Carrier Detector IF AMP (10.7MHz) Low Battery Detector SUM AMP 21 ERC 20 EO 19 SAI VCO 41 RX Internal cap. 1st MIX Gain Cell Volume control 18 SAO1 SPK AMP1 SPK AMP2 17 SAO2 VCC (COMP) 1MI 42 1MI 43 VCC(RX) GND (PLL) Limiter 44 PLL Regulator ( 2.05 V ) Programmable Counter ( RX ) SUM AMP Buffer Gain Cell + MIC AMP VREF 16 15 GND (COMP) PDR 45 VREF (RF) 46 VREF (PLL) Programmable Counter ( TX ) 47 ALC 14 CPI Programmable Counter ( REF ) TIF 48 Rectifier 13 CPO 4_25 CNT RX Phase Detector TX Phase Detector Splatter Filter Compander mute fMCU CONTROL 1 PDT 2 CO 3 SFI 4 SFO 5 CDO/LDT 6 CLKO 7 CLK 8 DATA 9 EN 10 LBD 11 AGIC 12 CRC 2 ENHANCED-1 CHIP CT0 RF IC S1T8528 PIN CONFIGURATION VCC(RX) GND(RX) DSCO 26 DSCI 36 2LOI 37 1MO 38 1LOI 39 1LOI 40 VCORX 41 1MI 42 1MI 43 GND(PLL) 44 PDR 45 VREF(RF) 46 VREF(PLL) 47 TIF 48 1 PDT 35 34 33 32 31 30 29 QCI LD 28 27 25 24 VREF(COMP) 23 ALC 22 EPI 21 ERC 20 EO RSSI 19 SAI 18 SAO1 17 SAO2 16 VCC(COMP) 15 GND(COMP) 14 CPI 13 CPO 12 CRC 2LOI 2MO S1T8528 KB8528 2 CO 3 SFI 4 SFO 5 CDO/LDT 6 CLKO 7 CLK 8 DATA RAO 9 EN 2MI LI 10 LBD 11 AGIC 3 S1T8528 ENHANCED-1 CHIP CT0 RF IC PIN DESCRIPTION Pin No 1 Symbol PDT Description Phase detector output terminal of the transmitter at PLL. If fTX > fREF or fTX is leading → the output is negative pulse If fTX < fREF or fTX is lagging → the output is positive pulse If fTX = fREF and the same phase → the output is High Impedance Compressor output terminal of compander: connected to the splatter filter amp input terminal. Input terminal of Splatter filter amp. Output terminal of Splatter filter amp. LDT: Output terminal of transmitter lock detector in PLL block. Output is low if PLL is in lock state and is high if PLL is in unlock state. CDO: As an output terminal of the carrier detector buffer, connected to (RSSI ) terminal of MICOM. This pin outputs the contents of Meter Driver buffer which is turned on/off, according to the signal level detected by Meter Driver. Clock output terminal for MCU crystal. This pin provides the clock source for MCU or other system as an output of X-tal osc. ÷ 2/ ÷3/ ÷4/ ÷5. Which can be controlled by the bit of the control register. Clock ON/OFF control is possible by MCU These pins are serial interface terminals for programming reference counter, auxiliary reference counter, TX channel counter, RX channel counter and control block that controls internal each block with 4 mode selection. Low Battery Detecting output. ( Selectable 3.45V, 3.3V, 3.0V, 2.2V, 2.0V ). During the normal operation, output level is low, but it is high at low battery detection. As this pin is an open collector type, it requires a pull-up resister. This pin bypasses AC elements at the feedback loop which come from the SUM amp block of COMPRESSOR. A capacitor should be connected between this terminal and GND. ( C = 2.2uF ) Converts waveform from the full wave rectifier to DC element at the rectifier block of Compressor. ( RC = 33 msec at C = 3.3uF) Pre-amp output terminal of Compressor. Used as an input terminal for voice signals. Inverting type Pre-amp input terminal of Compressor. Ground. Ground of Compander. Supply voltage. Power supply terminal of Compander. Output terminal of speaker amp 2. This signal is the same as SAO1 output, but phase difference is 180° for SAO1 DC voltage level is Vcc / 2. 2 3 4 5 CO SFI SFO LDT/CDO 6 fMCU 7 8 9 10 CLK DATA EN LBD 11 AGIC 12 13 14 15 16 17 CRC CPOCPI GND(COMP) Vcc(COMP) SAO 2 4 ENHANCED-1 CHIP CT0 RF IC S1T8528 PIN DESCRIPTION (Continued) Pin No 18 19 20 21 22 23 Symbol SAO 1 SAI EO ERC EPI ALC Output terminal of Speaker amp 1. DC voltage level is Vcc/ 2. Speaker Amp 1 input terminal. Between this terminal and Expander output terminal, apply DC coupled capacitor. Output terminal of Expander Converts waveform from the full wave rectifier to DC element at the rectifier block of Expander. ( RC = 33 msec at C = 3.3uF ) Pre-amp inverting input terminal of Expander. Adjusts the negative feedback loop gain. ( in application, gain is 5 ) Reference current input terminal of Automatic Level Control ( ALC); Adjusts THD of compressor output voltage to less than 3% or limits the frequency deviation of TX if the input is higher than a certain level. The ALC circuit may be turned off depending on the ALC reference current or the magnitude of output voltage may be limited if it is higher than a certain level. Reference voltage ( VREF= 1/2 VCC ). Supplies a regulator voltage to the Compressor and Expander of COMPANDER. Received Signal Strength Indicator terminal ( Analog type ) Output terminal of Data Slicing comparator. Separates Frequency Shift Keying ( FSK ) serial data and executes data shaping and limiting. Input terminal of Data slicing comparator. Non-inverting type with the negative input terminal biased to 1/2 Vcc. Recovered Audio Output terminal. Voice signals detected by the Quadrature Detector are amplified and then output through this terminal. Quadrature coil input terminal. The 455kHz oscillator circuit is an Lp = 680uH, Cp = 180pF valued LC tank circuit. Voice signals are detected by mixture of 455kHz ( by phase difference ) which is converted from mixer 2. Ground . Ground for Receiver. Limiter input and decoupling terminal. Limiter block removes amplitude modulation elements caused by fading or FM signal noise. Limiting IF stage makes the second intermediate frequency amplify and limit. The input impedance of the limiting IF amplifier is set to 1.5kΩ. While FM waves are transmitted with constant magnitude, their magnitudes are slightly modulated due to reflection from obstacles, fading phenomenon, noise wave and mixing with AM wave elements before entering the receiver’s antenna. The limiter makes amplitude uniform by removing these AM wave elements. Supply voltage. Supplies power to the Receiver. Description 24 25 26 VREF(COMP) RSSI DSCO 27 28 29 DSCI RAO QCI 30 31 32 GNDRX LD LI 33 VCC(RX) 5 S1T8528 ENHANCED-1 CHIP CT0 RF IC PIN DESCRIPTION (Continued) Pin No 34 Symbol 2MI Description Input terminal of mixer 2. Output from mixer 1 is entered to mixer 2 input terminal via 10.7MHz ceramic filter. Second mixer converts frequency to second intermediate frequency ( 455kHz: AM IF ). Output terminal of Mixer 2. Second intermediate frequency ( 455kHz ), generated by mixing first intermediate frequency ( 10.7MHz ) and Second Local Oscillator is output. Input terminal of second local oscillator. These pins generate 2 ’nd local oscillation frequency and are designed as colpitt type oscillator. 10.24MHz or 10.245MHz can be applied as for 2’nd local oscillator. Output terminal of mixer 1. The signal from mixer 1 and the frequency of the first local oscillator are mixed to produce the first intermediate frequency, which is the output through this terminal. The output terminal is an emitter follower with an output impedance of 330Ω to match the 330Ω input / output impedance of the 10.7MHz ceramic filter. Input terminal of the first local oscillator. The local oscillator is a voltage controlled oscillator. Local oscillation frequency and received frequency are mixed at mixer 1 and then converted to the first intermediate frequency of 10.7MHz or 10.695MHz. The terminal which variable capacitor is included in the chip. Used as an input terminal where 1st local oscillation frequency is changed by varying the capacitor connected between 1st local oscillator terminals. The internal variable capacitor has the value of 18.73 ~ 15.86 pF depending on the applied voltage. ( 1.0 ~ 2.0V ) Input terminal of Mixer1. This mixer is made of doubly balanced multiplier. The received signal amplified at RF AMP is input to this terminal. Ground. Ground for analog at PLL. Phase detector output terminal of the receiver at PLL. If fRX > fREF or fRX is Leading → The output is negative pulse If fRX < fREF or fRX is Lagging → The output is positive pulse If fRX = fREF and the same phase → The output is high impedance An internal PMOS pass transistor provides power supplier for the RF pre amplifier. PMOS pass transistor is on in Active/Rx mode and off in Standby/Inactive mode. PLL voltage reference output pin. An internal voltage regulator provides a stable power supply voltage for the RX and TX PLLs. (2.05V) Input terminal of TX channel counter. AC coupling with TX VCO. Minimum input level is 300 mVp-p ( at 60MHz ). 35 36 37 38 2MO 2LOI 2LOI 1MO 39 40 1LOI 1LOI 41 VCORX 42 43 44 45 1MI 1MI GND(PLL) PDR 46 47 VREF(RF) VREF(PLL) 48 TIF 6 ENHANCED-1 CHIP CT0 RF IC S1T8528 ABSOLUTE MAXIMUM RATINGS Characteristic Maximum Supply Voltage Power Dissipation Operating Temperature Storage Temperature Vcc PD TOPR TSCG Symbol Value 5.5 600 −20 — + 70 −55 — + 150 Unit V mW °C °C CURRENT CONSUMPTION AT EACH MODE Modes Active mode (Communication mode ) RX mode Stand-by mode Inactive mode (Battery Saving Mode) ( VCC = 3.6V ) Min. − − − − Typ. 8.9mA 4.8mA 700uA 50uA Max. − − − 70uA CURRENT CONSUMPTION IN EACH BLOCK Modes Receiver part Expander part Speaker part compressor part PLL RX part TX part Total Min. − − − − − − − ( VCC = 3.6V ) Typ. 3.5mA 0.8mA 1.0mA 1.7mA 1.2mA 0.7mA 8.9mA Max. 4.6mA 1.1mA 1.4mA 2.1mA 1.6mA 1.1mA 11.9mA 7 S1T8528 ENHANCED-1 CHIP CT0 RF IC ELECTRICAL CHARACTERISTICS Characteristic Operating Voltage Symbol Vcc Test Conditions − Min. 2.0 Typ. − Max. 5.5 Unit V RECEIVER ( VCC = 3.6V, fC = 49.7MHz, fDEV = ± 3kHz, fMOD = 1kHz,Ta = 25°C, unless otherwise specified ) Sensitivity (input for 12dB SINAD) Input for -3dB Limiting S/N Ratio Recovered Audio Output Recovered Audio Output Voltage Drop Detector Output Resistance Detect Output Voltage Detector Output Distortion Comparator Threshold Voltage Difference Comparator Output Voltage 1 Comparator Output Voltage 2 First Mixer Conversion Voltage Gain Second Mixer Conversion Voltage Gain Demodulator Bandwidth Limiter Input Sensitivity AM Rejection Ratio First Mixer 3rd Order Intercept Point First Mixer Input Impedance VSEN VLIM S/N VO(RA) VO(RAD) R O(DET) VO(DET) THDDET ∆VTH VOH VOL ∆GV(1M) ∆GV(2M) DBW VI(LIM) AMRR IMD3 RI(1M) / C I(1M) MIX1 Matched Impedance Input MIX1 Matched Impedance Input RFin = 1mVrms RFin = 1mVrms, After 2nd stage LPF Vcc = 5.5V → 2.0V RFin = 1mVrms RFin = 1mVrms RFin = 1mVrms RFin = 1mVrms (with CCITT Filter) VCOMP = 360mVp-p R HYS = 180KΩ VCOMP =360mVp-p R HYS = 180kΩ VCOMP = 360mVp-p R HYS = 180kΩ VMIX1 1/2 = 1mVrms R L = 330kΩ VMIX2 = 1mVrms R L = 1.5kΩ RFin = 1mVrms Fc = 455kHz , −3dB Limiting RFin = 1mVrms AM MOD = 30% @1kHz MIX1 Input 50Ω Termination Fc = 50MHz Fc = 10.7MHz − − 48 147 −3.0 − 1.0 − 70 Vcc-0.4 − 12 18 − − − − − − 0.7 0.7 55 177 −1.5 1.2 1.5 1.0 110 − 0.1 15 22 10 20 40 − 15 690 7.2 330 2.0 2.0 − 207 − − 2.0 2.5 150 − 0.4 18 26 − 40 − − − − µVrms µVrms dB mVrms dB KΩ V % mV V V dB dB kHz uVrms dB dBm Ω pF Ω First Mixer output Impedance Ro(1M) 8 ENHANCED-1 CHIP CT0 RF IC S1T8528 ELECTRICAL CHARACTERISTICS (Continued) Characteristic Second Mixer input Impedance Second Mixer output Impedance Carrier Detector Threshold Symbol R I(2M) Ro(2M) CDTH Test Conditions Fc = 10.7MHz Fc = 455kHz MIX1 Single-Ended Matching, Default Threshold=1010 LBD0 ~ LBD3 Only LBD2 Only LBD1 Only LBD3 LBD0 ~ LBD3 = 0 ( Default ) =0 =0 =0 =1 Min. − − − Typ. 4 1.5 −95 Max. − − − Unit kΩ kΩ dBm Low Battery Detector LBD − 0.15 3.45 3.3 3.0 2.2 2.1 30 60 − − 0.1 V −0.1 − − Vcc-0.4 − 0.075 − − − 0.4 mV/dB dB V V RSSI Slope RSSI Output Voltage Dynamic Range Carrier Detect Output High Voltage Carrier Detect Output Low Voltage VRSSI RSSI VOH VOL MIX1 Single-Ended Matching MIX1 Single-Ended Matching RFin = 1µVrms Default Threshold = 1010 RFin = 10µVrms Default Threshold = 1010 COMPRESSOR ( Vcc = 3.6V, fc = 1kHz, Ta = 25°C, unless otherwise specified ) Standard Output Voltage Compressor Gain Difference Compressor Output Distortion Mute Attenuation Ratio Compressor Limiting Voltage ALC Splatter filter Maximum Output Voltage Vo(com) ∆GV1(COM) ∆GV2(COM) THDCOM ATTMUTE VLIM(COM) VALC Vo(SF) VOMIC(MAX) Vinc = 63.2mVrms → 0dB ALC disabled (pin 13) Vinc = −20dB Vinc = −40dB Vinc = 63.2mVrms → 0dB Vinc = 0dB Vinc = Variable R ALC = 150kΩ, Vinc = 10dB VINC = 63.2mVrms → 0 dB RL = 10KΩ 269 −10 −1.5 − 60 1.05 310 269 − 316 0 0 0.5 80 1.35 390 316 2.8 363 1.0 1.5 1.0 − 1.65 450 363 − mVrms dB dB % dB Vp-p mVrms mVrms Vp-p EXPANDER (Vcc = 3.6V, fc = 1kHz, Ta = 25°C, unless otherwise specified) Standard Output Voltage V O(EXP) VinE = 63.2mVrms → 0dB 309 356 403 mVrms 9 S1T8528 ENHANCED-1 CHIP CT0 RF IC ELECTRICAL CHARACTERISTICS (Continued) Characteristic Expander Gain Difference Symbol ∆GV1(EXP) ∆GV2(EXP) ∆GV3(EXP) Expander Output Distortion Mute Attenuation Ratio Expander Maximum Output Voltage Maximum Output Voltage THDEXP ATTMUTE VOEXP(MAX) VOSPK(MAX) Test Conditions VinE = −10dB VinE = − 20dB VinE =− 30dB VinE = 63.2mVrms → 0dB VinE = 63.2mVrms → 0dB VinE = Variable THD = 10% R L = 150Ω RL = 600Ω Input Current IIH IIL Input Voltage VIH VIL Output Current IOH IOL Output Voltage VOH1 VOL1 VOH2 VOL2 PLL regulator voltage Regulator Load Current VPLLREG IREG Vout = Vcc Vout = 0V PDT,PDR: Io = -0.3mA ( Sourcing ) PDT,PDR: Io = 0.3mA ( Sinking ) LD,fMCU: Io = − 0.1mA ( Sourcing ) LD,fMCU: Io = 0.1mA ( Sinking ) − Vout = VREG(OPEN)-0.05V Vin = Vcc Vin = 0V − − Min. −1.0 −1.5 −2.0 − 60 800 − − − −5 Vcc-0.3 − 0.3 0.3 Vcc-0.4 − Vcc-0.5 − 1.90 − Typ. 0 0 0 0.5 80 − 2.2 3.0 − − − − − − − − − − 2.05 3.0 Max. 1.0 1.5 2.0 1.0 − − − 5 − − 0.3 − − − 0.4 − 0.5 2.20 − Unit dB dB dB % dB mVrms Vp-p Vp-p µA µA V V mA mA V V V V V mA 10 ENHANCED-1 CHIP CT0 RF IC S1T8528 PLL PROGRAM SUMMARY • MCU ( MICOM ) Serial Interface ( MSB : 1st INPUT ) Use CLK (Pin 7 ), DATA (Pin 8 ) , and EN (Pin 9 ) terminals for program. DATA and CLK terminals are used for loading data to internal Shift - Register. When EN terminal is ‘Low’, It is possible to program TX-Channel Counter, RX - Channel Counter and various control functions of PLL. When EN terminal is ‘High’, Program 1st Local Oscillator Capacitor Selection in receiver for U.S.A - 25 CH function. — TX - Register, RX-Register, Control Register MSB LSB 14Bit DATA DATA PMC0 PMC1 EN CLK Figure 1. — Reference - Register MSB LSB PMC 1 UK_ S1 UK_ S0 DATA PMC 0 12Bit DATA EN CLK Figure 2. 11 S1T8528 ENHANCED-1 CHIP CT0 RF IC — Auxiliary - Register(16bits) MSB LSB CLO(6bits) CD_TH(4bits) LBD(3bits) TEST(2bits) DATA PMC EN CLK Figure 3. • Programmable Counter — RX - counter: Setting frequency for RX.VCO ( 14 Bits --> 1/16 ~ 1/16383 ) [ Default_CH. = USA_#21 ( REMOTE ) : 36.075MHz ( Div._NO = 7215 )] < RX. Register (16bits) > Bit Name Default value 7215 Bit 15 PMC0 * Bit 14 PMC1 Bit 13 D13 0 Bit 12 D12 1 Bit 11 D11 1 Bit 10 D10 1 Bit 9 D9 0 Bit 8 D8 0 Bit Name Default value 7215 Bit 7 D7 0 Bit 6 D6 0 Bit 5 D5 1 Bit 4 D4 0 Bit 3 D3 1 Bit 2 D2 1 Bit 1 D1 1 Bit 0 D0 1 — TX - counter: Setting frequency for TX.VCO ( 14 Bits --> 1/16 ~ 1/16383 ) [ Default_CH. = USA_#21 ( REMOTE ) : 49.830MHz ( Div._NO = 9966 )] < TX. Register (16 bits) > Bit Name Default value 9966 Bit 15 PMC0 * Bit 14 PMC1 Bit 13 D13 1 Bit 12 D12 0 Bit 11 D11 0 Bit 10 D10 1 Bit 9 D9 1 Bit 8 D8 0 12 ENHANCED-1 CHIP CT0 RF IC S1T8528 Bit Name Default value 9966 Bit 7 D7 1 Bit 6 D6 1 Bit 5 D5 1 Bit 4 D4 0 Bit 3 D3 1 Bit 2 D2 1 Bit 1 D1 1 Bit 0 D0 0 * Program Latch Assignl PMC0 (Bit15) 0 0 1 1 PMC1 (Bit14) 0 1 0 1 Register Assign Control UPLL_Rx UPLL_Ref UPLL_Tx — Ref - counter: Setting reference frequency for phase detector ( 12 Bits --> 1/16 ~ 1/4095 ) [ Default_Divider = 2048, X-tal_OSC = 10.240 MHz -->Fref = 5KHz ]< Ref. Register (16bits) > < Ref. Register (16bits) > Bit Name Default value 2048 Bit 15 PMC0 * Bit 14 PMC1 Bit 13 UK_S1 Bit 12 UK_S0 Bit 11 D11 1 Bit 10 D10 0 Bit 9 D9 0 Bit 8 D8 0 Ref.freq. selection for United Kingdom Bit Name Default value 2048 Bit 7 D7 0 Bit 6 D6 0 Bit 5 D5 0 Bit 4 D4 0 Bit 3 D3 0 Bit 2 fMCU_M MPU CLK Mute Bit 1 FMCU1 MPU CLK CNTl_1 Bit 0 FMCU0 MPU CLK CNTL_0 — UK_Selection UK_S0 0 1 0 1 UK_S1 0 0 1 1 FR1 fREF (A) fREF (A) fREF/4 (B) fREF/4 (B) FR2 − fREF/4 (B) fREF/25 (C) fREF/25 (C) FrefTX fREF (A) fREF/4 (B) fREF/4 (B) fREF/25 (C) FrefRX fREF (A) fREF/4 (B) fREF/25 (C) fREF/4 (B) 13 S1T8528 ENHANCED-1 CHIP CT0 RF IC fREF (A) 12 Bits Reference program divider. ¡À 4 fREF¡ À 4 (B) fREF¡ À 5 2 (C) FR2 PD_TX FR1 LD 2 ¡ À5 PDT PDR PD_RX Figure 4. Reference frequency selection • Control program Control register (16 Bits) Bit Name Description Bit 15 PMC0 Program Mode Control_0 Bit 14 PMC1 Program Mode Control_1 Bit 13 BS1 Power Save Control_1 Bit 12 BS0 Power Save Control_0 Bit 11 LBD_BS Low Battery Detector Battery Save 0:Normal (LBD-On) 1:LBD-Part Power-Off Bit 10 CO_M Compressor Mute Bit 9 EX_M Expander Mute Bit 8 SPK_M Speaker Mute Function * Program Latch Assign ** Power Save Mode 0: Normal 1: Mute 0:Normal 1:Mute 0:Nomal 1:Mute Bit Name Description Bit 7 SPK3 SPK Control_3 Bit 6 SPK2 SPK Control_2 Bit 5 SPK1 SPK Control_1 Bit 4 SPK0 SPK Conrol_ 0 Bit 3 LDT/CDO LDT/CDO Select 0: CDO 1: LDT Bit 2 fMCU_M MCU Clock Mute 0: Normal 1: Mute Bit 1 fMCUS1 MCU Clock Control_1 Bit 0 fMCUS0 MCU Clock Control_0 Function Speaker Volume Control *** MCU Clock Output 14 ENHANCED-1 CHIP CT0 RF IC S1T8528 ** Power Save Mode Assign BS1 (Bit13) 0 0 1 1 BS0 (Bit12) 0 1 0 1 Power Save Mode Rx Active STD_By Inactive Default *** MCU Clock Output Control & Frequency fMCU_M 1 0 0 0 0 fMCUS1 Don’t Care 0 0 1 1 fMCUS0 Don’t Care 0 1 0 1 Clock Output Divider Low 2 3 4 5 (Default) X-tal 10.24MHz 11.15MHz Divider 2 3 4 5 5.120MHz 5.575MHz 3.413MHz 3.717MHz 2.560MHz 2.788MHz 2.048MHz 2.230MHz 6.0MHz 4.0MHz 3.0MHz 2.4MHz 12.0MHz *** Speaker Amplifier Volume Control DATA SPK3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 SPK2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 SPK1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 SPK0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 −18dB −16dB −14dB −12dB −10dB −8dB −6dB −4dB −2dB 0dB +2dB +4dB +6dB +8dB +10dB +12dB 25mVrms − − 50mVrms − − 100mVrms − − 200mVrms − − 400mVrms − − 800mVrms Gain/Attenuation Output Level [SAO1-SAO2] 15 S1T8528 ENHANCED-1 CHIP CT0 RF IC • Auxiliary Register (16 Bits) Auxiliary Register Function Bit Name Bit 15 PMC Bit 14 CLO5 Bit 13 CLO4 Bit 12 CLO3 Bit 11 CLO2 Bit 10 CLO1 Bit 9 CLO0 Bit 8 CD_TH3 Description Auxiliary register Selection Function ***** Program Mode Control Cap=5.9p Cap=4.8p Cap=3.2p Cap=1.6p Cap=1.3p Cap=0.8p CD_TH Control_3 CD Control_3 1’st LO Cap Select Bit Name Bit 7 CD_TH2 Bit 6 CD_TH1 CD_TH Control_1 Bit 5 CD_TH0 CD_TH Control_0 Bit 4 LBD3 LBD Control_3 Bit 3 LBD2 LBD Control_2 Bit 2 LBD1 LBD Control_1 Bit 1 TEST2 TEST Mode2 Bit 0 TEST1 TEST Mode1 Description CD_TH Control_2 Function Carrier Detector Threshold Control Low Battery Detector Voltage Control **** TEST Mode & LDT-CDO Mode **** TEST Mode & LDT-CDO Mode LDT/CDO 0 TEST1 0 1 0 1 1 0 1 0 1 TEST2 0 0 1 1 0 0 1 0 LDT / CDO Rx block CDO Rx block CDO 4_25cnt block FR2 4_25cnt block FR2 PLL block LDT PLL block LDT Test PLL_RX Test PLL_TX Remark Default − − − − − − − 16 ENHANCED-1 CHIP CT0 RF IC S1T8528 **** Carrier Detector Threshold Control DATA CD_TH3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 CD_TH2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 CD_TH1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 CD_TH0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 −20dB −18dB −16dB −14dB −12dB −10dB −8dB −6dB −4dB −2dB 0dB (Default) +2dB +4dB +6dB +8dB +10dB Carrier Detector Threshold 17 S1T8528 ENHANCED-1 CHIP CT0 RF IC • Operating internal circuit blocks in each mode Mode ( state ) Active state ( Communication mode ) Operating circuit blocks PLL regulator / MICOM I/F ( Data, CLK, EN ) / 2nd local oscillator / Receiver/ 1st local oscillator/ RX PLL/ Carrier detector / FSK comparator / Low battery detector / TX PLL / Expander & speaker amp / Compressor /Splatter filter amp, Clock Output PLL regulator / MICOM I/F( Data, CLK, EN ) / 2nd local oscillator / Receiver/ 1st local oscillator/ RX PLL/ Carrier detector / FSK comparator / Low battery detector, Clock Output PLL regulator, MICOM I/F ( Data, CLK, EN ), 2nd local oscillator, Clock Output Interrupt Receiving mode Stand-by mode (Battery Save Mode#2) Inactive state (Battery Saving Mode#1) • Auxiliary Register(CLO_LBD Program) [ Rx - 1st local oscillation internal cap. for U.S.A - 25CH & low battery detecting voltage ] — CLO register ( 6 bits ) : Receiver 1st local oscillator internal capacitor selection Bit Name Default Value 0 Function Bit 15 PMC 1 ***** Bit 14 CLO5 0 0:Normal 1:Internal Cap. for USA 25 Channel =5.9pF Bit 13 CLO4 0 0:Normal 1:Internal Cap. for USA 25 Channel = 4.8pF Bit 12 CLO3 0 0:Normal 1:Internal Cap. for USA 25 Channel = 3.2pF Bit 11 CLO2 0 0:Normal 1:Internal Cap. for USA 25 Channel =1.6pF Bit 10 CLO1 0 0:Normal 1:Internal Cap. for USA 25 Channel =1.3p F Bit 9 CLO0 0 0:Normal 1:Internal Cap. for USA 25 Channel = 0.8pF 18 ENHANCED-1 CHIP CT0 RF IC S1T8528 ***** PMC ( Program Mode Control ) PMC = ‘HIGH’ & EN = ‘HIGH’ ---> Auxiliary Register Program Mode — Rx-Low Battery Detect Voltage Bit Name Default Value Function Bit15 (MSB) PMC 1 ***** 1 1 0 1 Bit 4 LBD3 0 1 1 0 1 Bit 3 LBD2 0 0 1 1 1 Bit 2 LBD1 0 1 0 1 1 Low Battery Detector Voltage 3.45V 3.3V 3.0V 2.2V 2.1V Remark Default − − − − ***** PMC ( Program Mode Control ) PMC = ‘HIGH’ & EN = ‘HIGH’ ---> Auxiliary Register Program Mode • Example 1 > Low battery detector voltage : 2.1V U.S.A _CH-#1 ( REMOTE ) ---> 1st local osc. varicap. value =15.86pF, Internal cap. = 9.3pF ( Ext_L = 0.45uH, EXT_C = 30pF ) — 16 bit data format MSB PMC CLO5 CLO4 CLO3 CLO2 CLO1 CLO0 LBD3 LBD2 LBD1 LSB DATA 1 0 1 1 0 1 0 1( 0 ) 1( 0 ) 1( 0 ) 1( 0 ) 1 1 1 1( 0 ) 1( 0 ) EN CLK Figure 5. 19 S1T8528 ENHANCED-1 CHIP CT0 RF IC • Example data for U.S.A 25_channel selection 1st Local Osc. Internal Capacitor Select Base Hand Channels Channels Varicap Value 1.0V~2.0V TYP 1.5V 18.73 ~15.86pF 16~25CH. 18.73 ~15.86pF 18.73 ~15.86pF 18.73 ~15.86pF 18.73 ~15.86pF 01~06CH. 07~15CH. 18.73 ~15.86pF 18.73 ~15.86pF External External Internal C L C 27pF (30pF) 27pF 47pF 27pF 27pF 27pF 47pF 47pF 0.45uH 0.44uH 0.20uH 0.44uH 0.44uH 0.44uH 0.20uH 0.20uH pF 0.8 2.1 1.6 0.8 9.3 8.8 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 1 ~ 25CH. 1 ~ 25CH. (CLO5) (CLO4) (CLO3) (CLO2) (CLO1) (CLO0) 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 1 0 0 0 0 1 0 0 1 0 0 1 0 0 1 1 0 1 1 0 1 0 0 16~25CH. 01~04CH. 05~10CH. 11~15CH. - Phase detector / Lock Detector Output Waveforms fREF (A) 12 Bits Reference program divider. ¡À 4 fREF¡ À 4 (B) fREF¡ À 5 2 (C) FR2 TIF¡ À N FR1 REF.Freq LD PD_TX 2LOI ¡ À5 2 PDT 14 Bits TX. program divider. TIF Figure 6. 20 ENHANCED-1 CHIP CT0 RF IC S1T8528 REF.Freq. TIF ¡ N À PDT LD Figure 7. Phase Detector / Lock Detector Output Waveform 21 S1T8528 C48 10 N C3 3 40 R3 5 41 56K 42 T2 AY 43 1 MI 1 MI SAI 19 V CORX EO 20 1 0 0N C3 2 1 LO I ERC 21 + APPLICATION CIRCUIT ( BASE SET ) 22 CV1 20 P R29 C4 0 10 N R33 22 k C41 33 N R3 2 4 7 0K 31 LD 24 + C4 5 2 0P C4 2 6 8N T5 R2 8 10 k C39 10 N C3 7 1 0N F LT 3 4 55 MHz R3 4 47K R31 27 k 10 k Y1 1 0.24 MHz R3 8 4 .7k C30 2 20 uF + S2 3 90 C44 68 P 36 37 2 LO I V R E F( C O M P ) 38 R26 1 20 K C34 39 ERI C4 7 3 0P 1 LO I 22 10 0N 1 MO A LC 23 C3 5 4 .7u F 2 L OI 2M O 2 MI V CC(R X) LI G N D ( R X) QCI RAO DSCI DSCO RSSI 35 34 33 32 30 29 28 27 26 25 C4 3 1 0N C3 6 1 00 N R2 7 3 3K F L T2 1 0M Hz R35 22 C46 10 N T4 AW I 3.3 uF C4 9 1 00 N ANT S1T8528 S A O1 G ND(PLL ) S A O2 18 RX d ata o ut L1 1 B uH 44 17 RX o ut VCC 16 + C26 47 u F Ma in po wer R3 9 45 PDR C57 4.7 N 46 V REF (RF) R40 C52 0 .47 uF + 3 .9 K 1 .0 K GND 15 R16 2.2 M R2 3 C2 0 CPI 14 C30 15 0P R1 5 3 0K 2 40 K CPO 13 4 .7n Com pre ss or in p ut F L T1 2 5k 54 4 47 C5 9 10N 48 PDT 1 2 3 4 5 CO S FI S F O L TD/CDO 1M CU 6 T IF CLK 7 V REF (PLL ) + RX C54 1 0 uF ANT R37 2 20 C51 10 N DAT A 8 EN 9 L BD 10 A GIC 11 + C24 2.2 u CR C 12 TX DUP LE X C1 7 IN + C25 3.3u F R10 20 K R11 10 K To MICOM (MCU) Data fro m MICOM (MCU) TX V CO M ICO M CLK To MICOM (MCU) ENHANCED-1 CHIP CT0 RF IC CV1 20 P F LT 3 4 55 MHz R3 4 4 7K 10k R33 1k C4 1 33N R3 2 4 70 K 31 LD 24 + C45 20 P C4 2 6 8N T5 R29 C4 0 10N R3 1 2 7k 10 k C39 10 N C3 7 1 0N R2 8 Y1 10 .24 5M Hz C30 22 0 uF + S2 3 90 C44 68 P 36 37 2 LO I V R E F( C O M P ) 38 R2 6 1 20 K C3 4 39 ERI C3 3 40 R3 5 41 5 6K 42 T2 AY 43 1 MI 1 MI S AI 19 V CORX EO 20 1 00 N RX DAT A out 1 LO I ERC 21 + 3.3u F C3 2 C4 7 4 7P 1 LO I 22 10 0N 1 MO A LC 23 C3 5 4 .7u F 2 LO I 2M O 2 MI V CC(RX ) LI G N D ( R X) QCI RAO DSCI DSCO RSSI 35 34 33 32 30 29 28 27 26 25 C4 3 1 0N C3 6 1 00 N R27 33 K ENHANCED-1 CHIP CT0 RF IC F LT 2 1 07 MHz R35 22 C46 10 N C48 10 N T4 AW I APPLICATION CIRCUIT ( HAND SET ) C49 1 00 N C5 0 ANT T3 AY 2P S1T8528 S AO 1 18 1 2 44 G N D ( P LL ) S AO 2 17 L1 1 B uH R40 45 PDR R3 9 1 .0 K 46 V R E F( R F) C57 47 N + VCC 16 C27 47 uF GND 15 R1 7 2 2K + R1 6 2 2K + C2 6 1 0u F CPI 14 R23 C20 30 K 4 .7 N M IC C52 0 .4 7 uF 3 .9 K F ET 1 25 k5 4 4 47 C5 9 1 0N 48 PDT 1 2 3 4 5 CO S FI T IF S F O L TD/CDO 1M CU 6 CLK 7 V R E F ( P LL ) C5 3 2P C54 1 0u F + RX R37 2 20 C51 10 N CPO DAT A 8 EN 9 L BD 10 A GIC 11 + C1 7 12N R11 10 K C1 8 12N C24 2.2 u CRC 12 13 R15 24 0K R22 2.2 M ANT TX + C2 5 3 .3u F DUPL E X R10 10 K T o MIC OM (MC U ) Data fro m MICOM (MCU) TX V CO M ICOM CLK T o MIC OM (MC U ) S1T8528 23 S1T8528 ENHANCED-1 CHIP CT0 RF IC TEST CIRCUIT Vin27 10nF 10uF + Vccrx 390Ω 10.7MHz S34 RAo 0.01uF 0.01uF 1§Ú 500§Ú-1000§Ú 15§Ú S25 0.1uF 0.01uF 180§Ú DSCO RSSI 1Mo Varicap 10.240MHz 5.1§Ú 20pF 455KHz 2Mo 680uH 10§Ú DSCI 68§Ú 0.1uF 180pF 10§Ú 2Lo 47pF V28 36 35 34 2MI 33 VCC (RX) 32 LI 31 LD 30 GND (RX) 29 QCI 28 RAO 27 26 25 VREFCOM P 4.7uF 2LOI 2MO 37 38 39 0.47uH 25pF 40 2LOI 1MO 1LOI 1LOI DSCI DSCO RSSI VREF(COMP) ALC EPI ERC EO 24 23 + S23 Vin22 2.2uF 10§Ú 150§Ú 1uF 22 21 Voe S41 100nF 56§Ú 0.47uH 1nF 44 S45 PDR 45 GND(PLL) PDR VREF(RF) VREF(PLL) TIF PDT 1 CO 2 SFI 3 SFO 4 CDO LDT 5 SAO2 VCC(COMP) GND(COMP) CPI CPO CLKO 6 CLK 7 DATA 8 EN 9 LBD 10 AGIC 11 CRC 12 17 16 10nF 41 42 43 VCO(RX) 1MI 1MI 20 19 18 150§Ù + 2.2uF ~ Vin40 + Vine1 SAo1 SAo2 10nF 47pF S40 + S1T8528 KB8528 1uF SAI SAO1 + ~ Vin43 4.3§Ú 1uF 18pF 1§Ú + VCOR 10nF 10nF 10uF + + 10uF S48 Vcccom 46 VREFRF 47 VREFPLL 48 TIF 15 30§Ú 14 13 150§Ú 100pF Vmico 1uF Vinc 10uF + + 10nF ~ Vin48 + 10uF 10nF 100§Ú S1 100§Ú 47pF 2.7§Ú 100§Ú PDT 100§Ú 100§Ú 1nF 15§Ú 10nF LD S5 + 2.2uF S7 S8 S9 LBD 100§Ú + 2.2uF 100Ω 82§Ú 33pF 47pF 56§Ú VCOT Vc + 2.2uF 15§Ú CDo 10K 10K 10K + 10§Ú 1uF 1§Ú CLKO CLK DATA EN SFout 68pF 1§Ú 68pF T1(AW) KDS2236 0.41uH + 6.8§Ú + 1uF 0.47uF Vinc1 1nF 24 ENHANCED-1 CHIP CT0 RF IC S1T8528 25 S1T8528 ENHANCED-1 CHIP CT0 RF IC 26 ENHANCED-1 CHIP CT0 RF IC S1T8528 27 S1T8528 ENHANCED-1 CHIP CT0 RF IC 28 ENHANCED-1 CHIP CT0 RF IC S1T8528 29 S1T8528 ENHANCED-1 CHIP CT0 RF IC 30 ENHANCED-1 CHIP CT0 RF IC S1T8528 31 S1T8528 ENHANCED-1 CHIP CT0 RF IC 32 ENHANCED-1 CHIP CT0 RF IC S1T8528 33 S1T8528 ENHANCED-1 CHIP CT0 RF IC 34 ENHANCED-1 CHIP CT0 RF IC S1T8528 NOTES 35