S3P8095

S3C8095/P8095 PRODUCT OVERVIEW 1 PRODUCT OVERVIEW S3C8-SERIES MICROCONTROLLERS Samsung's S3C8 series of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various mask-programmable ROM sizes. Important CPU features include: — Efficient register-oriented architecture — Selectable CPU clock sources — Idle and Stop power-down mode release by interrupt — Built-in basic timer with watchdog function A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more interrupt sources and vectors. Fast interrupt processing (within a minimum six CPU clocks) can be assigned to specific interrupt levels. S3C8095/P8095 MICROCONTROLLER The S3C8095/P8095 single-chip CMOS microcontroller is fabricated using a highly advanced CMOS process and is based on Samsung’s newest CPU architecture. The S3C8095 is the microcontroller which has 16Kbytes mask-programmable ROM. The S3P8095 is the microcontroller which has 16Kbytes one-time-programmable EPROM. Using a proven modular design approach, Samsung engineers developed the S3C8095/P8095 by integrating the following peripheral modules with the powerful SAM87 core: — Four programmable I/O ports, including three 8-bit ports and one 2-bit port, for a total of 26 pins. — Twelve bit-programmable pins for external interrupts. — One 8-bit basic timer for oscillation stabilization and watchdog functions (system reset). Figure 1-1. S3C8095 Microcontroller — One 8-bit timer/counter and one 16-bit timer/counter with selectable operating modes. — One 8-bit counter with auto-reload function and one-shot or repeat control. The S3C8095 is a versatile general-purpose microcontroller. It is currently available in a 32-pin SOP and SDIP package. 1-1 PRODUCT OVERVIEW S3C8095/P8095 FEATURES CPU • SAM87 CPU core Timers and Timer/Counters • One programmable 8-bit basic timer (BT) for oscillation stabilization control or watchdog timer (software reset) function One 8-bit timer/counter (Timer 0) with three operating modes; Interval, Capture and PWM One 16-bit timer/counter (Timer 1) with two operating modes; Interval and Capture Memory • • 16K-byte internal program memory (ROM) 317-byte internal register file • • Instruction Set • • 78 instructions IDLE and STOP instructions added for powerdown modes Carrier Frequency Generator • One 8-bit counter with auto-reload function and one-shot or repeat control (Counter A) Instruction Execution Time • 750 ns at 8-MHz f OSC (minimum) • Operating Temperature Range – 20°C to + 85°C Interrupts • • • Six interrupt levels and 18 interrupt sources 15 vectors (14 sources have a dedicated vector address and four sources share a single vector) Fast interrupt processing feature (for one selected interrupt level) Operating Voltage Range • • 2.0 V to 5.5 V at 4 MHz fOSC 2.4 V to 5.5 V at 8 MHz fOSC Package Type • • 32-pin SOP 32-pin SDIP I/O Ports • • Three 8-bit I/O ports (P0–P2) and one 2-bit port (P3) for a total of 26 bit-programmable pins Twelve input pins for external interrupts 1-2 S3C8095/P8095 PRODUCT OVERVIEW BLOCK DIAGRAM P0.0–P0.7 (INT0–INT4) P1.0–P1.7 RESET TEST XIN XOUT MAIN OSC PORT 0 PORT 1 INTERNAL BUS PORT2 I/O PORT and INTERRUPT CONTROL P2.0–P2.3 (INT5–INT8) P2.4–P2.7 8-BIT BASIC TIMER SAM8 CPU 8-BIT TIMER/ COUNTER PORT 3 P3.0/T0PWM/ T0CAP/T1CAP P3.1/REM/T0CK 16-BIT TIMER/ COUNTER 16-KB ROM 317-BYTES REGISTER FILE CARRIER GENERATOR (COUNTER A) Figure 1-2. Block Diagram 1-3 PRODUCT OVERVIEW S3C8095/P8095 PIN ASSIGNMENTS VSS XIN XOUT TEST P2.0 / INT5 P2.1 / INT6 P2.2 / INT7 P2.3 / INT8 P0.0 / INT0 P0.1 / INT1 P0.2 / INT2 P0.3 / INT3 P0.4 / INT4 P0.5 / INT4 P0.6 / INT4 P0.7 / INT4 1 2 3 4 5 6 7 S3C8095 8 32-SOP/SDIP 9 (Top View) 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VDD RESET P3.1 / REM / T0CK P3.0 / T0PWM / T0CAP / T1CAP P2.7 P2.6 P2.5 P2.4 P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0 Figure 1-3. Pin Assignment Diagram (32-Pin SOP/SDIP Package) 1-4 S3C8095/P8095 PRODUCT OVERVIEW PIN DESCRIPTIONS Table 1-1. Pin Descriptions Pin Names P0.0–P0.7 Pin Type I/O Pin Description I/O port with bit-programmable pins. Configurable to input or push-pull output mode. Pull-up resistors are assignable by software. Pins can be assigned individually as external interrupt inputs with noise filters, interrupt enable/ disable, and interrupt pending control. I/O port with bit-programmable pins. Configurable to Schmitt trigger input mode or output mode. Pin circuits are either pushpull or n-channel open-drain type. Pull-up resistors are assignable by software. General-purpose I/O port with bitprogrammable pins. Configurable to Schmitt trigger input mode, push-pull output mode, or n-channel open-drain output mode. Pull-up resistors are assignable by software. Lower nibble pins, P2.3–P2.0, can be assigned as external interrupt inputs with noise filters, interrupt enable/disable, and interrupt pending control. 2-bit I/O port with bit-programmable pins. Configurable to Schmitt trigger input mode, push-pull output mode, or n-channel opendrain output mode. Pull-up resistors are assignable by software. The two port 3 pins have high current drive capability. System clock input and output pins System reset signal input pin with schmitt trigger circuit. Test signal input pin (for factory use only; must be connected to VSS). Power supply input pin Ground pin Circuit Type 1 Pin No. 9–16 Shared Functions INT0–INT4 P1.0–P1.7 I/O 3 17–24 – P2.0–P2.3 P2.4–P2.7 I/O 2 3 5–8, 25–28 INT5–INT8 – P3.0 P3.1 I/O 4 29 30 T0PWM/ T0CAP/ T1CAP/ REM/T0CK XIN, XOUT RESET TEST – I I – 5 – 2, 3 31 4 – – – VDD VSS – – – – 32 1 – – 1-5 PRODUCT OVERVIEW S3C8095/P8095 PIN CIRCUITS VDD PULL-UP RESISTOR (Typical 50 Κ Ω) PULL-UP ENABLE VDD DATA INPUT / OUTPUT OUTPUT DISABLE INTERRUPT INPUT IRQ6,7 (INT0 -4) NORMAL INPUT NOISE FILTER VSS Figure 1-4. Pin Circuit Type 1 (Port 0) 1-6 S3C8095/P8095 PRODUCT OVERVIEW PIN CIRCUITS (Cont.) VDD PULL-UP RESISTOR (Typical 50 Κ Ω) PULL-UP ENABLE VDD DATA IN / OUT OPEN-DRAIN OUTPUT DISABLE NORMAL INPUT EXTERNAL INTERRUPT IRQ5 (INT5-8) VSS NOISE FILTER Figure 1-5. Pin Circuit Type 2 (Ports 2.0–2.3) 1-7 PRODUCT OVERVIEW S3C8095/P8095 PIN CIRCUITS (Cont.) VDD PULL-UP RESISTOR (Typical 50 ΚΩ ) PULL-UP ENABLE VDD DATA OPENDRAIN OUTPUT DISABLE NORMAL INPUT IN / OUT VSS Figure 1-6. Pin Circuit Type 3 (Ports 1 and P2.4–P2.7) 1-8 S3C8095/P8095 PRODUCT OVERVIEW PIN CIRCUITS (Cont.) VDD PULL-UP RESISTOR (Typical 50 Κ Ω) PULL-UP ENABLE PORT 3 DATA ALTERNATIVE OUTPUT OPENDRAIN OUTPUT DISABLE NORMAL INPUT ALTERNATIVE INPUT NOISE FILTER SELECT VDD M U X DATA IN / OUT VSS Figure 1-7. Pin Circuit Type 4 (Port 3) RESET Figure 1-8. Pin Circuit Type 5 (RESET) 1-9 S3C8095/P8095 S3P8095 OTP 13 OVERVIEW S3P8095 OTP The S3P8095 single-chip CMOS microcontroller is the OTP (One Time Programmable) version of the S3C8095 microcontroller. It has an on-chip EPROM instead of masked ROM. The S3P8095 is fully compatible with the S3C8095, both in function and in pin configuration. Because of its simple programming requirements, the S3P8095 is ideal for use as an evaluation chip for the S3C8095. VSS XIN XOUT MODE /TEST PGM /P2.0 / INT5 MEM_REG /P2.1 / INT6 A8/P2.2 / INT7 A9/P2.3 / INT8 A0/P0.0 / INT0 A1/P0.1 / INT1 A2/P0.2 / INT2 A3/P0.3 / INT3 A4/P0.4 / INT4 A5/P0.5 / INT4 A6/P0.6 / INT4 A7/P0.7 / INT4 1 2 3 4 5 6 7 S3P8095 8 32-SOP/SDIP 9 (Top View) 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VDD RESET/ VPP P3.1/REM/T0CK/ CE P3.0/ OE P2.7/ A13 P2.6/ A12 P2.5/ A11 P2.4/ A10 P1.7/ D7 P1.6/ D6 P1.5/ D5 P1.4/ D4 P1.3/ D3 P1.2/ D2 P1.1/ D1 P1.0/ D0 Figure 13-1. S3P8095 Pin Assignments 13-1 S3P8095 OTP S3C8095/P8095 Table 13–1. Pin Descriptions used to read/write the EPROM Pin Name A0 - A13 D0 - D7 MODE CE OE PGM MEM_REG VDD VPP VSS XIN XOUT Pin No. 7 - 16, 25 - 28 17 - 24 4 30 29 5 6 32 31 1 2 3 I/O O I/O — I I I I – – – – – Function Address lines to read/write EPROM 8-bit data input/output lines to read/write EPROM Select EPROM mode. Chip enable (Connect to VSS, when read/write EPROM) Output enable EPROM Program enable Select Memory space of EPROM Supply voltage (normally 5 V) EPROM Program/Verify voltage (normally 12.5 V) GROUND System Clock input pin System Clock output pin CHARACTERISTICS OF EPROM OPERATION When +12.5 V is supplied to VPP and MODE pins of the S3P8095, the EPROM programming mode is entered. The operating mode (read, write) is selected according to the input signals to the pins listed in Table2 as below. Table 13-2. Operating Mode Selection Criteria VDD 5V MODE VPP VPP 12.5 V PGM 1 0 1 NOTE: "0" means Low level; "1" means High level. MEM 1 1 1 OE 0 1 0 READ PROGRAM Mode PROGRAM VERIFY 13-2 S3C8095/P8095 S3P8095 OTP A13 - A0 t OED D7 - D0 t OEH t ACC OE t OEW MODE 12.5V Figure 13-2. OTP Read Timing Table 13-3. OTP Read characteristics (TA = 25 °C ± 5°C, VDD = 5 V ± 5 %, VPP = 12.5 V ± 0.25V) Parameter Address to Output Delay OE to Address Delay OE Pulse Width Output hold from OE whichever occurs first Symbol tACC tOED tOEW tOEH Min — 0 75 0 Typ — — — — Max 75 — — — Units ns 13-3 S3P8095 OTP S3C8095/P8095 PROGRAM A13 - A0 PROGRAM VERIFY D7 - D0 t DS MODE Data In Stable Data Out Valid t OEH t VS PGM t PW t DH t OE t OEW OE Figure 13-3. Program Memory Write Timing Table 13-4. OTP Program/Program Verify Characteristics (TA = 25 °C ± 5°C, VDD = 5 V ± 5 %, VPP = 12.5 V ± 0.25V) Parameter VPP Setup Time Data Setup Time Data Hold Time PGM Pulse Width Data Valid from OE OE Pulse Width Output Enable to Output Float Delay Symbol tVS tDS tDH tPW tOE tOEW tOEH Min — — — — 75 75 0 Typ 2 2 2 300 — — — Max — — — 500 — — 130 ns Units µs 13-4 S3C8095/P8095 S3P8095 OTP START Address = First Location VDD = 5 V, VPP = 12.5 V X=0 Program One 1ms Pulse Increment X YES X = 10 NO FAIL FAIL Verify Byte Verify 1 Byte PASS NO Last Address YES Increment Address Device Failed FAIL VDD = VPP = 5V Compare All byte PASS Device Passed Figure 13-4. OTP Programming Algorithm 13-5 S3C8095/P8095 ELECTRICAL DATA 14 OVERVIEW — — — — — — — — — — — ELECTRICAL DATA In this section, S3C8095/P8095 electrical characteristics are presented in tables and graphs. The information is arranged in the following order: Absolute maximum ratings D.C. electrical characteristics Data retention supply voltage in Stop mode Stop mode release timing when initiated by an external interrupt Stop mode release timing when initiated by a Reset I/O capacitance A.C. electrical characteristics Input timing for external interrupts (port 0, P2.3–P2.0) Input timing for RESET Oscillation characteristics Oscillation stabilization time 14-1 ELECTRICAL DATA S3C8095/P8095 Table 14-1. Absolute Maximum Ratings (TA = 25 °C) Parameter Supply voltage Input voltage Output voltage Output current High Output current Low Symbol VDD VIN VO I OH All output pins One I/O pin active All I/O pins active I OL One I/O pin active Total pin current for ports 0, 1, and 2 Total pin current for port 3 Operating temperature Storage temperature TA TSTG – – Conditions – – Rating – 0.3 to + 6.5 – 0.3 to VDD + 0.3 – 0.3 to VDD + 0.3 – 18 – 60 + 30 + 100 + 20 – 20 to + 85 – 65 to + 150 °C °C Unit V V V mA mA Table 14-2. D.C. Electrical Characteristics (TA = – 20 °C to + 85 °C, VDD = 2.0 V to 5.5 V) Parameter Operating Voltage Symbol VDD Conditions f OSC = 8 MHz (Instruction clock = 1.33 MHz) f OSC = 4 MHz (Instruction clock = 0.67 MHz) Input High voltage VIH1 VIH2 VIH3 Input Low voltage VIL1 VIL2 VIL3 Output High voltage VOH1 All input pins except VIH2 and VIH3 RESET XIN All input pins except VIL2 and VIL3 RESET XIN VDD= 3.0 V IOH = – 7 mA Port 3 only VDD – 2.0 – Min 2.4 Typ — Max 5.5 Unit V 2.0 — 5.5 0.8 VDD 0.95 VDD VDD – 0.3 0 – VDD VDD VDD 0.2 VDD 0.3 VDD 0.3 – V – V V 14-2 S3C8095/P8095 ELECTRICAL DATA Table 14-2. D.C. Electrical Characteristics (Continued) (TA = – 20 °C to + 85 °C, VDD = 2.0 V to 5.5 V) Parameter Output High voltage Output Low voltage Symbol VOH2 Conditions VDD = 3.0 V IOH = – 200 µA All output pins except port 3 VDD = 3.0 V IOL = 1.5 mA, port 3 only IOL = 1 mA Ports 0, 1 and 2 VIN = VDD; all input pins except XIN and XOUT VIN = VDD, XIN and XOUT VIN = 0 V; all input pins except XIN, XOUT, and RESET ILIL2 Output High leakage current Output Low leakage current Pull-up resistors ILOH ILOL RL1 VIN = 0 V, XIN and XOUT VOUT = VDD All output pins VOUT = 0 V All output pins VIN = 0 V; TA = 25 °C VDD = 5.0 V ± 10 % Ports 0–3 Operating mode; VDD = 5.0 V ± 10 % 4-MHz crystal Idle mode; VDD = 5.0 V ± 10 % 4-MHz crystal Stop mode; VDD = 5.0 V ± 10 % VDD = 3.6 V – – 30 – – 50 – 20 1 –1 100 µA µA KΩ – – – Min VDD – 1.0 Typ – Max – Unit V VOL1 VOL2 – 0.3 0.4 – 0.6 1.0 1 20 –1 µA µA Input High leakage current ILIH1 ILIH2 Input Low leakage current ILIL1 Supply current (See Note) IDD1 – 4.5 9 mA IDD2 1.6 3 IDD3 0.3 0.1 3 1 µA NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads. 14-3 ELECTRICAL DATA S3C8095/P8095 Table 14-3. Data Retention Supply Voltage in Stop Mode (TA = – 20 °C to + 85 °C) Parameter Data retention supply voltage Data retention supply current Symbol VDDDR IDDDR Conditions – VDDDR = 1.0 V Stop mode Min 1.0 – Typ – – Max 5.5 1 Unit V µA IDLE MODE (Basic Timer active) STOP MODE DATA RETENTION MODE V DD VDDDR EXT INT EXECUTION OF STOP INSTRUCTION NORMAL OPERATING MODE 0.2 V DD 0.8 V DD t WAIT Figure 14-1. Stop Mode Release Timing When Initiated by an External Interrupt RESET OCCURS STOP MODE DATA RETENTION MODE VDD VDDDR EXECUTION OF STOP INSTRUCTION OSCILLATION STABILIZATION TIME NORMAL OPERATING MODE RESET Note : t WAIT is the same as 4096 x 16 x 1/f OSC t WAIT Figure 14-2. Stop Mode Release Timing When Initiated by a Reset 14-4 S3C8095/P8095 ELECTRICAL DATA Table 14-4. Input/Output Capacitance (TA = – 20 °C to + 85 °C, VDD = 0 V) Parameter Input capacitance Output capacitance I/O capacitance Symbol CIN COUT CIO Table 14-5. A.C. Electrical Characteristics (TA = – 20 °C to + 85 °C) Parameter Interrupt input, High, Low width RESET input Low width Symbol tINTH, tINTL tRSL Conditions P0.0–P0.7, P2.3–P2.0 VDD = 5 V Input VDD = 5 V Min 200 1000 Typ 300 — Max — — Unit ns Conditions f = 1 MHz; unmeasured pins are connected to VSS Min — Typ — Max 10 Unit pF t INTL t INTH 0.8 V DD 0.2 V DD NOTE: The unit t CPU means one CPU clock period. Figure 14-3. Input Timing for External Interrupts (Port 0, P2.3–P2.0) t RSL RESET 0.3 V DD Figure 14-4. Input Timing for RESET RESET 14-5 ELECTRICAL DATA S3C8095/P8095 Table 14-6. Oscillation Characteristics (TA = – 20 °C + 85 °C) Oscillator Crystal Clock Circuit C1 Conditions CPU clock oscillation frequency Min 0.4 Typ — Max 8 Unit MHz XIN XOUT C2 Ceramic C1 XIN XOUT C2 CPU clock oscillation frequency 0.4 — 8 MHz External clock External Clock XIN S3C8095 XIN input frequency 0.4 – 8 MHz Open Pin XOUT Table 14-7. Recommended Oscillator Constants (TA = – 20 °C + 85 °C, VDD = 4.5 V to 5.5 V) Manufacturer Product Name Load Cap (pF) C1 TDK FCR4.0MC5 (note) FCR4.0M5 CCR4.0MC3 (note) FCR6.0MC5 (note) FCR6.0M5 CCR6.0MC3 FCR8.0M5 CCR8.0MC5 (note) (note) Oscillator Voltage Range (V) MIN 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 2.0 MAX 5.5 5.5 5.5 5.5 5.5 5.5 5.5 5.5 5.5 Remarks C2 – 33 – – 33 – – 33 – – 33 – – 33 – – 33 – On-chip C Leaded Type Leaded Type On-chip C SMD Type On-chip C Leaded Type Leaded Type On-chip C SMD Type On-chip C Leaded Type Leaded Type On-chip C SMD Type FCR8.0MC5 (note) NOTE: On-chip C: 30 pF ± 20 % built in. 14-6 S3C8095/P8095 ELECTRICAL DATA Table 14-8. Oscillation Stabilization Time (TA = – 20 °C + 85 °C, VDD = 4.5 V to 5.5 V) Oscillator Main crystal Main ceramic External clock (main system) Oscillator stabilization wait time f OSC > 400 kHz Oscillation stabilization occurs when VDD is equal to the minimum oscillator voltage range. XIN input High and Low width (tXH, tXL) tWAIT when released by a reset (1) Test Condition Min — — 25 — Typ — — — 216 / f OSC — Max 20 10 500 — Unit ms ms ns ms tWAIT when released by an interrupt (2) NOTES: 1. fOSC is the oscillator frequency. 2. — — ms The duration of the oscillation stabilization time (tWAIT) when it is released by an interrupt is determined by the setting in the basic timer control register, BTCON. INSTRUCTION CLOCK 1.33 MHz B A C F OSC (Main oscillation frequency) 8 MHz 1.00 MHz 670 kHz 500 kHz 6 MHz 4 MHz 250 kHz 8.32 kHz 400 kHz 1 2 3 4 5 6 7 SUPPLY VOLTAGE (V) INSTRUCTION CLOCK = 1/6n x oscillator frequency (n = 1, 2, 8, 16) A 2.0 V: 4 MHz, B 2.2 V: 6 MHz, C 2.4 V: 8 MHz Figure 14-5. Operating Voltage Range 14-7 ELECTRICAL DATA S3C8095/P8095 0 -1 -2 -3 VDD = 3V -4 IOH (mA) -5 -6 -7 -8 -9 -10 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VDD = 5V VDD = 4V VOH (V) Figure 14-6. IOH vs. VOH (Port 0) 14-8 S3C8095/P8095 ELECTRICAL DATA 0 -1 -2 -3 VDD = 3V -4 IOH (mA) -5 -6 -7 -8 -9 -10 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VDD = 5V VDD = 4V VOH (V) Figure 14-7. IOH vs. VOH (Port 2) 14-9 ELECTRICAL DATA S3C8095/P8095 0 -4 -8 -12 VDD = 3V -16 IOH (mA) -20 -24 -28 -32 -36 -40 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VDD = 5V VDD = 4V VOH (V) Figure 14-8. IOH vs. VOH (Port 3) 14-10 S3C8095/P8095 ELECTRICAL DATA 20 18 16 14 12 VDD = 5V IOL (mA) 10 8 6 4 2 VDD = 4V VDD = 3V 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 VOL (V) Figure 14-9. IOL vs. VOL (Port 0) 14-11 ELECTRICAL DATA S3C8095/P8095 20 18 16 14 12 VDD = 5V IOL (mA) 10 8 6 4 2 VDD = 4V VDD = 3V 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 VOL (V) Figure 14-10. IOL vs. VOL (Port 2) 14-12 S3C8095/P8095 ELECTRICAL DATA 50 45 VDD = 5V 40 35 30 VDD = 4V IOL (mA) 25 20 15 10 5 VDD = 3V 0 0.35 0.7 1.05 1.4 1.75 2.1 2.45 2.8 3.15 3.5 VOL (V) Figure 14-11. IOL vs. VOL (Port 3) 14-13 S3C8095/P8095 MECHANICAL DATA 15 OVERVIEW 12.00± 0.3 MECHANICAL DATA The S3C8095 microcontroller is currently available in a 32-pin SOP package. 0~8° #32 #17 8.34 ± 0.2 11.43 - 0.05 32-SOP-450A #1 #16 0.20 +0.10 19.90± 0.2 2.00 ± 0.2 (0.43) 0.40 ± 0.1 1.27 NOTE: Dimensions are in millimeters. Figure 15-1. 32-Pin SOP Package Mechanical Data 0.0MIN 2.40MAX 0.10 MAX 0.78 ± 0.20 15-1 MECHANICAL DATA S3C8095/P8095 #32 9.10 ± 0.20 #17 0 – 15 ° 10.16 – 0.05 32-SDIP-400 #1 27.88 MAX 27.48 ± 0.2 #16 3.80 ± 0.2 5.08MAX 0.51MIN 0.45 ± 0.10 (1.37) 1.00 ± 0.10 1.778 NOTE: Dimensions are in millimeters. Figure 15-2. 32-Pin SDIP Package Mechanical Data 15-2 3.30 ± 0.3 0.25 +0.1