31 V, Buck Converter
NR111D
Data Sheet
Description
Package
The NR111D is a buck converter IC that integrates
the power MOSFET. With the current mode control,
ultra low ESR capacitors such as ceramic capacitors can
be used. The IC has protection functions such as
Overcurrent Protection (OCP), Undervoltage Lockout
(UVLO) and Thermal Shutdown (TSD). An adjustable
Soft-start by an external capacitor prevents the excessive
inrush current in startup. The feature increasing
efficiency at light loads allows the device to be used in
the energy-saving applications. The IC integrates phase
compensation circuit which reduces the number of
external components and simplifies the design of
customer application. The IC has the EN pin that turns
the regulator on or off, and achieves low power
consumption requirements. The package of NR111D is
the DIP8.
DIP8
Not to scale
Specification
●
●
●
●
Input Voltage, VIN = 8 V to 31 V
Output Voltage, VO = 0.8 V to 24 V
Maximum Output Current, IO = 4 A
Operation Frequency: 350 kHz
Application
Features
● Up to 94% Efficiency
Up to 68% Efficiency at Maximum at Light Load
(IO = 20 mA)
● Current mode PWM control
● Stable with Low ESR Ceramic Output Capacitors
● No External Components Required by Incorporating
Phase Compensation
● Soft-start Function
Adjustable Soft-start time with an External Capacitor
● External ON/OFF Function
● Protection Functions:
Overcurrent Protection (OCP): Drooping, auto-restart
Thermal Shutdown (TSD): Auto-restart
Undervoltage Lockout (UVLO)
● AV Equipment
● White Goods
● Power Supply for Digital Appliances
Typical Application
R3
R1
NR111D
1 BS
SS 8
2 IN
EN 7
C10
3 SW
4 GND
VIN
ISET 6
FB 5
L1
VOUT
R5
C1
C2
C9
D1
C4 C5
R4
R6
GND
GND
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NR111D
Contents
Description ------------------------------------------------------------------------------------------------------ 1
Contents --------------------------------------------------------------------------------------------------------- 2
1. Absolute Maximum Ratings----------------------------------------------------------------------------- 3
2. Recommended Operating Conditions ----------------------------------------------------------------- 3
3. Electrical Characteristics -------------------------------------------------------------------------------- 4
4. Typical Performance Characteristics ----------------------------------------------------------------- 5
5. Block Diagram --------------------------------------------------------------------------------------------- 7
6. Pin Configuration Definitions --------------------------------------------------------------------------- 7
7. Typical Application --------------------------------------------------------------------------------------- 8
8. Physical Dimensions -------------------------------------------------------------------------------------- 9
9. Marking Diagram --------------------------------------------------------------------------------------- 10
10. Operational Description ------------------------------------------------------------------------------- 11
10.1. PWM Output Control ---------------------------------------------------------------------------- 11
10.2. Soft Start Function -------------------------------------------------------------------------------- 12
10.3. External ON/OFF Function --------------------------------------------------------------------- 12
10.4. Overcurrent Protection -------------------------------------------------------------------------- 13
10.5. Thermal Shutdown -------------------------------------------------------------------------------- 13
11. Design Notes ---------------------------------------------------------------------------------------------- 14
11.1. External Components ---------------------------------------------------------------------------- 14
11.1.1. Choke Coil, L1 ------------------------------------------------------------------------------- 14
11.1.2. Input Capacitor, CIN ------------------------------------------------------------------------ 15
11.1.3. Output Capacitor, COUT -------------------------------------------------------------------- 15
11.1.4. Freewheel Diode, D1 ------------------------------------------------------------------------ 16
11.1.5. Output Voltage, VO, and Output Capacitor -------------------------------------------- 17
11.2. Allowable power dissipation -------------------------------------------------------------------- 17
11.2.1. Power Supply Stability --------------------------------------------------------------------- 17
11.2.2. Spike Noise Reduction ---------------------------------------------------------------------- 17
11.2.3. Reverse Bias Condition --------------------------------------------------------------------- 18
11.3. Pattern Layout ------------------------------------------------------------------------------------- 19
11.3.1. Large Current Trace ----------------------------------------------------------------------- 19
11.3.2. Input and Output Capacitor -------------------------------------------------------------- 19
11.3.3. FB Pin Setting (Output Voltage Setting) ------------------------------------------------ 19
12. Pattern Layout Example ------------------------------------------------------------------------------- 20
Important Notes ---------------------------------------------------------------------------------------------- 22
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NR111D
1.
Absolute Maximum Ratings
Unless otherwise specified, TA = 25 °C.
Parameter
Symbol
Conditions
Rating
Unit
DC Input Voltage
VIN
35
V
BS Pin Voltage
VBS
44
V
BS–SW Voltage
VBS-SW
SW Pin Voltage
VSW
35
V
FB Pin Voltage
VFB
5.5
V
EN Pin Voltage
VEN
35
V
SS Pin Voltage
VSS
5.5
V
1.47
W
DC
8
Pulse width ≤ 30ns
12
The IC is mounted on the
glass-epoxy board
(70 mm × 60 mm) with
copper area (1310 mm2)
TJ(MAX) = 150 °C
V
Power Dissipation (1)
PD
Junction Temperature (2)
TJ
−40 to 150
°C
TSTG
−40 to 150
°C
θJP
41
°C/W
85
°C/W
Storage Temperature
Thermal Resistance
(junction–GND Pin)
Thermal Resistance
(junction–ambient air)
(1)
(2)
2.
θJA
The IC is mounted on the
glass-epoxy board
(70 mm × 60 mm) with
copper area (1310 mm2)
Remarks
Limited by thermal shutdown.
The temperature detection of thermal shutdown is about 160 °C.
Recommended Operating Conditions
Parameter
Symbol
DC Input Voltage (1)
DC Output Current
Output Voltage
Ambient Operating
Temperature (3)
(2)(3)
Conditions
Ratings
Units
Min.
Max.
VIN
6.5
31
V
IO
0
4.0
A
VO
0.8
24
V
TOP
−40
85
°C
Remarks
(1)
The minimum value of input voltage is taken as the larger one of either 6.5 V or VO +3 V.
See Typical Application Circuit for recommended circuit.
(3)
To be used within the allowable package power dissipation characteristics.
(2)
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NR111D
3.
Electrical Characteristics
Unless otherwise specified, TA = 25 °C.
Parameter
Symbol
Reference Voltage
Conditions
Min.
Typ.
Max.
Unit
0.784
0.800
0.816
V
―
±0.05
―
mV/°C
−20%
350
20%
kHz
VIN = 8 V to 30 V,
VO = 5 V, IO = 1.0 A
―
50
―
mV
VIN = 12 V, VO = 5 V,
IO = 0.1 A to 2.0 A
VIN = 12 V, VO = 5 V,
ISET = GND
VIN = 12 V, VO = 5 V,
IO = 0 A
VIN = 12 V, VO = 5 V,
IO = 0 A, VEN = 0 V
―
50
―
mV
―
5.5
―
A
―
1.0
―
mA
―
1.0
―
μA
VSS = 0 V, VIN = 12 V
6
10
14
μA
IEN
VEN = 10 V
―
20
50
μA
VEN
VIN = 12 V
0.7
1.4
2.1
V
―
90
―
%
―
150
―
ns
151
165
―
°C
―
20
―
°C
―
105
―
mΩ
VREF
Output Voltage Temperature
Coefficient
Switching Frequency
VIN = 12 V, IO = 1.0 A
VIN = 12 V, IO = 1.0 A,
ΔVREF/ΔT
−40 °C to 85 °C
VIN = 12 V, VO = 5 V,
fOSC
IO = 1.0 A
Line Regulation (4)
VLine
Load Regulation (4)
VLoad
Overcurrent Protection
Threshold
IS
Supply Current
IIN
Shutdown Supply Current
Source current at
Low Level
Voltage
Sink Current
EN Pin
Threshold
Voltage
Max On-duty (4)
SS Pin
IIN(off)
IEN/SS
DMAX
(4) (5)
Minimum On-time
tON(MIN)
Thermal Shutdown Threshold
TSD
Temperature (4)
Thermal Shutdown Restart
TSD_hys
Hysteresis of Temperature (4)
High-side Switch ON
RON(H)
Resistance (4)
(4)
(5)
Remarks
Guaranteed by design, not tested.
Input/ Output conditions are controlled by the minimum on time.
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NR111D
Efficiency, η (%)
Typical Performance Characteristics
Efficiency, η (%)
4.
Output Current, IO (A)
Efficiency (Vo = 3.3 V)
Figure 4-2.
Efficiency, η (%)
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0
Output Current, IO (A)
Figure 4-3.
Efficiency (Vo = 5.0 V)
NR114K UVLO
Vo=3.3V L=47uH
VO[V] VO (V)
Output Voltage,
Figure 4-1.
Output Current, IO (A)
Input Voltage,
V (V)
VIN[V]IN
Efficiency (Vo = 12.0 V)
Figure 4-4.
Output Startup (Load = CR)
ISET= GND
Output Voltage, VO (V)
Output Voltage, VO (V)
5.1
5.08
VIN = 8v
12v
24v
5.06
5.04
5.02
5
4.98
4.96
4.94
4.92
4.9
0
1
Output Current, IO (A)
Figure 4-5.
Overcurrent Protection
2
3
4
Output Current, IO (A)
Figure 4-6.
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Load Regulation
5
NR110K,111K,114K,115K,116K,117K
IQ_off
NR114K/115K,NR116K,NR117K IQ
5.0
0.40
4.5
0.35
Iin [mA]
Input Current,
IIN (mA)
Iin [mA] IIN (mA)
Input Current,
NR111D
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.30
0.25
0.20
0.15
0.10
0.05
0.00
-0.05
0.5
-0.10
0.0
0.0
5.0
10.0
15.0
20.0
25.0
30.0
0.0
5.0
Input Voltage,
VIN (V)
VIN[V]
Figure 4-7.
10.0
Input
Figure 4-8.
INNR110K
Pin Sink
focsCurrent at No Load
15.0
20.0
25.0
30.0
VIN[V]
Voltage,
VIN (V)
Quiescent Current
fosc [kHz]
Frequency (kHz)
Vo=3.3V L=10uH
500
480
460
440
420
400
380
360
340
320
300
280
260
240
220
200
0.0
1.0
2.0
3.0
4.0
5.0
Output Current,
Io [A] IO (A)
Figure 4-9.
Operating Frequency
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NR111D
5.
Block Diagram
IN
2
Σ
OSC
Pre Reg
VREF
ISET 6
Drive
Reg
1 BS
OCP REF
0.8 V
EN 7
Current Sense
Amp
OCP
ON/OFF
M1
PWM
Logic
ISET
OCP REF
3 SW
Compensation
Error amp.
0.8 V
5 FB
SS
TSD
UVLO
4
GND
6.
8
SS
Pin Configuration Definitions
1 BS
SS 8
2 IN
EN 7
3 SW
4 GND
ISET 6
Pin
Name
1
BS
2
IN
FB 5
3
SW
4
GND
5
FB
6
ISET
7
EN
8
SS
Descriptions
High-side boost input pin. The power is supplied to the driver of highside Nch-MOSFET through the BS pin. A capacitor and a resistor are
connected in series between the SW pin and the BS pin.
This pin is input pin. The power is supplied to the IC through the IN pin.
This pin is output pin. The power is output through the SW pin. Connect
the LC filter for the output to the this pin. A capacitor is required to be
connected between this pin and the BS pin to supply the power to the
high-side MOSFET.
Ground pin.
To control constant voltage, the output voltage is input to the FB pin,
and is compared with internal reference voltage. The feedback threshold
voltage is 0.8 V. The output voltage is set by resistors connected to the
FB pin. R5 and R6 are connected between the FB pin and output line.
R4 is connected between the FB pin and the GND pin.
OCP setting pin. This pin must be shorted to the ground.
Enable signal input pin. When high signal is input to this pin, the
internal regulator turns on. When low signal is input to this pin, the
internal regulator turns off.
Soft-start input. The soft-start period can be adjusted by the capacitor
connected between the SS pin and the GND pin. The soft-start operation
reduces the over-shoot of the output voltage and rush current.
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NR111D
7.
Typical Application
R1
R3
NR111D
1 BS
SS 8
2 IN
EN 7
C10
3 SW
4 GND
ISET 6
FB 5
L1
VIN
VOUT
R5
C1
C2
R4
C9
D1
GND
Symbol
C1
C2
C4
C5
C9
C10
C4
C5
R6
GND
Ratings
10 μF / 35 V
10 μF / 35 V
22 μF / 16 V
22 μF / 16 V
0.1 μF
0.1 μF
Symbol
R1
R3
R4
R5
R6
L1
D1
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Ratings
510 kΩ
22 Ω
18 kΩ
2.7 kΩ (Vo = 5.0 V)
3.9 kΩ
10 μH
40 V, 5 A (Schottky diode)
8
NR111D
8.
Physical Dimensions
● DIP8
NOTES:
● Dimensions in millimeters
● Not to scale
● Bare lead frame: Pb-free (RoHS compliant)
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NR111D
9.
Marking Diagram
8
NR111D
Part Number
SK
1
YM D
Lot Number:
Y is the last digit of the year of manufacture (0 to 9)
M is the month of the year (1 to 9, O, N, or D)
D is the period of days represented by:
1: the first 10 days of the month (1st to 10th)
2: the second 10 days of the month (11th to 20th)
3: the last – days of the month (21st to 31st)
Control Number
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NR111D
The IC starts switching operation with minimum onduty or maximum on-duty. The high-side switching
MOSFET, M1, is for supplying output power.
At startup of IC, the SW pin becomes low status
during short time to charge the boost capacitor, C10, for
M1 driving.
When M1 is on-status, the coil current is increased by
applying the voltage the SW pin and the coil. In addition,
the output of the current sense amplifier also increases.
Signal A is sum of the current sense amplifier output
and slope compensation signal. The comparator
compares the signal A with the error amplifier output.
When the signal A exceeds the output voltage of the
error amplifier (Error Amp.), the current comparator
output becomes “H” and the RS flip-flop circuit in
PWM logic is reset. Then, M1 turns off, and the
regenerative current flows through the Schottky diode,
D1.
The set signal is generated in each cycle, and set the
RS flip-flop circuit.
If the signal A does not exceed the output voltage of
the error amplifier (Error Amp.), the signal of off duty
circuit sets RS flip-flop circuit.
10. Operational Description
10.1. PWM Output Control
The IC consists of total three blocks; two feedback
loop systems (current control and voltage control) and
one slope compensation. For the voltage control
feedback, divided output voltage by resistor is input to
the FB pin. The internal error amplifier compares the FB
pin voltage with the reference voltage VREF = 0.8 V.
For the current control feedback, the loop makes the
coil current feedback to the PWM control. The coil
current that is branched by using sense MOSFET is
detected by the current sense amplifier. In addition, the
slope compensation is made for current control slope in
order to prevent subharmonic oscillations.
The PWM control with current control method is
achieved by calculating the voltage control feedback, the
current control feedback and the slope compensation
signals. (See Figure 10-1.)
When UVLO is released or the EN pin or the SS pin
voltage exceeds the threshold, the IC starts the switching
operation.
IN
VIN
2
C1
Σ
OSC
Pre Reg
VREF
R1
0.8 V
EN
7
Current Sense
Amp
OCP
BS
1
Drive
Reg
R3
OCP REF
M1
C10
A
ON/OFF
Comp.
C2
SW
3
PWM
Logic
L1
Vo
D1 R5
ISET
6
ISET
OCP REF
R4
Compensation
Error amp.
0.8 V
C4 C5
5
FB
R6
SS
TSD
UVLO
GND
4
SS
8
C9
Figure 10-1.
Basic Structure of Chopper Type Regulator with PWM Control by Current Control
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NR111D
Figure 10-2 shows the SS pin internal circuit.
When capacitor, CSS, is connected to the SS pin, the
IC operates in soft start at startup. The output voltage,
VO, increases depending on the charged voltage of CSS.
Delay time, tDELAY is calculated by Equation (1). Soft
start time, tSS is calculated by Equation (2).
If the soft start function is unused, the SS pin is
unconnected (open status).
0.9 (V)
ISS
t DLAY = CSS ×
(1)
SS pin voltage at open is 3.0 V. Figure 10-4 shows the
relationship between the CSS discharge time and CSS
capacitance. CSS discharge time is require time that the
SS pin voltage decreases to 0.9 V from 3.0 V
CSS Discharge Time (ms)
10.2. Soft Start Function
CSS discharge time
CSS Capacitance (µF)
t SS
1.79 (V) − 0.9 (V)
= CSS ×
0.9 × ISS
(2)
5
IEN/SS = 10 μA
SS
8
×0.9
VREF = 0.8 V
0.9 V
Error Amp.
Figure 10-2.
CSS Discharge Time vs. CSS Capacitance
In case the CSS is short circuit status or the CSS value is
set too small, the output capacitor is charged by the
output current that is limited by overcurrent protection
threshold current, Is.
In the case, the time constant is calculated by
Equation (3). This time constant is in no load status.
When the circuit has some load, the load current is
subtracted from Is.
FB
CSS
Figure 10-4.
SS Pin Internal Circuit
t=
COUT × VO
IS
(3)
10.3. External ON/OFF Function
IN pin
Voltge
4.1 V
Time
SS pin
Voltage
When the external signal is input to EN pin, the IC
turns on/off the output.
When the EN pin voltage is decreased to VEN = 1.4 V
or less by open collector switch as shown in Figure 10-5,
the switching operation stops.
When the external on/off function is unused, pull up
the EN pin to the IN pin by resister (510 kΩ) as shown
in Figure 10-6.
1.79 V
0.9 V
Time
Output
Voltage
510 kΩ
NR111D
Time
tDELAY
Figure 10-3.
tSS
Soft Start Operation Waveform
Figure 10-5.
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External ON/OFF Function
12
NR111D
IO ≥
∆IL
2
(5)
510 kΩ
NR111D
IO = IP −
Figure 10-6. External ON/OFF Function Disabled
10.4. Overcurrent Protection
The IC has an overcurrent protection (OCP) circuit.
The OCP circuit detects the peak current of the
switching transistor. When the peak current exceeds the
setting current, the IC limits the current by forcibly
shortening the on-time of transistor and decreasing the
output voltage (see Figure 10-7). When the overcurrent
state is released, the output voltage automatically returns.
∆IL
2
(6)
In the discontinuous conduction mode (DCM), output
current, IO, is calculated as follows:
IO <
∆IL
2
IO =
L × VIN × f
×I 2
2 × VO × (VIN − VO ) P
(7)
(8)
1
=
× IP 2
2 × ∆IL
Output
Voltage
10.5. Thermal Shutdown
Output Current
Figure 10-7.
Output Voltage Characteristics at
Overcurrent
The output current, IO, can be calculated using the
OCP operation current, IP as shown in Equation (6) or
Equation (8).
When the on-duty is 50% or less, the inductance, L, is
recommended to be the value that ΔIL is 0.3 A to 1.2 A.
You must set the inductance that satisfies output
current, IO, from the specifications (input voltage and
output voltage) and IP.
The thermal shutdown (TSD) circuit detects the
junction temperature of the IC. When the junction
temperature exceeds about 160 °C, TSD circuit is
activated and stops the switching of the output transistor.
Then, the output voltage decreases.
When the junction temperature decreases about 20 °C
from the TSD circuit activation temperature, the output
voltage automatically returns.
The TSD circuit protects from the heat generation for
short time such as momentary short circuit. The
operation and the reliabilities of the IC are not
guaranteed under the continuous heat generation
conditions such as short circuit for a long time.
Output
Voltage
The ripple current of the choke coil, ΔIL, is calculated
as follows:
∆IL =
(VIN − VO )
× VO
L × VIN × f
TSD release
temperature
TSD activation
temperature
(4)
where,
VIN is input voltage,
VO is output voltage,
L is inductance the choke coil, and
f is switching frequency.
Junction Temperature
Figure 10-8.
Output Voltage Characteristics of
Thermal Shutdown
In the continuous conduction mode (CCM), output
current, IO, is calculated as follows:
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NR111D
ΔIL is the ripple current of the choke coil. ILP is the
peak current of the choke coil.
ΔIL and ILP are calculated by following equations.
11. Design Notes
11.1. External Components
Take care to use properly rated, including derating as
necessary and proper type of components.
R3
NR111D
1 BS
R1
2 IN
SS 8
4 GND
VIN
ISET 6
FB 5
L1
VOUT
R5
C1
(VIN − VO )
× VO
L × VIN × f
ILP =
∆IL
+ IOUT
2
(9)
(10)
EN 7
C10
3 SW
∆IL =
C2
C9
D1
C4 C5
R4
R6
GND
As above equations, ΔIL and ILP increase according to
decreasing the inductance, L. Thus, too small inductance
setting may cause the unstable operation of the
switching regulator because the coil current ripple
becomes large.
You must consider that the inductance of the choke
coil decreases in the magnetic saturation condition such
as overload and short circuit of load.
GND
Large inductance
Figure 11-1.
Small inductance
The IC Peripheral Circuit
11.1.1. Choke Coil, L1
The choke coil, L1, is the most important component
in chopper type switching regulators. In order to keep
the stabilized regulator operation, the coil must be
avoided the unsafe operation including the saturation
condition or the over-heat excessively.
If the winding resistance of the choke coil is too high,
the efficiency decreases and may not be the setting value.
The overcurrent protection threshold of NR111D is
5.5 A (Typ.). You must consider about the self-heating
of the choke coil at the status including overload and the
momentary short circuit. The selection points of the
choke coil are as follows:
● Select choke coil for switching regulator.
It is not recommended to use the coil for noise filter,
since its power dissipation becomes high and causes
high heat generation.
● Avoid a sub-harmonic oscillations.
The current control that detects peak current may
cause a sub-harmonic oscillation theoretically in the
condition that the on-duty is over 50%.
In the sub-harmonic oscillation, coil current is
changed by the integer multiple of switching
frequency. Thus, the IC compensates the coil current
in internal to operate stably.
Therefore, the inductance must be selected properly
according to output voltage.
Figure 11-2.
Ripple Current of Choke Coil
● Fulfill the rated current.
The rated current value of the choke coil must be set
larger than the maximum load current, which is used.
If the load current exceeds to the rated current value
of the coil, the inductance of the coil decreaes rapidly
and large current flows.
● Select the low noise type.
The open magnetic circuit type core like a drum type
may generate noise in peripheral circuit due to the
magnetic flux passing outside of coil.
It is recommended to use the Coils of closed magnetic
circuit type core such as toroidal type, EI type and EE
type.
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11.1.2. Input Capacitor, CIN
The input capacitor, CIN, shows C1 and C2.
CIN is the bypass capacitor of input circuit. It supplies
the current of short pulses to the regulator during
switching and compensates the input voltage drop. Thus,
CIN should be placed as close the IC as possible. Even if
the rectifying capacitor of an AC/DC convertor circuit is
in input circuit, CIN is required when the rectifying
capacitor is not placed near the IC.
Since large ripple current flows through CIN, CIN must
be used the capacitor for the switching regulator, which
is for high frequency and has low impedance
characteristics. The selection points of CIN are as
follows:
● Fulfill the breakdown voltage rating.
● Fulfill sufficient allowable ripple current rating.
IIN
2
VIN
IN
Ripple
current
CIN
Figure 11-3.
GND
4
Current Flow of Input Capacitor
IIN
0
IV
IP
tON
load current. The effective value of the ripple current,
IINR(RMS), is calculated by Equation (11).
IINR(RMS) ≈ 1.2 ×
VO
× IO
VIN
(11)
If VIN is 20 V, IO is 3 A, VO is 5 V,
IINR(RMS) ≈ 1.2 ×
5 (V)
× 3 (A) = 0.9 (A)
20 (V)
In the case, you must select the capacitor that the
allowable ripple current is more than 0.9 A.
11.1.3. Output Capacitor, COUT
The output capacitor, COUT, shows C4 and C5.
In the current control method, the feedback loop
which detects the inductor current is added to the
voltage control method. The stable operation is achieved
without considering the effect of the secondary delay
factor of LC filter.
Thus, the capacitance of the capacitor of the LC filter
can be reduced. The IC can achieve the stable operation
using the low ESR capacitor (ceramic capacitor).
The COUT is the rectifying capacitor of switching
output, and composes the LC low-pass filter with choke
coil, L1.
The current that is same of the ripple current of choke
coil, ΔIL, flows through COUT. Therefore, you must
consider derating for breakdown voltage and the
allowable ripple current (See Section 11.1.2 Input
Capacitor).
Since large ripple current flows through COUT, COUT
must be used the capacitor for the switching regulator,
which is for high frequency and has low impedance
characteristics.
If the impedance of COUT is high, the IC may be
occurred unstable switching operation in low
temperature environment.
T
IL
VO
Figure 11-4.
L1
Ripple
current
Current Waveform of Input Capacitor
If the CIN voltage and ripple current is over the rating
of the breakdown voltage and the allowable ripple
current, or you does not consider derating for these
rating, the following problem may be occurred. Thus,
you must consider derating for breakdown voltage and
the allowable ripple current.
● The capacitor life time short (burst, capacitance
decreasing, equivalent impedance increasing, etc.)
● The unstable switching operation of the IC.
ESR
Io
RL
COUT
Figure 11-5.
Current Flow of Output Capacitor
The ripple current of CIN increases depending on the
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11.1.4. Freewheel Diode, D1
IO
∆IL
0
Figure 11-6.
Current Waveform of Output Capacitor
The ripple current of COUT is same with the ripple
current of the choke coil, and does not depend on the
load current. Thus, the effective value of the ripple
current, IOR(RMS), is calculated by Equation (12).
IOR(RMS) =
∆IL
Flywheel diode, D1, is for discharging energy that is
charged choke coil in off-status.
External flywheel diode, D1, improves efficiency, and
must be used a Schottky-barrier diode. If the fast
recovery diode is used, the IC may be damaged by the
reverse voltage that is caused by the surge at turn-on or
the forward voltage in on-status.
Since the output voltage of the SW pin (3 pin) is
nearly same with input voltage, the reverse breakdown
voltage of D1 is required more than the input voltage.
You must not use ferrite beads for the flywheel diode.
(12)
2√3
If ΔIL is 0.5 A,
IOR(RMS) =
0.5 (A)
2√3
≈ 0.14 (A)
In the case, you must select the capacitor that the
allowable ripple current is more than 0.14 A.
The output ripple voltage of the IC, VRIP, is calculated
by Equation (13).
VRIP = ∆IL × COUT ESR
(13)
Where, ΔIL is the ripple current of the choke coil
(same of the ripple current of COUT), and COUTESR is the
equivalent series resistance (ESR) of COUT.
From Equation (13), you should set the low ESR
capacitor in order to reduce the output ripple voltage.
In same family of the electrolytic capacitor, the larger
capacitance in same the rating voltage, or the higher
rating voltage (the larger package size) in same
capacitance is, the lower the ESR generally becomes.
If ΔIL is 0.5 A, VRIP is 40 mV,
COUT ESR =
VRIP 40(mV)
=
= 80 (mΩ)
∆IL
0.5 (A)
(14)
In the case, you must select the capacitor that the ESR
is less than 80 mΩ
In addition, the ESR depends on temperature, and
generally increases in low temperature. Thus, you
should check the ESR at the actual used temperature.
The ESR characteristic is shown in each capacitor maker.
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11.1.5. Output Voltage, VO, and Output
Capacitor
The output capacitor determines according to the
output voltage VO. In each voltage, Table 11-1 shows
the capacitance that the IC can operate stable. The
values are reference. The ESR of the electrolytic
capacitor is about 100 mΩ. See Section 11.1.1 about the
inductance, L, setting.
Table 11-1. Output Voltage, VO, vs. Output Capacitor
(NR111D: 350 kHz)
VO (V)
1.2
1.8
3.3
5
9
12
14
Output Capacitor (µF)
Electrolytic Capacitor
Ceramic Capacitor
(ESR ≈ 100 mΩ)
33 to 100
47 to 330
22 to 100
47 to 470
10 to 68
20 to 180
4.7 to 47
4.7 to 100
3.3 to 22
2.2 to 47
3.3 to 22
2.2 to 33
2.2 to 22
2.2 to 33
11.2. Allowable power dissipation
The power dissipation of the IC must be within the
allowable power dissipation shown in Figure 11-7, and
is calculated by Equation Figure 11-7.
P = VO × IO × (
100
VO
− 1) −VF × IO × (1 −
)
ηx
VIN
(15)
where,
VO is output voltage,
VIN is Input voltage,
IO is output curent,
VF is diode forward voltage, and
ηx is efficiency (%).
Since the efficiency determines from the input voltage
and output current, it shall be obtained from the
efficiency curve and substituted in percent.
The heat release setting of the freewheel diode is
required separately.
Allowable Power Dissipation, PD (W)
NR111D
Ambient Temperature, TA (°C)
NOTES
● Glass-epoxy board, 70 mm × 60 mm
● Copper area, 1310 mm2
● The power dissipation is calculated at the junction
temperature 125 °C.
Figure 11-7.
Allowable Power Dissipation Curve
11.2.1. Power Supply Stability
The phase characteristics of a chopper type regulator
are the synthesis of follows.
The internal phase characteristics of a regulator IC,
the output capacitor, and the load resistance.
Internal phase characteristics of a regulator IC are
generally determined by the delay time of control block
and the phase characteristics of the output error
amplifier. Therefore, the phase delay due to the delay
time of the control block rarely causes problems in
actual use.
The IC has phase compensation for output error
amplifier. See Section 11.1.5 about the output voltage
setting and the output current setting for stable operation.
11.2.2. Spike Noise Reduction
This section shows how to reduce spike noises.
Extra attentions should be paid when you measure
spike noises using an oscilloscope.
The ground lead of a probe should be as short as
possible, and should be connected to root of output
capacitor. When the ground lead is long, the noises may
be measured larger than actual noises because the
ground lead becomes an antenna.
● Add a resistance to the BS pin in series.
When the resister, R3, is added between the BS pin
and SW pin as shown in Figure 11-8, the turn-on
switching speed of the internal power MOSFET
becomes slow. The spike noises is reduced according
to decreasing switching speed.
The maximum value of R3 is 22 Ω.
If R3 is set too large, the following event may be
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NR111D
occured.
Start-up failure.
The IC is damaged by self-heating due to decreasing
the gate voltage of internal power MOSFET.
In the area, bead cores must not be used.
NR111D
VIN
IN
1
BS
Vo
2
3
SW
7
Control
Circuit
EN
8
SS
GND
6
FB
ISET
GND
NR111D
GND
Figure 11-10.
Figure 11-8.
4
5
BS pin peripheral circuit
● Add a snubber circuit.
When an RC snubber (a resistor and a capacitor) is
added to the SW pin as shown in Figure 11-9, the
spike noises are reduced because the slopes of output
waveform and the recovery current waveform of the
diode become shallow.
Note that the efficiency is decreased as the swiching
loss of the internal power MOSFET increases.
Note when you add bead cores
11.2.3. Reverse Bias Condition
When the IN pin voltage becomes higher than the SW
pin voltage (battery charger application, etc.), the diode
for reverse bias protection must be connected between
the IN pin and SW pin as shown in Figure 11-11.
NR111D
NR111D
About 10 Ω
About 1000 pF
Figure 11-9.
Figure 11-11. When the IN pin voltage becomes
higher than the SW pin voltage
SW pin peripheral circuit
● Note when you add bead cores
Bead cores incruding ferrite beads must not be used in
the broken line in Figure 11-10.
When you layouts the PCB trace of the switching
regurator, the parasitic inductance of PCB trace
should be as small as possible. If bead cores are added,
the the inductance of the bead cores is added to the
parasitic inductance of PCB trace. It may causes the
malfunction or break of the IC by the unstable status
including negative potential grounding due to surge
voltage.
The noise reduction method should be chosen from
above method (add the BS pin resistor or the snubber
ciecuit).
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NR111D
11.3. Pattern Layout
11.3.1. Large Current Trace
Since large current flows through the bold line in
Figure 11-12, these PCB traces must be as wide and
small loop as possible.
The output voltage is set by the resisters connected to
the FB pin (R4, R5 and R6). The minimum current
flowing through the FB pin, IFB, should be set about
0.2 mA. The maximum value of IFB should be set
considering about the efficiency.
The output voltage, VO, and the value of R4, R5 and
R6 are calculated by the following equations.
IFB =
R1
VFB
R6
(16)
NR111D
R3
1 BS
SS 8
2 IN
EN 7
where, VFB is 0.8 V ± 2%.
C10
3 SW
ISET 6
4 GND
R4 + R5 =
FB 5
L1
VIN
VOUT
VO − VFB
VO − 0.8
=
(Ω)
IFB
0.2 × 10−3
(17)
R5
C1
C2
R4
C9
D1
C4
C5
VFB
0.8
=
≈ 3.9 (kΩ)
IFB 0.2 × 10−3
GND
VO = (R4 + R5) ×
Input capacitors (C1 and C2) and output capacitors
(C4 and C5) are placed as close the IC as possible.
Even if the rectifying capacitor of an AC/DC
convertor circuit is in input circuit, input capacitors are
required when the rectifying capacitor is not placed near
the IC.
The traces of these capacitors are drawn wide (see
Figure 11-13-(a), Proper Trace)
(19)
If the output voltage is set to 0.8 V that is same
voltage with VFB, R6 should be connected to operate
stable.
The relationship between input voltage and output
voltage is determined by the on-time of the SW pin. The
on-time is recommended to set to more than 200 ns.
The traces connected to the FB pin and the R4, R5,
R6 must not be placed in parallel with the trace
connected to the freewheel diode, because switching
noise affects to the feedback detection voltage, and may
occur unstable operations.
Especially, the trace between FB pin and R6 must be
as short as possible.
SW
Figure 11-13.
VFB
+ VFB
R6
Large Current Line
11.3.2. Input and Output Capacitor
(a) Proper Trace
(18)
R6
GND
Figure 11-12.
R6 =
R5
(b) Improper Trace
Trace Example of Capacitors
11.3.3. FB Pin Setting (Output Voltage
Setting)
The FB pin detects the feedback signal to control the
output voltage, and should be placed as close the output
capacitor as possible. If the FB pin is far from the output
capacitor, the unstable operation may be occurred by the
regulation decreasing and the switching ripple increasing.
Vo
3
FB
5
GND
4
R4
IFB
R6
GND
Figure 11-14.
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FB pin peripheral circuit
19
NR111D
12. Pattern Layout Example
Ground trace must be connected as short as possible to the GND pin at single point grounding.
(a) Front Side (Components is mounted)
Figure 12-1.
(b) Back Side (Ground pattern)
Pattern Layout Example (PCB size: 40 mm × 40 mm)
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NR111D
R7
Z1
D2
R3
1 BS
SS 8
2 IN
EN 7
3 SW
ISET 6
4 GND
Vin
R1
FB 5
C10
L1
Vo
R8
R5
VoS
VinS
C11 R4
C1 C2 C6
C9
C4
C5
R2
D1
R10
R6
C12
GND
GND
Figure 12-2.
Pattern Layout Example Circuit
Table 12-1. Bill of Materials
Symbol
C1
C2
C4
C5
C6*
C9
C10
C11*
C12*
Ratings
Ceramic, 10 μF / 35 V
Ceramic, 10 μF / 35 V
Ceramic, 22 μF / 16 V
Ceramic, 22 μF / 16 V
Option
Ceramic, 0.1 μF
Ceramic, 0.1 μF
Option
Option
Symbol
D1
D2*
L1
R1
R2*
R3
R4
R5
R6
Ratings
Schottky 40 V, 5.0 A
Option
10 μH
510 kΩ
Option
22 Ω
18 kΩ
2.7 kΩ (Vo = 5.0 V)
3.9 kΩ
Symbol
R7
R8*
R10*
Z1
Ratings
Open
Option
Option
Buck converter, NR111D
* It is necessary to be adjusted based on actual operation in the application.
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NR111D
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