LLC Current-Resonant Off-Line Switching Controller
SSC3S921
Data Sheet
Description
Package
The SSC3S921 is a controller with SMZ* method for
LLC current resonant switching power supplies,
incorporating a floating drive circuit for a high-side
power MOSFET. The IC includes useful functions such
as Standby Function, Automatic Dead Time Adjustment,
and Capacitive Mode Detection.
The IC achieves high efficiency, low noise and high
cost-performance power supply systems with few
external components.
*SMZ: Soft-switched Multi-resonant Zero Current
switch, achieved soft switching operation during all
switching periods.
SOP18
Not to scale
Features
● Standby Mode Change Function
▫ Output Power at Light Load: PO = 125 mW
(PIN = 0.27 W, as a reference with discharge resistor
of 1MΩ for across the line capacitor)
▫ Burst operation in standby mode
▫ Soft-on/Soft-off function: reduces audible noise
● PFC IC ON/OFF Function: In standby operation, the IC
turns off PFC IC.
● Soft-start Function
● Capacitive Mode Detection Function
● Reset Detection Function
● Automatic Dead Time Adjustment Function
● Input Electrolytic Capacitor Discharge Function
● Protections
▫ Brown-In and Brown-Out Function:
▫ High-side Driver UVLO: Auto-restart: Auto-restart
▫ Overcurrent Protection (OCP): Auto-restart, peak
drain current detection, 2-step detection
▫ Overload Protection (OLP): Auto-restart
▫ Overvoltage Protection (OVP): Auto-restart
▫ REG Overvoltage Protection (REG_OVP): Latched
shutdown
▫ Thermal Shutdown (TSD): Auto-restart
Applications
Switching power supplies for electronic devices such as:
● Digital appliances: LCD television and so forth
● Office automation (OA) equipment: server, multifunction printer, and so forth
● Industrial apparatus
● Communication facilities
Typical Application
VOUT1(+)
U1
PFC OUT
VSEN
GND
1
18
VCC
2
17
FB
3
16
VGH
15
VS
14
VB
ADJ
4
CSS
5
CL
6
RC
7
PL
SB
SSC3S921
PFC IC
(SSC2016S)
VCC
ST
VOUT(-)
13
12
REG
8
11
VGL
9
10
GND
VOUT2(+)
TC_SSC3S921_1_R4
SSC3S921 - DSJ Rev.1.92
SANKEN ELECTRIC CO., LTD.
Oct. 03, 2023
https://www.sanken-ele.co.jp/en/
© SANKEN ELECTRIC CO., LTD. 2015
1
SSC3S921
Contents
Description ------------------------------------------------------------------------------------------------------ 1
Contents --------------------------------------------------------------------------------------------------------- 2
1. Absolute Maximum Ratings----------------------------------------------------------------------------- 3
2. Electrical Characteristics -------------------------------------------------------------------------------- 4
3. Block Diagram --------------------------------------------------------------------------------------------- 7
4. Pin Configuration Definitions --------------------------------------------------------------------------- 7
5. Typical Application --------------------------------------------------------------------------------------- 8
6. External Dimensions -------------------------------------------------------------------------------------- 9
7. Marking Diagram ----------------------------------------------------------------------------------------- 9
8. Operational Description ------------------------------------------------------------------------------- 10
8.1 Resonant Circuit Operation --------------------------------------------------------------------- 10
8.2 Startup Operation --------------------------------------------------------------------------------- 13
8.3 Undervoltage Lockout (UVLO) ---------------------------------------------------------------- 14
8.4 Bias Assist Function------------------------------------------------------------------------------- 14
8.5 Soft Start Function -------------------------------------------------------------------------------- 14
8.6 Minimum and Maximum Switching Frequency Setting ----------------------------------- 15
8.7 High-side Driver ----------------------------------------------------------------------------------- 15
8.8 Constant Voltage Control Operation ---------------------------------------------------------- 15
8.9 Standby Function ---------------------------------------------------------------------------------- 16
8.9.1
Standby Mode Changed by External Signal ------------------------------------------- 16
8.9.2
Burst Oscillation Operation --------------------------------------------------------------- 17
8.9.3
PFC ON/OFF Function -------------------------------------------------------------------- 17
8.10 Automatic Dead Time Adjustment Function ------------------------------------------------ 17
8.11 Brown-In and Brown-Out Function ----------------------------------------------------------- 18
8.12 Capacitive Mode Detection Function ---------------------------------------------------------- 19
8.13 Input Electrolytic Capacitor Discharge Function ------------------------------------------- 20
8.14 Reset Detection Function ------------------------------------------------------------------------ 20
8.15 Overvoltage Protection (OVP) ------------------------------------------------------------------ 22
8.16 REG Overvoltage Protection (REG_OVP) --------------------------------------------------- 22
8.17 Overcurrent Protection (OCP) ----------------------------------------------------------------- 22
8.18 Overload Protection (OLP) ---------------------------------------------------------------------- 23
8.19 Thermal Shutdown (TSD) ----------------------------------------------------------------------- 23
9. Design Notes ---------------------------------------------------------------------------------------------- 24
9.1 External Components ---------------------------------------------------------------------------- 24
9.1.1
Input and Output Electrolytic Capacitors ---------------------------------------------- 24
9.1.2
Resonant Transformer --------------------------------------------------------------------- 24
9.1.3
Current Detection Resistor, ROCP -------------------------------------------------------- 24
9.1.4
Current Resonant Capacitor, Ci --------------------------------------------------------- 24
9.1.5
Gate Pin Peripheral Circuit --------------------------------------------------------------- 24
9.2 PCB Trace Layout and Component Placement --------------------------------------------- 24
10. Pattern Layout Example ------------------------------------------------------------------------------- 26
Important Notes ---------------------------------------------------------------------------------------------- 28
SSC3S921 - DSJ Rev.1.92
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Oct. 03, 2023
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© SANKEN ELECTRIC CO., LTD. 2015
2
SSC3S921
1.
Absolute Maximum Ratings
Current polarities are defined as follows: current going into the IC (sinking) is positive current (+); and current
coming out of the IC (sourcing) is negative current (−).
Unless otherwise specified, TA is 25°C.
Parameter
Symbol
Pins
Rating
Unit
VSEN Pin Sink Current
ISEN
1 − 10
1.0
mA
Control Part Input Voltage
VCC
2 − 10
−0.3 to 35
V
FB Pin Voltage
VFB
3 − 10
−0.3 to 6
V
ADJ Pin Voltage
VADJ
4 − 10
−0.3 to VREG
V
CSS Pin Voltage
VCSS
5 − 10
−0.3 to 6
V
CL Pin Voltage
VCL
6 − 10
−0.3 to 6
V
RC Pin Voltage
VRC
7 − 10
−6 to 6
V
PL Pin Voltage
VPL
8 − 10
−0.3 to 6
V
SB Pin Sink Current
ISB
9 − 10
100
μA
VGL pin Voltage
VGL
11 – 10
−0.3 to VREG + 0.3
V
REG pin Source Current
IREG
12 – 10
−10.0
mA
VB–VS
14 − 15
−0.3 to 20.0
V
VS Pin Voltage
VS
15 − 10
−1 to 600
V
VGH Pin Voltage
VGH
16 − 10
VS − 0.3 to VB + 0.3
V
ST Pin Voltage
VST
18 − 10
−0.3 to 600
V
Operating Ambient Temperature
TOP
—
−40 to 85
°C
Storage Temperature
TSTG
—
−40 to 125
°C
Voltage Between VB Pin and VS Pin
TJ
—
150
°C
Junction Temperature
* Surge voltage withstand (Human body model) of No.14, 15, 16, and 18 is guaranteed 1000 V. Other pins are
guaranteed 2000 V.
SSC3S921 - DSJ Rev.1.92
SANKEN ELECTRIC CO., LTD.
Oct. 03, 2023
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© SANKEN ELECTRIC CO., LTD. 2015
3
SSC3S921
2.
Electrical Characteristics
Current polarities are defined as follows: current going into the IC (sinking) is positive current (+); and current
coming out of the IC (sourcing) is negative current (−).
Unless otherwise specified, TA is 25°C, VCC is 19 V.
Parameter
Symbol
Conditions
Pins
Min.
Typ.
Max.
Unit
Start Circuit and Circuit Current
Operation Start Voltage
VCC(ON)
2 − 10
15.8
17.0
18.2
V
Operation Stop Voltage*
Startup Current Biasing Threshold
Voltage*
Circuit Current in Operation
VCC(OFF)
2 − 10
7.8
8.9
9.8
V
VCC(BIAS)
2 − 10
9.0
9.8
10.6
V
ICC(ON)
2 − 10
—
—
10.0
mA
2 − 10
—
0.7
1.5
mA
Circuit Current in Non-operation
ICC(OFF)
Startup Current
Protection Operation Release
Threshold Voltage*
REG Pin Overvoltage Protection
Release Threshold Voltage
Circuit Current in Protection
IST
18 − 10
3.0
6.0
9.0
mA
VCC(P.OFF)
2 − 10
7.8
8.9
9.8
V
VCC(L.OFF)
2 − 10
2.0
5.0
8.0
V
2 − 10
—
0.7
1.5
mA
27.5
31.5
35.5
kHz
230
300
380
kHz
0.04
0.24
0.44
µs
1.20
1.65
2.20
µs
69
73
77
kHz
42.4
45.4
48.4
kHz
ICC(P)
VCC = 11 V
VCC = 10 V
Oscillator
Minimum Frequency
f(MIN)
Maximum Frequency
f(MAX)
Minimum Dead-Time
td(MIN)
Maximum Dead-Time
td(MAX)
Externally Adjusted Minimum
Frequency 1
Externally Adjusted Minimum
Frequency 2
Feedback Control
FB Pin Oscillation Start Threshold
Voltage
FB Pin Oscillation Stop Threshold
Voltage
FB Pin Maximum Source Current
f(MIN)ADJ1
RCSS = 30 kΩ
f(MIN)ADJ2
RCSS = 77 kΩ
11 – 10
16 − 15
11 – 10
16 − 15
11 – 10
16 − 15
11 – 10
16 − 15
11 – 10
16 − 15
11 – 10
16 − 15
VFB(ON)
3 – 10
0.15
0.30
0.45
V
VFB(OFF)
3 – 10
0.05
0.20
0.35
V
3 – 10
−300
−195
−100
µA
IFB(R)
3 – 10
2.5
5.0
7.5
mA
CSS Pin Charging Current
ICSS(C)
5 – 10
−120
−105
−90
µA
CSS Pin Reset Current
ICSS(R)
5 – 10
11 – 10
16 − 15
1.1
1.8
2.5
mA
400
500
600
kHz
FB Pin Reset Current
IFB(MAX)
VFB = 0 V
Soft-start
Maximum Frequency in Soft-start
f(MAX)SS
VCC = 11V
Standby
SB Pin Standby Threshold Voltage
SB Pin Oscillation Start Threshold
Voltage
VSB(STB)
9 – 10
4.5
5.0
5.5
V
VSB(ON)
9 – 10
0.5
0.6
0.7
V
* VCC(OFF) = VCC(P.OFF) < VCC(BIAS) always.
SSC3S921 - DSJ Rev.1.92
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Oct. 03, 2023
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© SANKEN ELECTRIC CO., LTD. 2015
4
SSC3S921
Parameter
SB Pin Oscillation Stop Threshold
Voltage
SB Pin Clamp Voltage
Symbol
Conditions
Pins
Min.
Typ.
Max.
Unit
VSB(OFF)
9 – 10
0.4
0.5
0.6
V
VSB(CLAMP)
9 – 10
7
8.5
10
V
SB Pin Source Current
ISB(SRC)
9 – 10
−17
−10
−3
µA
SB Pin Sink Current
CSS Pin Standby Release Threshold
Voltage
PFC ON/OF Function
ADJ Pin Voltage in Normal
Operation
ADJ Pin Voltage in Standby
Operation
Overload Protection (OLP)
ISB(SNK)
9 – 10
3
10
17
µA
VCSS(STB)
5 – 10
1.35
1.50
1.65
V
VADJ(L)
IADJ = 100 μA
4 – 10
0
1
2
V
VADJ(H)
IADJ = −100 μA
4 – 10
8.5
9.9
10.8
V
CL pin OLP Threshold Voltage
VCL(OLP)
6 – 10
3.9
4.2
4.5
V
CL Pin Source Current
ICL(SRC)
6 – 10
−29
−17
−5
μA
VSEN Pin Threshold Voltage (On)
VSEN(ON)
1 – 10
1.248
1.300
1.352
V
VSEN Pin Threshold Voltage (Off)
VSEN(OFF)
1 – 10
1.056
1.100
1.144
V
VSEN (CLAMP)
1 – 10
10.0
—
—
V
tRST(MAX)
11 – 10
16 − 15
4
5
6
µs
VREG
12 – 10
9.6
10.0
10.8
V
VBUV(ON)
14 – 15
5.7
6.8
7.9
V
VBUV(OFF)
14 – 15
5.5
6.4
7.3
V
11 – 10
16 − 15
—
–540
—
mA
11 – 10
16 − 15
—
1.50
—
A
11 – 10
16 − 15
−140
−90
−40
mA
11 – 10
16 − 15
140
230
360
mA
0.02
0.10
0.18
V
−0.18
−0.10
−0.02
V
0.4
0.50
0.6
V
Brown-In and Brown-Out
VSEN Pin Clamp Voltage
Reset Detection
Maximum Reset Time
Driver Circuit Power Supply
VREG Pin Output Voltage
High-side Driver
High-side Driver Operation Start
Voltage
High-side Driver Operation Stop
Voltage
Driver Circuit
VGL,VGH Pin Source Current 1
IGL(SRC)1
IGH(SRC)1
VGL,VGH Pin Sink Current 1
IGL(SNK)1
IGH(SNK)1
VGL,VGH Pin Source Current 2
IGL(SRC)2
IGH(SRC)2
VGL,VGH Pin Sink Current 2
IGL(SNK)2
IGH(SNK)2
VREG = 10.5V
VB = 10.5V
VGL = 0V
VGH = 0V
VREG = 10.5V
VB = 10.5V
VGL = 10.5V
VGH = 10.5V
VREG = 11.5V
VB = 11.5V
VGL = 10V
VGH = 10V
VREG = 12V
VB = 12V
VGL = 1.5V
VGH = 1.5V
Current Resonant and Overcurrent Protection (OCP)
Capacitive Mode Detection Voltage 1
VRC1
7 – 10
Capacitive Mode Detection Voltage 2
VRC2
7 – 10
SSC3S921 - DSJ Rev.1.92
SANKEN ELECTRIC CO., LTD.
Oct. 03, 2023
https://www.sanken-ele.co.jp/en/
© SANKEN ELECTRIC CO., LTD. 2015
5
SSC3S921
Parameter
Symbol
Conditions
Pins
Min.
Typ.
Max.
Unit
−0.6
−0.50
−0.4
V
1.42
1.50
1.58
V
−1.58
−1.50
−1.42
V
2.15
2.30
2.45
V
−2.45
−2.30
−2.15
V
RC Pin Threshold Voltage (Low)
VRC(L)
7 – 10
RC Pin Threshold Voltage
(High speed)
VRC(S)
7 – 10
CSS Pin Sink Current (Low)
ICSS(L)
5 – 10
1.1
1.8
2.5
mA
CSS Pin Sink Current (High speed)
ICSS(S)
5 – 10
13.0
20.5
28.0
mA
VCC Pin OVP Threshold Voltage
VCC(OVP)
2 – 10
30.0
32.0
34.0
V
REG Pin OVP Threshold Voltage
VCC(REG)
12 – 10
11.5
12.4
13.5
V
TJ(TSD)
—
140
—
—
°C
θJ-A
—
—
—
95
°C/W
Overvoltage Protection (OVP)
Thermal Shutdown (TSD)
Thermal Shutdown Temperature
Thermal Resistance
Junction to Ambient Thermal
Resistance
SSC3S921 - DSJ Rev.1.92
SANKEN ELECTRIC CO., LTD.
Oct. 03, 2023
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© SANKEN ELECTRIC CO., LTD. 2015
6
SSC3S921
3.
Block Diagram
ST
18
High Side Driver
STARTUP
14
VB
UVLO
VCC
GND
VSEN
SB
FB
CSS
2
16
START/STOP/
REG/BIAS/
OVP
LEVEL
SHIFT
15
10
VCC
GND
1
9
3
5
VGH
VS
INPUT
SENSE
12
REG
11
VGL
MAIN
STANDBY
CONTROL
RC DETECTOR
FB
CONTROL
DEAD
TIME
FREQ.
CONTROL
FREQ.
MAX
SOFT-START/
OC/FMINADJ
7
RC
RV DETECTOR
OC DETECTOR
6
PL DETECTOR/
OLP
8
PFC ON/OFF
4
CL
PL
ADJ
BD_SSC3S921_R3
4.
Pin Configuration Definitions
Number
1
Name
VSEN
ST 18
2
VCC
VGH 16
3
4
5
6
FB
ADJ
CSS
CL
7
RC
8
9
10
11
12
13
14
15
16
17
18
PL
SB
GND
VGL
REG
−
VB
VS
VGH
(NC)
ST
1
VSEN
2
VCC
3
FB
4
ADJ
VS 15
5
CSS
VB 14
6
CL
7
RC
REG 12
8
PL
VGL 11
9
SB
GND 10
Functions
The mains input voltage detection signal input
Supply voltage input for the IC, and Overvoltage
Protection (OVP) signal input
Feedback signal input for constant voltage control
PFC ON/OFF signal output
Soft-start capacitor connection
Load current detection capacitor connection
Resonant current detection signal input, and
Overcurrent Protection (OCP) signal input
Resonant current detection signal input for OLP
Standby mode change signal input
Ground
Low-side gate drive output
Supply voltage output for gate drive circuit
(Pin removed)
Supply voltage input for high-side driver
Floating ground for high-side driver
High-side gate drive output
—
Startup current input
SSC3S921 - DSJ Rev.1.92
SANKEN ELECTRIC CO., LTD.
Oct. 03, 2023
https://www.sanken-ele.co.jp/en/
© SANKEN ELECTRIC CO., LTD. 2015
7
SSC3S921
5.
Typical Application
PFC OUT
R2
C1
T1
R3
D53
C55
VOUT1(+)
R4
R51
U1
GND
C4
1
18
VCC
2
17
FB
3
16
ADJ
4
CSS
5
C5
CADJ
R5
C6
CL
6
RC
7
C7
C8
RADJ1
PFC IC
(SSC2016S)
VCC
ROCP
R6
R7
RADJ2
SSC3S921
VSEN
15
14
ST
Q(H)
VGH
C12 R10
VS
R11
VB
D4
13
12
PC1
C52
D51
R15 D5
REG
PL
8
11
VGL
SB
9
10
GND
R55
R56
C53
Q1
R8
PC1
R53
VOUT(-)
C51
R12
D3
R16 D6 Q(L)
CV
D52
VOUT2(+)
Ci
R58
C3
R13
D54
PC2
R14
C9
C10
R15
R1
R16
C11
R54
R57 C54
Standby
Q51
QC
R52
D1
C2
R59
R17
PC2
TC_SSC3S921_3_R4
Figure 5-1 Typical application
SSC3S921 - DSJ Rev.1.92
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Oct. 03, 2023
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© SANKEN ELECTRIC CO., LTD. 2015
8
SSC3S921
6.
External Dimensions
● SOP18
NOTES:
● Dimension is in millimeters
● Pb-free
7.
Marking Diagram
18
SSC3S921
Part Number
SKYMD
XXXX
1
Lot Number
Y is the last digit of the year (0 to 9)
M is the month (1 to 9, O, N or D)
D is a period of days (1 to 3):
1 : 1st to 10th
2 : 11th to 20th
3 : 21th to 31st
Control Number
SSC3S921 - DSJ Rev.1.92
SANKEN ELECTRIC CO., LTD.
Oct. 03, 2023
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© SANKEN ELECTRIC CO., LTD. 2015
9
SSC3S921
8.
Operational Description
All of the parameter values used in these descriptions
are typical values, unless they are specified as minimum
or maximum. Current polarities are defined as follows:
current going into the IC (sinking) is positive current
(+); and current coming out of the IC (sourcing) is
negative current (−). Q(H) and Q(L) indicate a high-side
power MOSFET and a low-side power MOSFET
respectively. Ci and CV indicate a current resonant
capacitor and a voltage resonant capacitor, respectively.
8.1
Resonant Circuit Operation
Figure 8-1 shows a basic RLC series resonant circuit.
The impedance of the circuit, Ż, is as the following
Equation.
Ż = R + j (ωL −
1
),
ωC
(1)
where ω is angular frequency; and ω = 2πf.
Thus,
Ż = R + j (2πfL −
1
).
2πfC
(2)
When the frequency, f, changes, the impedance of
resonant circuit will change as shown in Figure 8-2.
R
Figure 8-1.
L
C
f0 =
1
2π√LC
.
(4)
Figure 8-3 shows the circuit of a current resonant
power supply. The basic configuration of the current
resonant power supply is a half-bridge converter. The
switching devices, Q(H) and Q(L), are connected in series
with VIN. The series resonant circuit and the voltage
resonant capacitor, CV, are connected in parallel with
Q(L). The series resonant circuit is consisted of the
following components: the resonant inductor, LR; the
primary winding, P, of a transformer, T1; and the current
resonant capacitor, Ci. The coupling between the
primary and secondary windings of T1 is designed to be
poor so that the leakage inductance increases. This
leakage inductance is used for LR. This results in a down
sized of the series resonant circuit. The dotted mark with
T1 describes the winding polarity, the secondary
windings, S1 and S2, are connected so that the polarities
are set to the same position as shown in Figure 8-3. In
addition, the winding numbers of each other should be
equal. From Equation (1), the impedance of a current
resonant power supply is calculated by Equation (5).
From Equation (4), the resonant frequency, f0 , is
calculated by Equation (6).
1
},
ωCi
Ż = R + j {ω(LR + LP ) −
RLC Series Resonant Circuit
f0 =
Inductance area
1
2π√(LR + LP ) × Ci
(5)
,
(6)
where:
R is the equivalent resistance of load,
LR is the inductance of the resonant inductor,
LP is the inductance of the primary winding P, and
Ci is the capacitance of current resonant capacitor.
Impedance
Capacitance area
The frequency in which Ż becomes minimum value is
called a resonant frequency, f0. The higher frequency
area than f0 is an inductance area. The lower frequency
area than f0 is a capacitance area.
From Equation (3), f0 is as follows:
R
f0
Figure 8-2.
ID(H)
Frequency
Q(H)
VGH
Impedance of Resonant Circuit
1
√LC
LR
T1
IS1
VIN
When 2πfL = 1/2πfC, Ż of Equation (2) becomes the
minimum value, R (see Figure 8-2). In the case, ω is
calculated by Equation (3).
ω = 2πf =
Series resonant circuit
VDS(H)
ID(L)
Q(L)
Cv
P
VOUT
(+)
S1
LP
VGL
(3)
VDS(L)
VCi
ICi
Figure 8-3.
SSC3S921 - DSJ Rev.1.92
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© SANKEN ELECTRIC CO., LTD. 2015
S2
Ci
(−)
IS2
Current Resonant Power Supply Circuit
10
SSC3S921
In the current resonant power supply, Q(H) and Q(L) are
alternatively turned on and off. The on and off times of
them are equal. There is a dead time between the on
periods of Q(H) and Q(L). During the dead time, Q(H) and
Q(L) are in off status.
In the current resonant power supply, the frequency is
controlled. When the output voltage decreases, the IC
decreases the switching frequency so that the output
power is increased to keep a constant output voltage.
This must be controlled in the inductance area (fSW <
f0 ). Since the winding current is delayed from the
winding voltage in the inductance area, the turn-on
operates in a ZCS (Zero Current Switching); and the
turn-off operates in a ZVS (Zero Voltage Switching).
Thus, the switching losses of Q(H) and Q(L) are nearly
zero. In the capacitance area (fSW < f0 ), the current
resonant power supply operates as follows: When the
output voltage decreases, the switching frequency is
decreased; and then, the output power is more decreased.
Therefore, the output voltage cannot be kept constant.
Since the winding current goes ahead of the winding
voltage in the capacitance area, Q(H) and Q(L) operate in
the hard switching. This results in the increases of a
power loss. This operation in the capacitance area is
called the capacitive mode operation. The current
resonant power supply must be operated without the
capacitive mode operation (for more details, see Section
8.12).
Figure 8-4 describes the basic operation waveform of
current resonant power supply (see Figure 8-3 about the
symbol in Figure 8-4). For the description of current
resonant waveforms in normal operation, the operation
is separated into a period A to F. In the following
description:
ID(H) is the current of Q(H),
ID(L) is the current of Q(L),
VF(H) is the forwerd voltage of Q(H),
VF(L) is the forwerd voltage of Q(L),
IL is the current of LR,
VIN is an input voltage,
VCi is Ci voltage, and
VCV is CV voltage.
resonant current flows to the primary side only to
charge Ci (see Figure 8-6).
VGH
0
VGL
0
VDS(H)
VIN+VF(H)
0
ID(H)
0
VDS(L)
0
ID(L)
0
ICi
0
VCi
VIN/2
IS1
0
IS2
0
A
B
D
t
E
C
F
Figure 8-4. The Basic Operation Waveforms of
Current Resonant Power Supply
Q(H)
ID(H)
ON
LR
LP
VIN
S1
Q(L)
IS1
Cv
VCV
OFF
S2
Ci
VCi
The current resonant power supply operations in
period A to F are as follows:
1) Period A
When Q(H) is on, an energy is stored into the series
resonant circuit by ID(H) that flows through the
resonant circuit and the transformer (see Figure 8-5).
At the same time, the energy is transferred to the
secondary circuit. When the primary winding voltage
can not keep the on status of the secondary rectifier,
the energy transmittion to the secondary circuit is
stopped.
Figure 8-5.
Operation in period A
Q(H)
ID(H)
ON
LR
LP
VIN
S1
Q(L)
Cv
OFF
S2
Ci
2) Period B
After the secondary side current becomes zero, the
Figure 8-6.
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Operation in Period B
11
SSC3S921
3) Period C
C is the dead-time period. Q(H) and Q(L) are in off
status. When Q(H) turns off, CV is discharged by IL that
is supplied by the energy stored in the series resonant
circuit applies (see Figure 8-7). When VCV decreases
to VF(L), −ID(L) flows through the body diode of Q(L);
and VCV is clamped to VF(L). After that, Q(L) turns on.
Since VDS(L) is nearly zero at the point, Q(L) operates
in the ZVS and the ZCS; thus, the switching loss
achieves nearly zero.
4) Period D
Immidiately after Q(L) turns on, −ID(L), which was
flowing in Period C, continues to flow through Q(L)
for a while. Then ID(L) flows as shown in Figure 8-8;
and VCi is applied the primary winding voltage of the
transformer. At the same time, energy is transferred to
the secondary circuit. When the primary winding
voltage can not keep the on status of the secondary
rectifier, the energy transmittion to the secondary
circuit is stopped.
Q(H)
LR
OFF
LP
VIN
IL
Q(L)
Cv
VCV
OFF
-ID(L)
Ci
Figure 8-7.
Operation in Period C
Q(H)
LR
OFF
LP
VIN
ID(L)
Q(L)
S1
Cv
–ID(L)
ON
S2
5) Period E
After the secondary side current becomes zero, the
resonant current flows to the primary side only to
charge Ci (see Figure 8-9).
6) Period F
F is the dead-time period. Q(H) and Q(L) are in off
status.
When Q(L) turns off, CV is charged by −IL that is
supplied by the energy stored in the series resonant
circuit applies (see Figure 8-10). When VCV decreases
to VIN + VF(H), −ID(H) flows through body diode of
Q(H); and VCV is clamped to VIN + VF(H). After that,
Q(H) turns on. Since VDS(H) is nearly zero at the point,
Q(H) operates in the ZVS and the ZCS; thus, the
switching loss achieves nearly zero.
VCi
Figure 8-8.
Operation in Period D
Q(H)
LR
OFF
LP
VIN
ID(L)
Q(L)
S1
Cv
ON
S2
Ci
Figure 8-9.
7) After the period F
Immidiately after Q(H) turns on, −ID(H), which was
flowing in Period F, continues to flow through Q(H)
for a while. Then, ID(H) flows again; and the operation
returns to the period A. The above operation is
repeated to transfer energy to the secondary side from
the resonant circuit.
IS2
Ci
Operation in Period E
Q(H)
-ID(H)
LR
OFF
LP
VIN
-IL
Q(L)
VCV
OFF
Cv
Ci
Figure 8-10.
SSC3S921 - DSJ Rev.1.92
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Operation in Period F
12
SSC3S921
8.2
Startup Operation
DST1
VAC
Figure 8-11 shows the VCC pin peripheral circuit.
Figure 8-12 shows the startup operational waveforms.
The power supply starts as follows:
1) The mains input voltage is provided, and the VSEN
pin voltage increases to the on-threshold voltage,
VSEN(ON) = 1.300 V, or more.
2) The startup current, IST, which is a constant current
of 6.0 mA is provided from the IC to capacitor C2
connected to the VCC pin, C2 is charged.
3) CADJ is charged by IADJ = −10µA to increase the ADJ
pin voltage.
4) When the VCC pin voltage increases to the operation
start voltage, VCC(ON) = 17.0 V, the REG pin voltage
is output. At the same time, the ADJ pin outputs the
PFC ON signal, and the PFC control IC is activated.
The VCC pin voltage is decreased by the power
dissipation of the IC.
5) When the VCC pin voltage decreases to
VCC(BIAS) = 9.8 V, the C9 connected to FB pin starts
to be charged. When the FB pin voltage increases to
the oscillation start threshold voltage, VFB(ON) = 0.30
V, or more, the swiching operation starts.
After that, the startup circuit stops automatically, in
order to eliminate its own power consumption.
During the IC operation, the rectified voltage from the
auxiliary winding voltage, VD, in Figure 8-11 is a power
source to the VCC pin.
The winding turns of the winding D should be
adjusted so that the VCC pin voltage is applied to
equation (7) within the specification of the mains input
voltage range and output load range of the power supply.
The target voltage of the winding D is about 19 V.
L1
DST2
CX
U2
VCC SSC2016S
C1
R2
RST
R3
1
QC
RADJ2
12
REG
5
C4
R4
FB
3
R5
C9
Figure 8-11.
2
R1
GND
10
D1
VD
R8
C6
CADJ
18
U1
ADJ CSS
IADJ
DADJ
ST
VCC
4
RADJ1
VSEN
PC1
C2
VCC Pin Peripheral Circuit
VSEN Pin Voltage
VSEN(ON)
0
ADJ Pin Voltage
Charged by IADJ
PFC on signal output
0
VCC Pin Voltage
VCC(ON)
VCC(BIAS)
0
REG Pin Voltage
VREG
VCC(BIAS) < VCC < VCC(OVP)
0
⇒9.8 (V) < VCC < 32.0 (V)
(7)
The startup time, tSTART, is determined by the value of
C2 and C6 connected to the CSS pin. Since the startup
time for C6 is much smaller than that for C2, the startup
time is approximately given as below:
t START ≈ C2 ×
VCC(ON) − VCC(INT)
|ICC(ST) |
FB Pin Voltage
0
VFB(ON)
VGL Pin Voltage
0
Figure 8-12.
(8)
Startup Operation When PFC ON/OFF
Function is Enabled
where:
tSTART is the startup time in s,
VCC(INT) is the initial voltage of the VCC pin in V, and
IST is the startup current, 6.0 mA
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SSC3S921
8.3
Undervoltage Lockout (UVLO)
Figure 8-13 shows the relationship of VCC and ICC.
After the IC starts operation, when the VCC pin
voltage decreases to VCC(OFF) = 8.9 V, the IC stops
switching operation by the Undervoltage Lockout
(UVLO) Function and reverts to the state before startup
again.
ICC
Stop
Figure 8-13.
● The turns ratio of the auxiliary winding to the
secondary-side winding is increased.
● The value of C2 in Figure 8-11 is increased and/or the
value of R1 is reduced.
Start
VCC（OFF）
VCC(BIAS) = 9.8 V, the Bias Assist Function is activated.
While the Bias Assist Function is activated, any
decrease of the VCC pin voltage is counteracted by
providing the startup current, IST, from the startup
circuit.
It is necessary to check the startup process based on
actual operation in the application, and adjust the VCC
pin voltage, so that the startup failure does not occur.
If VCC pin voltage decreases to VCC(BIAS) and the Bias
Assist Function is activated, the power loss increases.
Thus, VCC pin voltage in normal operation should be
set more than VCC(BIAS) by the following adjustments.
VCC（ON） VCC pin
voltage
During all protection operation, the Bias Assist
Function is disabled.
8.5
VCC versus ICC
Soft Start Function
Figure 8-15
waveforms.
8.4
shows
the
Soft-start
operation
Bias Assist Function
Figure 8-14 shows the VCC pin voltage behavior
during the startup period.
VCC pin voltage
IC startup
VCC(ON)
VCC(BIAS)
VCC(OFF)
Startup success
Target
operating
voltage
Increasing by output
voltage rising
Bias Assist period
CSS pin
voltage
Frequency control
by feedback signal
OCP operation
peropd
Soft-start
period
C6 is charged by ICSS(C)
0
Time
Primary-side
winding current
OCP limit
0
Time
Startup failure
Time
Figure 8-14.
VCC pin voltage during startup period
When the conditions of Section 8.2 are fulfilled, the
IC starts operation. Thus, the circuit current, I CC,
increases, and the VCC pin voltage begins dropping. At
the same time, the auxiliary winding voltage, VD,
increases in proportion to the output voltage rise. Thus,
the VCC pin voltage is set by the balance between
dropping due to the increase of I CC and rising due to the
increase of the auxiliary winding voltage, VD.
When the VCC pin voltage decreases to
VCC(OFF) = 8.9 V, the IC stops switching operation and a
startup failure occurs.
In order to prevent this, when the VCC pin voltage
decreases to the startup current threshold biasing voltage,
Figure 8-15.
Soft-start operation
The IC has Soft Start Function to reduce stress of
peripheral component and prevent the capacitive mode
operation.
During the soft start operation, C6 connected to the
CSS pin is charged by the CSS Pin Charge Current,
ICSS(C) = −105 μA. The oscillation frequency is varied by
the CSS pin voltage. The switching frequency gradually
decreases from f(MAX)SS* = 500 kHz at most, according
to the CSS pin voltage rise. At same time, output power
increases. When the output voltage increases, the IC is
* The maximum frequency during normal operation is
f(MAX) = 300 kHz.
SSC3S921 - DSJ Rev.1.92
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SSC3S921
operated with an oscillation frequency controlled by
feedback.
When the IC becomes any of the following conditions,
C6 is discharged by the CSS Pin Reset Current,
ICSS(R) = 1.8 mA.
internal high-side drive circuit starts operation. When
VB-S decreases to VBUV(OFF) = 6.4 V or less, its drive
circuit stops operation. In case the both ends of C12 and
D4 are short, the IC is protected by VBUV(OFF). D4 for
protection against negative voltage of the VS pin
● The VCC pin voltage decreases to the operation stop
voltage, VCC(OFF) = 8.9 V, or less.
● The VSEN pin voltage decreases to the off-threshold
voltage, VSEN(OFF) = 1.100 V, or less.
● Any of protection operations in protection mode
(OVP, OLP or TSD) is activated.
8.6
f(MIN)ADJ (kHz)
SSC3S921_R2
60
50
40
20
30
Figure 8-16.
8.7
40
50
60
RCSS (kΩ)
70
80
R5 (RCSS) versus f(MIN)ADJ
High-side Driver
Figure 8-17 shows a bootstrap circuit. The bootstrap
circuit is for driving to Q(H) and is made by D3, R12 and
C12 between the REG pin and the VS pin.
When Q(H) is OFF state and Q(L) is ON state, the VS
pin voltage becomes about ground level and C12 is
charged from the REG pin.
When the voltage of between the VB pin and the VS
pin, VB-S, increases to VBUV(ON) = 6.8 V or more, an
Q(H)
T1
15
C12
D4
VB 14
Cv
R12
REG
The minimum switching frequency is adjustable by
the value of R5 (RCSS) connected to the CSS pin. The
relationship of R5 (RCSS) and the externally adjusted
minimum frequency, f(MIN)ADJ, is shown in Figure 8-16.
The f(MIN)ADJ should be adjusted to more than the
resonant frequency, fO, under the condition of the
minimum mains input voltage and the maximum output
power.
The maximum switching frequency, fMAX, is
determined by the inductance and the capacitance of the
resonant circuit. The fMAX should be adjusted to less than
the maximum frequency, f(MAX) = 300 kHz.
70
VS
16
U1
Minimum and Maximum Switching
Frequency Setting
80
VGH
VGL
GND
12
D3
Q(L)
11
10
Ci
C11
Bootstrap circuit
Figure 8-17.
Bootstrap circuit
● D3
D3 should be an ultrafast recovery diode of short
recovery time and low reverse current. When the
maximum mains input voltage of the apprication is
265VAC, it is recommended to use ultrafast recovery
diode of VRM = 600 V
● C11, C12, and R12
The values of C11, C12, and R12 are determined by
total gate charge, Qg, of external MOSFET and
voltage dip amount between the VB pin and the VS
pin in the burst mode of the standby mode change.
C11, C12, and R12 should be adjusted so that the
voltage between the VB pin and the VS is more than
VBUV(ON) = 6.8 V by measuring the voltage with a
high-voltage differential probe.
The reference value of C11 is 0.47μF to 1 μF.
The time constant of C12 and R12 should be less than
500 ns. The values of C12 and R22 are 0.047μF to 0.1
μF, and 2.2 Ω to 10 Ω.
C11 and C12 should be a film type or ceramic
capacitor of low ESR and low leakage current.
● D4
D4 should be a Schottky diode of low forward voltage,
VF, so that the voltage between the VB pin and the VS
pin must not decrease to the absolute maximum
ratings of −0.3 V or less.
8.8
Constant Voltage Control Operation
Figure 8-18 shows the FB pin peripheral circuit. The
FB pin is sunk the feedback current by the photo-coupler,
SSC3S921 - DSJ Rev.1.92
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SSC3S921
PC1, connected to FB pin. As a result, since the
oscillation frequency is controlled by the FB pin, the
output voltage is controlled to constant voltage (in
inductance area).
The feedback current increases under slight load
condition, and thus the FB pin voltage decreases. While
the FB pin voltage decreases to the oscillation stop
threshold voltage, VFB(OFF) = 0.20 V, or less, the IC stops
switching operation. This operation reduces switching
loss, and prevents the increasing of the secondary output
voltage. In Figure 8-18, R8 and C9 are for phase
compensation adjustment, and C5 is for high frequency
noise rejection.The secondary-side circuit should be
designed so that the collector current of PC1 is more
than 195 μA which is the absolute value of the
maximum source current, IFB(MAX). Especially the current
transfer ratio, CTR, of the photo coupler should be taken
aging degradation into consideration.
U1
FB
3
GND
10
R8
C5
Section 8.9.2). The operation of the IC changes to the
standby operation by the external signal (see Section
8.9.1).
8.9.1 Standby Mode Changed by External
Signal
Figure 8-20 shows the standby mode change circuit
with external signal. Figure 8-21 shows the standby
change operation waveforms. When the standby
terminal of Figure 8-20 is provided with the L signal, Q1
turns off, C10 connected to the SB pin is discharged by
the sink current, ISB(SNK) = 10 µA, and the SB pin voltage
decreases. When the SB pin voltage decrease to the SB
Pin Oscillation Stop Threshold Voltage, VSB(OFF) = 0.5 V,
the operation of the IC is changed to the standby mode.
When SB pin voltage is VSB(OFF) = 0.5 V or less and FB
pin voltage is Oscillation Stop Threshold Voltage
VFB(OFF) = 0.20 V or less, the IC stops switching
operation. When the standby terminal is provided with
the H signal and the SB pin voltage increases to Standby
Threshold Voltage VSB(STB) = 5.0 V or more, the IC
returns to normal operation.
REG
C9
Figure 8-18.
C11
U1
PC1
FB pin peripheral circuit
FB
SB
3
9
R8
R58
R16
Q1
R15
PC2
R17
C5
8.9
12
C10
Standby Function
Standby
Q51
R59
C9
The IC has the Standby Function in order to increase
circuit efficiency in light load. When the Standby
Function is activated, the IC operates in the burst
oscillation mode as shown in Figure 8-19.
Primary-side main
winding current
Switching period
Non-switching period
PC1
Figure 8-20.
Standby
0
Time
Soft-off
GND
Standby mode change circuit
H
SB pin voltage
Soft-on
PC2
H
L
Standby operation
Discharging
by ISB(SNK)
VSB(OFF)
VSB(STB)
0
Figure 8-19.
Standby waveform
FB pin voltage
VFB(OFF)
0
The burst oscillation has periodic non-switching
intervals. Thus, the burst mode reduces switching losses.
Generally, to improve efficiency under light load
conditions, the frequency of the burst mode becomes
just a few kilohertz. In addition, the IC has the Soft-on
and the Soft-off Function in order to suppress rapid and
sharp fluctuation of the drain current during the burst
mode. thus, the audible noises can be reduced (see
Primary-side
main winding
current
0
Switching stop
Figure 8-21.
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Time
Standby change operation waveforms
16
SSC3S921
8.9.2 Burst Oscillation Operation
In standby operation, the IC operates burst oscillation
where the peak drain current is suppressed by Soft-On
/Soft-off Function in order to reduce audible noise from
transformer. During burst oscillation operation, the
switching oscillation is controlled by SB pin voltage.
Figure 8-22 shows the burst oscillation operation
waveforms.
Output current
0
Output voltage
0
FB pin voltage
VFB(ON)
VFB(OFF)
0
Charged
by ISB(SRC)
SB pin voltage
Discharged
by ISB(SNK)
VSB(ON)
VSB(OFF)
0
Primary-side
main winding
current
increase of power loss (see Section 8.4).
Thus, it is necessary to adjust the value of C10 while
checking the input power, the output ripple voltage, and
the VCC pin voltage. The reference value of C10 is
about 0.001 μF to 0.1 μF.
8.9.3 PFC ON/OFF Function
Figure 8-23 shows the operational waveform of PFC
ON/OFF Output Function. When output power
decreases and SB pin voltage reaches to VSB(OFF) = 0.5 V,
the PFC ON/OFF Function activates and ADJ pin
voltage increases to ADJ Pin Voltage in Standby
Operation, VADJ(H) = VREG = 10.0 V. When output power
increases and SB pin voltage reaches to VSB(STB) = 5.0 V,
the ADJ pin voltage decreases to ADJ Pin Voltage in
Normal Operation, VADJ(L) = 1 V. Using the signal, the
power supply of PFC control IC can be turned on/off
when the IC becomes standby operation. When the
operation starting voltage of PFC IC, VCC(ON)_PFC, is less
than VREG, the PFC circuit on/off system can be realized
by low component count as shown in Figure 8-24.
SSC2016S that is Sanken PFC control IC is
recommended.
Standby operation
SB pin voltage
0
Soft-on
Soft-off
Time
VSB(STB)
VSB(OFF)
0
Figure 8-22.
Burst oscillation operation waveforms
When the SB pin voltage decreases to VSB(OFF) = 0.5 V
or less and the FB pin voltage decreases to
VFB(OFF) = 0.20 V or less, the IC stops switching
operation and the output voltage decreases. Since the
output voltage decreases, the FB pin voltage increases.
When the FB pin voltage increases to the oscillation
start threshold voltage, VFB(ON) = 0.30 V, C10 is charged
by ISB(SRC) = −10 µA, and the SB pin voltage gradually
increases. When the SB pin voltage increases to the
oscillation start threshold voltage, VSB(ON) = 0.6 V, the
IC resumes switching operation, controlling the
frequency control by the SB pin voltage. Thus, the
output voltage increases (Soft-on). After that, when FB
pin voltage decrease to oscillation stop threshold voltage,
VFB(OFF) = 0.20 V, C10 is discharged by ISB(SNK) = 10 µA
and SB pin voltage decreases. When the SB pin voltage
decreases to VSB(OFF) again, the IC stops switching
operation. Thus, the output voltage decreases (Soft-off).
The SB pin discharge time in the Soft-on and Soft-off
Function depends on C10. When the value of C10
increases, the Soft-On/Soft-off Function makes the peak
drain current suppressed, and makes the burst period
longer. Thus, the output ripple voltage may increase
and/or the VCC pin voltage may decrease. If the VCC
pin voltage decreases to VCC(BIAS) = 9.8 V, the Bias
Assist Function is always activated, and it results in the
ADJ pin voltage
VREG
0
Figure 8-23.
PFC IC
(SSC2016S)
VCC
PFC ON/OFF Function
U1
QC
12
REG
RADJ2
RADJ1
GND
4 ADJ
10 GND
Figure 8-24. Typical circuit that PFC IC is stopped by
the ADJ pin signal (VCC(ON)_PFC < VREG)
8.10 Automatic Dead Time Adjustment
Function
The dead time is the period when both the high-side
and the low-side power MOSFETs are off.
As shown in Figure 8-25, if the dead time is shorter
than the voltage resonant period, the power MOSFET is
SSC3S921 - DSJ Rev.1.92
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SSC3S921
turned on and off during the voltage resonant operation.
In this case, the power MOSFET turned on and off in
hard switching operation, and the switching loss
increases. The Automatic Dead Time Adjustment
Function is the function that the ZVS (Zero Voltage
Switching) operation of Q(H) and Q(L) is controlled
automatically by the voltage resonant period detection of
IC. The voltage resonant period is varied by the power
supply specifications (input voltage and output power,
etc.). However, the power supply with this function is
unnecessary to adjust the dead time for each power
supply specification.
VGL
VGH
Dead time
Q(L) D-S voltage,
VDS(L)
Loss increase by hard
switching operation
Q(H) drain current,
ID(H)
Flows through body
diode about 600 ns
Figure 8-27.
ZCS check point
8.11 Brown-In and Brown-Out Function
Figure 8-28 shows the VSEN pin peripheral circuit.
This function detects the mains input voltage, and stops
switching operation during low mains input voltage, to
prevent exceeding input current and overheating.
R2 to R4 set the detection voltage of this function.
When the VCC pin voltage is higher than VCC(ON), this
function operates depending on the VSEN pin voltage as
follows:
● When the VSEN pin voltage is more than VSEN
(ON) = 1.300 V, the IC starts.
● When the VSEN pin voltage is less than VSEN
(OFF) = 1.100 V, the IC stops switching operation.
Voltage resonant period
Figure 8-25.
ZVS failure operation waveform
VAC
As shown in Figure 8-26, the VS pin detects the dv/dt
period of rising and falling of the voltage between drain
and source of the low-side power MOSFET, VDS(L), and
the IC sets its dead time to that period. This function
controls so that the high-side and the low-side power
MOSFETs are automatically switched to Zero Voltage
Switching (ZVS) operation. This function operates in the
period from td(MIN) = 0.24 µs to td(MAX) = 1.65 µs.
In minimum output power at maximum input voltage
and maximum output power at minimum input voltage,
the ZCS (Zero Current Switching) operation of IC (the
drain current flows through the body diode is about 600
ns as shown in Figure 8-27), should be checked based on
actual operation in the application.
U1
VGH
RV
DETECTOR
VS 15
VGL
Main
T1
16
11
VDS(L)
C1
U1
R3
1
10
Low-side, VDS(L) On
dv Off
dt
dt
Figure 8-28.
VSEN pin peripheral circuit
Given, the DC input voltage when the IC starts as
VIN(ON), the DC input voltage when the switching
operation of the IC stops as VIN(OFF). VIN(ON) is calculated
by Equation (9). VIN(OFF) is calculated by Equation (10).
Thus, the relationship between VIN(ON) and VIN(OFF) is
Equation (11).
VIN(ON) ≈ VSEN(ON) ×
R2 + R3 + R4
R4
VIN(OFF) ≈ VSEN(OFF) ×
On
Dead time period
GND
C4
Cv
Ci
VSEN
R4
GND
10
Figure 8-26.
R2
VDC
VIN(OFF) ≈
R2 + R3 + R4
R4
VSEN(OFF)
× VIN(ON)
VSEN(ON)
(9)
(10)
(11)
VS pin and dead time period
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SSC3S921
R2 + R3 ≈
VIN(ON) −VSEN(ON)
× R4
VSEN(ON)
(12)
Because R2 and R3 are applied high DC voltage and
are high resistance, the following should be considered:
● Select a resistor designed against electromigration
according to the requirement of the application, or
● Use a combination of resistors in series for that to
reduce each applied voltage
The reference value of R2 is about 10 MΩ.
C4 shown in Figure 8-28 is for reducing ripple
voltage of detection voltage and making delay time. The
value is 0.1 µF or more, and the reference value is about
0.47 µF.
The value of R2, R3 and R4 and C4 should be
selected based on actual operation in the application.
8.12 Capacitive Mode Detection Function
The resonant power supply is operated in the
inductance area shown in Figure 8-29. In the capacitance
area, the power supply becomes the capacitive mode
operation (see Section 8.1). In order to prevent the
operation, the minimum oscillation frequency is needed
to be set higher than f0 on each power supply
specification. However, the IC has the capacitive mode
operation Detection Function kept the frequency higher
than f0. Thus, the minimum oscillation frequency setting
is unnecessary and the power supply design is easier. In
addition, the ability of transformer is improved because
the operating frequency can operate close to the resonant
frequency, f0.
The resonant current is detected by the RC pin, and
the IC prevents the capacitive mode operation. When the
capacitive mode is detected, the C7 connected to CL pin
is charged by ICL(SRC) = −17 μA. When the CL pin
voltage increases to VCL(OLP), the OLP is activated and
the switching operation stops. During the OLP operation,
the intermittent operation by UVLO is repeated (see
Section 8.18). The detection voltage is changed to
VRC1 = ±0.10 V or VRC2 = ±0.50 V depending on the load
as shown in Figure 8-31 and Figure 8-32.
The Capacitive Mode Operation Detection Function
operations as follows:
● Period in which the Q(H) is ON
Figure 8-30 shows the RC pin waveform in the
inductance area, and Figure 8-31 and Figure 8-32
shows the RC pin waveform in the capacitance area.
In the inductance area, the RC pin voltage doesn’t
cross the plus side detection voltage in the downward
direction during the on period of Q(H) as shown in
Figure 8-30. On the contrary, in the capacitance area,
the RC pin voltage crosses the plus side detection
voltage in the downward direction. At this point, the
capacitive mode operation is detected. Thus, Q(H) is
turned off, and Q(L) is turned on, as shown in Figure
8-31 and Figure 8-32.
● Period in which the Q(L) is on
Contrary to the above of Q(H), in the capacitance area,
the RC pin voltage crosses the minus side detection
voltage in the upward directiont during the on period
of Q(L) At this point, the capacitive mode operation is
detected. Thus, Q(L) is turned off and Q(H) is turned on.
As above, since the capacitive mode operation is
detected by pulse-by-pulse and the operating frequency
is synchronized with the frequency of the capacitive
mode operation, and the capacitive mode operation is
prevented. In addition to the adjusting method of ROCP,
C3, and R6 in Section 1.1, ROCP, C3, and R6 should be
adjusted so that the absolute value of the RC pin voltage
increases to more than |VRC2| = 0.50 V under the
condition caused the capacitive mode operation easily,
such as startup, turning off the mains input voltage, or
output shorted. The RC pin voltage must be within the
absolute maximum ratings of −6 to 6 V
Capacitance area
Inductance area
Impedance
The detection resistance is calculated from Equation
(9) as follows:
Operating area
f0
Resonant fresuency
Hard switching
Sift switching
Uncontrollable operation
Figure 8-29.
Operating area of resonant power supply
VDS(H)
OFF
ON
RC pin
voltage
+VRC
0
Figure 8-30.
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RC pin voltage in inductance area
19
SSC3S921
VDS(H)
OFF
0
Capacitive mode
operation detection
RC pin
voltage +VRC2
+VRC1
0
Figure 8-31.
High side capacitive mode detection in
light load
VDS(H)
OFF
ON
0
Capacitive mode
operation detection
RC pin
voltage +VRC2
+VRC1
0
Figure 8-32.
8.14 Reset Detection Function
ON
High side capacitive mode detection in
heavy load
8.13 Input Electrolytic Capacitor
Discharge Function
Figure 8-33 shows an application that residual voltage
of the input capacitor, C1, is reduced after turning off
the mains input voltage. R2 is connected to the AC input
lines through D7 and D8. Just after turning off the mains
input voltage, the VSEN pin voltage decreases to
VSEN(OFF) = 1.100 V according to a short time of the time
constant with R2 to R4 and C4, and C1 is discharged by
the equivalent to IST = 6.0 mA.
D7
Main input
off
D8
6 mA
(IST)
C1
R2
In the startup period, the feedback control for the
output voltage is inactive. If a magnetizing current may
not be reset in the on-period because of unbalanced
operation, a negative current may flow just before a
power MOSFET turns off. This causes a hard switching
operation, increases the stresses of the power MOSFET.
Where the magnetizing current means the circulating
current applied for resonant operation, and flows only
into the primary-side circuit. To prevent the hard
switching, the IC has the reset detection function.
Figure 8-35 shows the high-side operation and the
reference drain current waveforms in a normal resonant
operation and a reset failure operation. To prevent the
hard switching operation, the reset detection function
operates such as an on period is extended until the
absolute value of a RC pin voltage, |VRC1|, increases to
0.10 V or more. When the on period reaches the
maximum reset time, tRST(MAX) = 5 μs, the on-period
expires at that moment, i.e., the power MOSFET turns
off (see Figure 8-34).
VGH Pin
Voltage Low
High
VGL Pin High
Voltage
Low
Turning-on
in negative drain current
ID(H)
Reset failure waveform
VRC= +0.1V
0
Expanded
on-period
Normal on-period
tRST(MAX)
Figure 8-34.
Reset Detection Operation Example
at High-side On Period
18
ST
R3
C4
Figure 8-33.
U1
VSEN
1
GND
10
R4
Input capacitor discharge
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SSC3S921
○ Normal resonant operation
B
ID(H)
C
● Reset failure operation
ID(H)
Magnetizing
current
Point D
VDS(H)=0V
A
Point A
VDS(H)=0V
Q(H)
0
E
D
Q(H)
Lr
Off
Q(L)
Lr
Off
Lp
Q(L)
ID(H)
Off
Cv
Ci
ID(H)
Ci
Point E
VDS(H)=0V
Q(H)
Lp
Cv
Off
Point B
VDS(H)=0V
Q(H)
Lr
On
Q(L)
Q(L)
Cv
Ci
Q(H)
Lr
Off
ID(H)
Point F
Q(H)
Lp
Q(L)
Lp
Cv
Off
Ci
Point C
Lr
On
Lp
ID(H)
Off
Recovery current
of body diode
ID(H)
Off
Lr
Lp
Q(L)
Off
Cv
Ci
Turning on at VDS(L)= 0V results in soft-switching
Figure 8-35.
F
On
Cv
Ci
Turning on at VDS(L) >> 0V results in hard-switching
Reference High-side Operation and Drain Current Waveforms in Normal Resonant Operation
and in Reset Failure Operation
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SSC3S921
8.15 Overvoltage Protection (OVP)
When the voltage between the VCC pin and the GND
pin is applied to the OVP threshold voltage,
VCC(OVP) = 32.0 V, or more, the Overvoltage Protection
(OVP) is activated, and the IC stops switching operation
in protection mode. After stopping, the VCC pin voltage
decreases to VCC(OFF) = 8.9 V, the Undervoltage Lockout
(UVLO) Function is activated, and the IC reverts to the
state before startup again.
After that, the startup circuit is activated, the VCC pin
voltage increases to VCC(ON) = 17.0 V, and the IC restarts.
During the protection mode, restart and stop are repeated.
When the fault condition is removed, the IC returns to
normal operation automatically. When the auxiliary
winding supplies the VCC pin voltage, the OVP is able
to detect an excessive output voltage, such as when the
detection circuit for output control is open in the
secondary-side circuit because the VCC pin voltage is
proportional to the output voltage.
The output voltage of the secondary-side circuit at
OVP operation, VOUT(OVP), is approximately given as
below:
VOUT(OVP)
VOUT(NORMAL)
=
× 32(V)
VCC(NORMAL)
and C6 should be adjusted based on actual operation in
the application. The following is a reference adjusting
method of ROCP, C3, R6, and C8:
● C3 and ROCP
C3 is 100pF to 330pF (around 1 % of Ci value).
ROCP is around 100 Ω.
Given the current of the high side power MOSFET at
ON state as ID(H). ROCP is calculated Equation (14).
The detection voltage of ROCP is used the detection of
the capacitive mode operation (see Section 8.12).
Therefore, setting of ROCP and C3 should be taken
account of both OCP and the capacitive mode
operation.
R OCP ≈
|VRC(L) |
C3 + Ci
×(
)
ID(H)
C3
(14)
● R6 and C8 are for high frequency noise reduction.
R6 is 100 Ω to 470 Ω. C6 is 100 pF to 1000 pF.
Q(H)
VGH
(13)
VS
U1
where,
VOUT(NORMAL) : Output voltage in normal operation
VCC(NORMAL): VCC pin voltage in normal operation
8.16 REG Overvoltage Protection
(REG_OVP)
The IC has REG Overvoltage Protection (REG_OVP)
for the overvoltage of the REG pin.
When the REG pin voltage increases to REG Pin
OVP Threshold Voltage, VREG(OVP) = 12.4 V, the
REG_OVP is activated and the IC stops switching
operation at latched state. Releasing the latched state is
done by dropping the VCC pin voltage below REG Pin
Overvoltage Protection Release Threshold Voltage,
VCC(L.OFF) = 5.0 V.
8.17 Overcurrent Protection (OCP)
The Overcurrent Protection (OCP) detects the drain
current, ID, on pulse-by-pulse basis, and limits output
power. In Figure 8-36, this circuit enables the value of
C3 for shunt capacitor to be smaller than the value of Ci
for current resonant capacitor, and the detection current
through C3 is small. Thus, the loss of the detection
resistor, ROCP, is reduced, and ROCP is a small-sized one
available. There is no convenient method to calculate the
accurate resonant current value according to the mains
input and output conditions, and others. Thus, ROCP, C3,
T1
15
Q(L)
VGL
CSS RC
5 7
16
11
10
GND
PL
8 R7
Cv
I(H)
Ci
C3
R6
R5
C6 C8 ROCP
Figure 8-36.
RC pin peripheral circuit
The OCP operation has two-step threshold voltage as
follows:
Step I, RC pin threshold voltage (Low), VRC(L):
This step is active first. When the absolute value of
the RC pin voltage increases to more than |VOC(L) | = 1.50
V, C6 connected to the CSS pin is discharged by
ICSS(L) = 1.8 mA. Thus, the switching frequency increases,
and the output power is limited. During discharging C6,
when the absolute value of the RC pin voltage decreases
to |VRC(L)| or less, the discharge stops.
Step II, RC pin threshold voltage (High-speed),
VRC(S):
This step is active second. When the absolute value of
the RC pin voltage increases to more than |VRC(S) | = 2.30
V, the high-speed OCP is activated, and power
MOSFETs reverse on and off. At the same time, C6 is
discharged by ICSS(S) = 20.5 mA. Thus, the switching
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SSC3S921
frequency quickly increases, and the output power is
quickly limited. This step operates as protections for
exceeding overcurrent, such as the output shorted.
When the absolute value of the RC pin voltage
decreases to |VRC(S)| or less, the operation is changed to
the above Step I.
8.18 Overload Protection (OLP)
Figure 8-37 shows the Overload Protection (OLP)
waveforms.
When the absolute value of RC pin voltage increases
to |VRC(L)| = 1.50 V by increasing of output power, the
Overcurrent Protection (OCP) is activated. After that,
the C7 connected to CL pin is charged by I CL(SRC) = −17
μA. When the OCP state continues and CL pin voltage
increases to VCL(OLP), the OLP is activated.
When CL pin voltage becomes the threshold voltage
of OLP, VCL(OLP) = 4.2 V, the OLP is activated and the
switching operation stops. During the OLP operation,
the intermittent operation by UVLO is repeated (see
Section 8.15). When the fault condition is removed, the
IC returns to normal operation automatically.
RC pin voltage
VRC(L)
voltage is proportional to the output current.
On actual operation of the application, C7 connected
to the CL pin should be adjusted so that ripple voltage
of the CL pin reduces. R7 connected to the PL pin
should be adjusted so that the OLP at the minimum
mains input voltage is activated before the OCP
limited by the low threshold voltage of OCP, VRC(L).
The PL pin voltage and the CL pin voltage must be
within the absolute maximum ratings of −0.3 to 6 V,
by adjusting R7, in the OCP operation point at the
minimum mains input voltage.
When the proportional voltage to the output current is
unused, the PL pin should be pulled down by the
resistance of about 47 kΩ connected between PL pin
and GND pin.
Mains Input
Load current
Magnetizing current
Output current
T1
Q(H)
C1
U1
VGH
16
R2
VS
15
R3
Q(L)
VGL
11
Cv
1 VSEN
GND 10
CL RC PL
6 7
8
R7
Ci
C3
R6
R4
C4 C7 C8 ROCP
0
VRC(L)
Figure 8-38.
CL pin voltage
VCL(OLP)
the peripheral circuit of PL pin and CL
pin
Charged by ICL(SRC)
0
VGH pin
voltage
VCC pin voltage
VCC(ON)
VCC(P.OFF)
ROCP voltage
0V
Load current
Magnetizing
current
CL pin source
current 0A
0
VGH/VGL
Proportional
voltage to
output current
CL pin voltage
0V
0
Figure 8-37.
OLP waveform
● PL Pin and CL Pin Setup:
The primary-side winding current as shown in Figure
8-38 includes the magnetizing current not transferred
to the secondary-side circuit, and the load current
proportional to the output current.
The current separated from the primary-side winding
current by C3 flows to the PL pin. As shown in Figure
8-39, the primary-side winding current flows to the
C7 connected to CL pin during the high side power
MOSFET turning on. The magnetizing current
becomes zero by charging and discharging. Only the
load current is charged to C7. As a result, the CL pin
Figure 8-39.
The waveforms of CL pin
8.19 Thermal Shutdown (TSD)
When the junction temperature of the IC reach to the
Thermal Shutdown Temperature TJ(TSD) = 140 °C (min.),
Thermal Shutdown (TSD) is activated and the IC stops
switching operation. When the VCC pin voltage is
decreased to VCC(P.OFF) = 8.9 V or less and the junction
temperature of the IC is decreased to less than TJ(TSD),
the IC restarts.
During the protection mode, restart and stop are
repeated. When the fault condition is removed, the IC
returns to normal operation automatically.
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SSC3S921
9.
9.1
Design Notes
waveforms should be checked that the dead time is
ensured as shown in Figure 9-2.
External Components
DS
Drain
Take care to use the proper rating and proper type of
components.
Gate
RA
9.1.1
RGS
Input and Output Electrolytic
Capacitors
Apply proper derating to a ripple current, a voltage,
and a temperature rise. It is required to use the high
ripple current and low impedance type electrolytic
capacitor that is designed for switch mode power
supplies.
Figure 9-1.
Source
Power MOSFET Peripheral Circuit
High-side
Gate
Vth(min.)
9.1.2
Resonant Transformer
Low-side
Gate
The resonant power supply uses the leakage
inductance of a transformer. Therefore, to reduce the
effect of the eddy current and the skin effect, the wire of
transformer should be used a bundle of fine litz wires.
9.1.3
9.1.4
Current Resonant Capacitor, Ci
Since a large resonant current flows through Ci, Ci
should be used a low loss and a high current capability
capacitor such as a polypropylene film capacitor. In
addition, Ci must be taken into account its frequency
characteristic because a high frequency current flows.
9.1.5
Dead time
Vth(min.)
Figure 9-2.
Current Detection Resistor, ROCP
To reduce the effect of the high frequency switching
current flowing through ROCP, choose the resister of a
low internal inductance type. In addition, its allowable
dissipation should be chosen suitable.
Dead time
9.2
Dead Time Confirmation
PCB Trace Layout and Component
Placement
The PCB circuit design and the component layout
significantly affect a power supply operation, EMI
noises, and power dissipation. Thus, to reduce the
impedance of the high frequency traces on a PCB (see
Figure 9-3), they should be designed as wide trace and
small loop as possible. In addition, ground traces should
be as wide and short as possible so that radiated EMI
levels can be reduced.
Gate Pin Peripheral Circuit
The VGH and VGL pins are gate drive outputs for
external power MOSFETs. These peak source and sink
currents are –540 mA and 1.50 A, respectively.
To make a turn-off speed faster, connect the diode, DS,
as shown in Figure 9-1. When RA and DS is adjusted, the
following contents should be taken into account: the
power losses of power MOSFETs, gate waveforms (for
a ringing reduction caused by a pattern layout, etc.), and
EMI noises. To prevent the malfunctions caused by
steep dv/dt at turn-off of power MOSFETs, connect RGS
of 10 kΩ to 100 kΩ between the Gate and Source pins of
the power MOSFET with a minimal length of PCB
traces. When these gate resistances are adjusted, the gate
Figure 9-3.
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High frequency current loops (hatched
areas)
24
SSC3S921
Figure 9-4 shows the circuit design example. The
PCB trace design should be also taken into account as
follows:
from each other, a film capacitor Cf (about 0.1 μF to
1.0 μF) should be connected between the VCC and
GND pins with a minimal length of PCB traces.
1) Main Circuit Trace
The main traces that switching current flows should
be designed as wide trace and small loop as possible.
4) Trace of Peripheral Components for the IC Control
These components should be placed close to the IC,
and be connected to the corresponding pin of the IC
with as short trace as possible.
2) Control Ground Trace
If the large current flows through a control ground, it
may cause varying electric potential of the control
ground; and this may result in the malfunctions of the
IC. Therefore, connect the control ground as close and
short as possible to the GND pin at a single-point
ground (or star ground) that is separated from the
power ground.
5) Trace of Bootstrap Circuit Components
These components should be connected to the IC pin
with as short trace as possible. In addition, the loop
for these should be as small as possible.
6) Secondary Side Rectifier Smoothing Circuit Trace
The traces of the rectifier smoothing loops carry the
switching current. Thus it should be designed as wide
trace and small loop as possible.
3) VCC Trace
The trace for supplying power to the IC should be as
small loop as possible. If C3 and the IC are distant
(1)Main trace should
be wide and short
C1
R4
R3
R2
VSEN
VCC
R8
FB
ADJ
RADJ1 CADJ
R5
RADJ2
C6
QC
CSS
CL
C7
C8
RC
ROCP
R6
(4)Peripheral
components for IC
control should
place near IC
1
18
2
17
(6)Main trace of
secondary side should
be wide and short
ST
C4
R7
PL
SB
T1
3
4
5
SSC3S921
Cf
C5
C9
PC1
PFC
IC
VCC
CY
6
16
15
14
7
8
9
R15
D5
VGH
R10
D53
C52
Q(H)
R11
VS
VB
C12
D4
CV
R12
13
U1
VAC
BR1
12
11
10
D3
D54
REG
D6
R16
VGL
GND
Q(L)
Ci
R13
C11
(5)Boot strap trace should
be small loop
C3
R14
D1
C10
A
R1
C2
(2)GND trace for IC
should be connected
at a single point
(3)Loop of VCC and C2 should be short
Figure 9-4.
Peripheral circuit trace example around the IC
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SSC3S921
10. Pattern Layout Example
The following show the PCB pattern layout example and the schematic of circuit using SSC3S921.
(5)Boot strap trace should be
small loop
(1)Main trace should be
wide and short
(6)Main trace of secondary side
should be wide and short
S3
Lp
S4
S1
S2
D
(2)GND trace for IC should be
connected at a single point
(4)Peripheral components for IC
control should placed near IC
Figure 10-1.
(3)Loop of VCC and C2
should be short
PCB pattern layout example
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26
SSC3S921
Main1
CN1
FP101
LX101
PSA50117_Rev.2.0
LX102
CP110
DP101
RX101
CY101
CX102
BD101
VR101
LP101
RX102
1,2,3
(1,2)
RX103
PFC OUT
6,7,8,9
(5,6,7,8)
DBH282312
(DBH332514)
CY102
CX101
DP102
RP102
CX103
11
(12)
TH101
RP106
12(13,14)
RP115
Main2
CP102 CP103
DP103
RP107
QP101
QP103
CP115
CP101
RP103
RP108
RP114
QP104
RP109
RP104
RP113
CP111
RP111
ZP101
SSC2016S
RP101
RP112
RP105
5 ZCD
CS 4
6 GND
COMP 3
7 OUT
CT 2
8 VCC
FB 1
PFC Vcc
QP102
STBY
ON/OFF
RP116
CP104
CP106
CP105
CP112 CP113
CP109
RP110
CP114
CP108
CP107
RP117
DM210
Main1
DM211
Main2
RM201
PFC OUT
T1
RM205
RM204
RM203
RM202
DM303
ZM201
SSC3S921
CM201
QM201
PFC
ON/OFF
1 VSEN
RM213
ST 18
CM214
RM212
CM202
3 FB
VGH 16
RM214
2 VCC
4 ADJ
VS 15
CM203
5 CSS
VB 14
CM204
6 CL
CM205
7 RC
REG 12
RM211
8 PL
VGL 11
9 SB
GND 10
DM203
CM210
QM202
RM321
CM306
RM309
11
(14)
RM216
RM310
RM215
(3,4)
2,3
CM301CM307
(11)
8
DM205
S1
CN601
CM303
DM301
12.8Vout
RM301
RM217
C212
RM221
CM302
CM215
DM204
RM223
S3
Lp
RM218
18Vout
10 (13)
S4
DM304
1
(1,2)
DM202
RM210 RM209
CN602
(15, 16)
12
PC201
S2
RM225
RM222
CM207
CM211
CM216 CM217
QM204
RM224
CM208
RM319
RM306
9 (12)
CM213
RM206
QM203
Jumper
DM206
5
(7,8)
RM302
6,7
(9,10)
RM316
QM301
PC202
CM209
DM208
RM311
(5,6)
4
DBS3360
(TBS4016)
RM317
RM314
RM303 CM305
DM305
ZM301
RM308
QM302
PC201
POWER
_ON
QM303
PC202
RM219
CM206
CN603
RM313
RM312
D
RM318
RM208
RM322
CM304
DM302
RM207 DM207
RM220
RM320
RM307
CM310
RM305
RM315
RM304
DM209
PFC Vcc
CY203
Fault signal_1
Fault signal_2
Figure 10-2.
PCB pattern layout example circuit
SSC3S921 - DSJ Rev.1.92
SANKEN ELECTRIC CO., LTD.
Oct. 03, 2023
https://www.sanken-ele.co.jp/en/
© SANKEN ELECTRIC CO., LTD. 2015
27
SSC3S921
Important Notes
● All data, illustrations, graphs, tables and any other information included in this document (the “Information”) as to Sanken’s
products listed herein (the “Sanken Products”) are current as of the date this document is issued. The Information is subject to any
change without notice due to improvement of the Sanken Products, etc. Please make sure to confirm with a Sanken sales
representative that the contents set forth in this document reflect the latest revisions before use.
● The Sanken Products are intended for use as components of general purpose electronic equipment or apparatus (such as home
appliances, office equipment, telecommunication equipment, measuring equipment, etc.). Prior to use of the Sanken Products,
please put your signature, or affix your name and seal, on the specification documents of the Sanken Products and return them to
Sanken. When considering use of the Sanken Products for any applications that require higher reliability (such as transportation
equipment and its control systems, traffic signal control systems or equipment, disaster/crime alarm systems, various safety
devices, etc.), you must contact a Sanken sales representative to discuss the suitability of such use and put your signature, or affix
your name and seal, on the specification documents of the Sanken Products and return them to Sanken, prior to the use of the
Sanken Products. The Sanken Products are not intended for use in any applications that require extremely high reliability such as:
aerospace equipment; nuclear power control systems; and medical equipment or systems, whose failure or malfunction may result
in death or serious injury to people, i.e., medical devices in Class III or a higher class as defined by relevant laws of Japan
(collectively, the “Specific Applications”). Sanken assumes no liability or responsibility whatsoever for any and all damages and
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Applications or in manner not in compliance with the instructions set forth herein.
● In the event of using the Sanken Products by either (i) combining other products or materials or both therewith or (ii) physically,
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such uses in advance and proceed therewith at your own responsibility.
● Although Sanken is making efforts to enhance the quality and reliability of its products, it is impossible to completely avoid the
occurrence of any failure or defect or both in semiconductor products at a certain rate. You must take, at your own responsibility,
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Please refer to the relevant specification documents and Sanken’s official website in relation to derating.
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● The circuit constant, operation examples, circuit examples, pattern layout examples, design examples, recommended examples, all
information and evaluation results based thereon, etc., described in this document are presented for the sole purpose of reference of
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from any possible errors or omissions in connection with the Information.
● Please refer to our official website in relation to general instructions and directions for using the Sanken Products, and refer to the
relevant specification documents in relation to particular precautions when using the Sanken Products.
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DSGN-CEZ-16003
SSC3S921 - DSJ Rev.1.92
SANKEN ELECTRIC CO., LTD.
Oct. 03, 2023
https://www.sanken-ele.co.jp/en/
© SANKEN ELECTRIC CO., LTD. 2015
28
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