LLC Current-Resonant Off-Line Switching Controller
SSC3S927L
Data Sheet
Description
Package
The SSC3S927L is a controller with SMZ* method
for LLC current resonant switching power supplies,
incorporating a floating drive circuit for a high-side
power MOSFET. The IC includes useful functions such
as Standby Function, Automatic Dead Time Adjustment,
and Capacitive Mode Detection. The IC achieves high
efficiency, low noise and high cost-effective power
supply systems with few external components.
*SMZ: Soft-switched Multi-resonant Zero Current
switch, achieved soft switching operation during all
switching periods.
SOP18
Not to scale
Features
● Standby Mode Change Function
▫ Output Power at Light Load:
PO = 150 mW (PIN = 0.27 W)
▫ Burst Operation in Standby Mode
▫ Soft-on/Soft-off Function: Reduces Audible Noise
● Soft-start Function
● Capacitive Mode Detection Function
● Reset Detection Function
● Automatic Dead Time Adjustment Function
● Built-in Startup Circuit
● X-capacitor Discharge Function
● Protections
▫ Input Voltage Detection Function
Input Overvoltage Protection (HVP): Auto-restart
Input Undervoltage Protection (UVP): Auto-restart
▫ High-side Driver UVLO: Auto-restart
▫ Overcurrent Protection (OCP): Auto-restart, Peak
Drain Current Detection, 2-step Detection
▫ Overload Protection (OLP): Auto-restart
▫ Overvoltage Protection (OVP): Auto-restart
▫ REG Overvoltage Protection (REG_OVP):
Auto-restart
▫ Thermal Shutdown (TSD): Auto-restart
Applications
Switching power supplies for electronic devices such as:
● Digital Appliances (e.g., Television)
● Office Automation (OA) Equipment (e.g., Server,
MultiFunction Printer)
● Industrial Apparatus
● Communication Facilities
Typical Application
X-Cap
VOUT1(+)
PFC OUT
SSC3S927L
VSEN
ST
1
18
VCC
2
17
FB
3
16
VGH
SB
4
15
VS
14
VB
GND
CSS
5
U1
CL
6
13
RC
7
12
REG
CD
8
11
VGL
MODE
9
10
GND
VOUT(-)
VOUT2(+)
Standby
SSC3S927L-DSE Rev.1.3
SANKEN ELECTRIC CO., LTD.
Nov. 29, 2023
https://www.sanken-ele.co.jp/en
© SANKEN ELECTRIC CO., LTD. 2019
1
SSC3S927L
Contents
Description ------------------------------------------------------------------------------------------------------ 1
Contents --------------------------------------------------------------------------------------------------------- 2
1. Absolute Maximum Ratings----------------------------------------------------------------------------- 3
2. Electrical Characteristics -------------------------------------------------------------------------------- 4
3. Block Diagram --------------------------------------------------------------------------------------------- 7
4. Pin Configuration Definitions --------------------------------------------------------------------------- 7
5. Typical Application --------------------------------------------------------------------------------------- 8
6. Physical Dimensions -------------------------------------------------------------------------------------- 9
7. Marking Diagram ----------------------------------------------------------------------------------------- 9
8. Operational Description ------------------------------------------------------------------------------- 10
8.1 Resonant Circuit Operation --------------------------------------------------------------------- 10
8.2 Startup Operation --------------------------------------------------------------------------------- 13
8.3 Undervoltage Lockout (UVLO) ---------------------------------------------------------------- 13
8.4 Bias Assist Function------------------------------------------------------------------------------- 13
8.5 Soft Start Function -------------------------------------------------------------------------------- 14
8.6 Minimum and Maximum Switching Frequency Setting ----------------------------------- 14
8.7 High-side Driver ----------------------------------------------------------------------------------- 14
8.8 Constant Voltage Control Operation ---------------------------------------------------------- 15
8.9 Standby Function ---------------------------------------------------------------------------------- 15
8.9.1
Standby Mode Changed by External Signal ------------------------------------------- 16
8.9.2
Burst Oscillation Operation --------------------------------------------------------------- 16
8.10 Automatic Dead Time Adjustment Function ------------------------------------------------ 17
8.11 Capacitive Mode Detection Function ---------------------------------------------------------- 17
8.12 X-Capacitor Discharge Function --------------------------------------------------------------- 18
8.13 Reset Detection Function ------------------------------------------------------------------------ 19
8.14 Overvoltage Protection (OVP) ------------------------------------------------------------------ 21
8.15 REG Overvoltage Protection (REG_OVP) --------------------------------------------------- 21
8.16 Input Voltage Detection Function -------------------------------------------------------------- 21
8.16.1 Input Overvoltage Protection (HVP) ---------------------------------------------------- 21
8.16.2 Input Undervoltage Protection (UVP) -------------------------------------------------- 22
8.17 Overcurrent Protection (OCP) ----------------------------------------------------------------- 23
8.18 Overload Protection (OLP) ---------------------------------------------------------------------- 23
8.19 Thermal Shutdown (TSD) ----------------------------------------------------------------------- 24
9. Design Notes ---------------------------------------------------------------------------------------------- 24
9.1 External Components ---------------------------------------------------------------------------- 24
9.1.1
Input and output electrolytic capacitors ------------------------------------------------ 24
9.1.2
Resonant transformer ---------------------------------------------------------------------- 24
9.1.3
Current detection resistor, ROCP---------------------------------------------------------- 24
9.1.4
Current resonant capacitor, Ci ----------------------------------------------------------- 24
9.1.5
Gate Pin Peripheral Circuit --------------------------------------------------------------- 24
9.2 PCB Trace Layout and Component Placement --------------------------------------------- 24
10. Pattern Layout Example ------------------------------------------------------------------------------- 26
Important Notes ---------------------------------------------------------------------------------------------- 28
SSC3S927L-DSE Rev.1.3
SANKEN ELECTRIC CO., LTD.
Nov. 29, 2023
https://www.sanken-ele.co.jp/en
© SANKEN ELECTRIC CO., LTD. 2019
2
SSC3S927L
1.
Absolute Maximum Ratings
Current polarities are defined as follows: current going into the IC (sinking) is positive current (+); and current
coming out of the IC (sourcing) is negative current (−).
Unless otherwise specified, TA is 25°C.
Parameter
Symbol
Pins
Rating
Unit
VSEN Pin Sink Current
ISEN
1 − 10
1.0
mA
Control Part Input Voltage
VCC
2 − 10
−0.3 to 35
V
FB Pin Voltage
VFB
3 − 10
−0.3 to 6
V
SB Pin Voltage
VSB
4 − 10
−0.3 to 6
V
CSS Pin Voltage
VCSS
5 − 10
−0.3 to 6
V
CL Pin Voltage
VCL
6 − 10
−0.3 to 6
V
RC Pin Voltage
VRC
7 − 10
−6 to 6
V
CD Pin Voltage
VCD
8 − 10
−0.3 to 6
V
IMODE
9 − 10
100
μA
VGL pin Voltage
VGL
11 − 10
−0.3 to VREG + 0.3
V
REG pin Source Current
IREG
12 − 10
−10.0
mA
VB−VS
14 − 15
−0.3 to 20.0
V
VS Pin Voltage
VS
15 − 10
−1 to 600
V
VGH Pin Voltage
VGH
16 − 10
VS − 0.3 to VB + 0.3
V
ST Pin Voltage
VST
18 − 10
−0.3 to 600
V
Operating Ambient Temperature
TOP
−
−40 to 85
°C
Storage Temperature
TSTG
−
−40 to 125
°C
MODE Pin Sink Current
Voltage Between VB Pin and VS Pin
TJ
−
150
°C
Junction Temperature
* Surge voltage withstand (Human body model) of No.14, 15, 16 and 18 is guaranteed 1000 V. Other pins are
guaranteed 2000 V.
SSC3S927L-DSE Rev.1.3
SANKEN ELECTRIC CO., LTD.
Nov. 29, 2023
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© SANKEN ELECTRIC CO., LTD. 2019
3
SSC3S927L
2.
Electrical Characteristics
Current polarities are defined as follows: current going into the IC (sinking) is positive current (+); and current
coming out of the IC (sourcing) is negative current (−).
Unless otherwise specified, TA is 25 °C, VCC is 19 V.
Parameter
Symbol
Conditions
Pins
Min.
Typ.
Max.
Unit
Start Circuit and Circuit Current
Operation Start Voltage
VCC(ON)
2 − 10
15.8
17.0
18.2
V
Operation Stop Voltage (1)
Startup Current Biasing Threshold
Voltage(1)
Circuit Current in Operation
VCC(OFF)
2 − 10
7.8
8.9
9.8
V
VCC(BIAS)
2 − 10
9.0
9.8
10.6
V
ICC(ON)
2 − 10
—
—
10.0
mA
2 − 10
—
0.7
1.5
mA
IST
18 − 10
3.0
6.0
9.0
mA
VCC(P.OFF)
2 − 10
7.8
8.9
9.8
V
2 − 10
—
0.7
1.5
mA
27.5
31.5
35.5
kHz
230
300
380
kHz
0.04
0.24
0.44
µs
1.20
1.65
2.20
µs
69
73
77
kHz
42.4
45.4
48.4
kHz
Circuit Current in Non-Operation
(2)
(2)
Startup Current
Protection Operation Release
Threshold Voltage(1)
Circuit Current in Protection
ICC(OFF)
ICC(P)
VCC = 11 V
VCC = 10 V
Oscillator
Minimum Frequency
f(MIN)
Maximum Frequency
f(MAX)
Minimum Dead-Time
td(MIN)
Maximum Dead-Time
td(MAX)
Externally Adjusted Minimum
Frequency 1
Externally Adjusted Minimum
Frequency 2
Feedback Control
FB Pin Oscillation Start Threshold
Voltage
FB Pin Oscillation Stop Threshold
Voltage
FB Pin Maximum Source Current
f(MIN)ADJ1
f(MIN)ADJ2
11 – 10
16 − 15
11 – 10
16 − 15
11 – 10
16 − 15
11 – 10
16 − 15
11 – 10
RCSS = 30 kΩ
16 − 15
11 – 10
RCSS = 77 kΩ
16 − 15
VFB(ON)
3 – 10
0.15
0.30
0.45
V
VFB(OFF)
3 – 10
0.05
0.20
0.35
V
3 – 10
−300
−195
−100
µA
IFB(R)
3 – 10
2.5
5.0
7.5
mA
CSS Pin Charging Current
ICSS(C)
5 – 10
−120
−105
−90
µA
CSS Pin Reset Current
ICSS(R)
5 – 10
11 – 10
16 − 15
1.1
1.8
2.5
mA
400
500
600
kHz
FB Pin Reset Current
IFB(MAX)
VFB = 0 V
Soft-start
Maximum Frequency in Soft-start
Standby
MODE Pin Standby Release
Threshold Voltage
MODE Pin Standby Threshold
Voltage
MODE Pin Sink Current
(1)
(2)
f(MAX)SS
VCC = 11V
VMODE(NRM)
9 – 10
4.5
5.0
5.5
V
VMODE(STB)
9 – 10
1.35
1.5
1.65
V
IMODE(SNK)
9 – 10
3
10
17
µA
VCC(OFF) = VCC(P.OFF) < VCC(BIAS) always.
ISTART = IST(OFF) – ICC(OFF),where, ISTART is VCC pin sink current in startup.
SSC3S927L-DSE Rev.1.3
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Nov. 29, 2023
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© SANKEN ELECTRIC CO., LTD. 2019
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SSC3S927L
Parameter
Pins
Min.
Typ.
Max.
Unit
VMODE(CLAMP)
9 – 10
7.0
8.5
10.0
V
VSB(ON)
4 – 10
0.5
0.6
0.7
V
VSB(OFF)
4 – 10
0.4
0.5
0.6
V
ISB(SRC)
4 – 10
−17
−10
−3
µA
ISB(SNK)
4 – 10
3
10
17
µA
CL pin OLP Threshold Voltage
VCL(OLP)
6 – 10
3.9
4.2
4.5
V
CL Pin Source Current 1
ICL(SRC)1
6 – 10
−29
−17
−5
μA
CL Pin Source Current 2
6 – 10
−180
−135
−90
μA
CL Pin Sink Current
Input Undervoltage Protection
(UVP)
VSEN Pin Threshold Voltage (On)
ICL(SRC)2
ICL(SNK)
6 – 10
10
30
50
μA
VSEN(ON)
1 – 10
1.150
1.200
1.250
V
VSEN Pin Threshold Voltage (Off) 1
VSEN(OFF)1
1 – 10
0.955
1.000
1.045
V
VSEN Pin Threshold Voltage (Off) 2
VSEN(OFF)2
1 – 10
—
0.8
—
V
VSEN Pin HVP Threshold Voltage
VSEN(HVP)
1 – 10
5.3
5.6
5.9
V
VSEN (CLAMP)
1 – 10
10.0
—
—
V
VSEN(AC)1
1 – 10
2.56
2.70
2.84
V
VSEN(AC)2
1 – 10
—
2.4
—
V
VCD1
8 – 10
2.8
3.0
3.2
V
MODE Pin Clamp Voltage
SB Pin Oscillation Start Threshold
Voltage
SB Pin Oscillation Stop Threshold
Voltage
SB Pin Source Current
SB Pin Sink Current
Symbol
Conditions
Overload Protection (OLP)
VSEN Pin Clamp Voltage
VSEN pin Threshold Voltage for AC
Line Detection 1
VSEN Pin Threshold Voltage for AC
Line Detection 2
CD Pin Threshold Voltage 1
CD Pin Source Current
ICD(SRC)
VCD = 0 V
8 – 10
–12.0
–10.2
–8.5
μA
CD Pin Reset Current
ICD(R)
VCD = 2 V
8 – 10
1.0
2.5
4.0
mA
tRST(MAX)
11 – 10
16 − 15
4
5
6
µs
VREG
12 – 10
9.6
10.0
10.8
V
VBUV(ON)
14 – 15
5.7
6.8
7.9
V
VBUV(OFF)
14 – 15
5.5
6.4
7.3
V
11 – 10
16 − 15
—
–540
—
mA
11 – 10
16 − 15
—
1.50
—
A
11 – 10
16 − 15
−140
−90
−40
mA
Reset Detection
Maximum Reset Time
Driver Circuit Power Supply
VREG Pin Output Voltage
High-side Driver
High-side Driver Operation Start
Voltage
High-side Driver Operation Stop
Voltage
Driver Circuit
VGL,VGH Pin Source Current 1
IGL(SRC)1
IGH(SRC)1
VGL,VGH Pin Sink Current 1
IGL(SNK)1
IGH(SNK)1
VGL,VGH Pin Source Current 2
IGL(SRC)2
IGH(SRC)2
VREG = 10.5V
VB = 10.5V
VGL = 0V
VGH = 0V
VREG = 10.5V
VB = 10.5V
VGL = 10.5V
VGH = 10.5V
VREG = 11.5V
VB = 11.5V
VGL = 10V
VGH = 10V
SSC3S927L-DSE Rev.1.3
SANKEN ELECTRIC CO., LTD.
Nov. 29, 2023
https://www.sanken-ele.co.jp/en
© SANKEN ELECTRIC CO., LTD. 2019
5
SSC3S927L
Parameter
VGL,VGH Pin Sink Current 2
Symbol
IGL(SNK)2
IGH(SNK)2
Conditions
VREG = 12V
VB = 12V
VGL = 1.5V
VGH = 1.5V
Pins
Min.
Typ.
Max.
Unit
11 – 10
16 − 15
140
230
360
mA
0.02
0.10
0.18
V
−0.18
−0.10
−0.02
V
0.20
0.30
0.40
V
−0.40
−0.30
−0.20
V
1.80
1.90
2.00
V
−2.00
−1.90
−1.80
V
2.62
2.80
2.98
V
−2.98
−2.80
−2.62
V
Current Resonant and Overcurrent Protection(OCP)
Capacitive Mode Detection Voltage 1
VRC1
7 – 10
Capacitive Mode Detection Voltage 2
VRC2
7 – 10
RC Pin Threshold Voltage (Low)
VRC(L)
7 – 10
RC Pin Threshold Voltage
(High speed)
VRC(S)
7 – 10
CSS Pin Sink Current (Low)
ICSS(L)
5 – 10
1.1
1.8
2.5
mA
CSS Pin Sink Current (High speed)
ICSS(S)
5 – 10
13.0
20.5
28.0
mA
VCC Pin OVP Threshold Voltage
VCC(OVP)
2 – 10
30.0
32.0
34.0
V
REG Pin OVP Threshold Voltage
VCC(REG)
12 – 10
11.5
12.4
13.5
V
TJ(TSD)
—
140
—
—
°C
θJ-A
—
—
—
95
°C/W
Overvoltage Protection (OVP)
Thermal Shutdown (TSD)
Thermal Shutdown Temperature
Thermal Resistance
Junction to Ambient Thermal
Resistance
SSC3S927L-DSE Rev.1.3
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Nov. 29, 2023
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© SANKEN ELECTRIC CO., LTD. 2019
6
SSC3S927L
3.
Block Diagram
ST
18
High Side Driver
14
Startup
VB
UVLO
2
VCC
GND
Start/Stop/
Reg./Bias/
OVP
16
Level
Shift
15
10
VSEN
MODE
SB
FB
VCC
GND
1
9
4
3
Input
Sense
12
REG
11
VGL
MAIN
Standby
Control
RC Detector
Dead
Time
FB Control
RC
OC Detector
Soft-start/OC/
Minimum Freq.
Adjstment
5
7
RV Detector
Freq. Control
Maximum
Freq.
CSS
VGH
VS
OLP
AC Detector
6
8
CL
CD
BD_SSC3S927L_R1
4.
Pin Configuration Definitions
1
VSEN
ST 18
2
VCC
3
FB
VGH 16
4
SB
VS 15
5
CSS
VB 14
6
CL
7
RC
REG 12
8
CD
VGL 11
9
MODE
GND 10
Number
1
Name
VSEN
2
VCC
3
4
5
6
FB
SB
CSS
CL
7
RC
8
9
10
11
12
13
14
15
16
17
18
CD
MODE
GND
VGL
REG
—
VB
VS
VGH
—
ST
Function
The mains input voltage detection signal input
Supply voltage input for the IC, and Overvoltage
Protection (OVP) signal input
Feedback signal input for constant voltage control
Standby control capacitor connection
Soft-start capacitor connection
Overload detection capacitor connection
Resonant current detection signal input, and
Overcurrent Protection (OCP) signal input
Delay time setting capacitor connection
Standby mode change signal input
Ground
Low-side gate drive output
Supply voltage output for gate drive circuit
(Pin removed)
Supply voltage input for high-side driver
Floating ground for high-side driver
High-side gate drive output
(Pin removed)
Startup current input
SSC3S927L-DSE Rev.1.3
SANKEN ELECTRIC CO., LTD.
Nov. 29, 2023
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© SANKEN ELECTRIC CO., LTD. 2019
7
SSC3S927L
5.
Typical Application
DST1
VAC
L1
BR1
L2
DST2
CX
CIN
U2
C1
PFC
controller
PFC control
T1
R4
R3 R2
SSC3S927L
C4
1
18
VCC
2
17
FB
3
16
VGH
4
15
VS
14
VB
CSB
R5
SB
CSS
C6
CL
C7
RC
C8
CD
ROCP
R6
MODE
5
6
7
CCD
Q(H)
U51
9
10
LLC control
D3
C51
CV
D52
VOUT2(+)
Q(L)
D6
Ci
R58
C3
R13
D54
PC2
Standby
Q51
R1
C11
R54
R53
R14
R16
R52
VOUT(-)
R11
D4
R12
REG
R55
R56
C53
R57 C54
C12 R10
GND
R15
C10
PC1
C52
D51
13
12
VOUT1(+)
R51
D5
VGL
PC1
C9
ST
11
8
Q1
R8
U1
C55
RST
VSEN
C5
D53
D1
C2
R59
R17
PC2
Figure 5-1.
Typical Application
SSC3S927L-DSE Rev.1.3
SANKEN ELECTRIC CO., LTD.
Nov. 29, 2023
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© SANKEN ELECTRIC CO., LTD. 2019
8
SSC3S927L
6.
Physical Dimensions
● SOP18
NOTES:
● Dimension is in millimeters.
● Pb-free.
7.
Marking Diagram
18
S SC3S927L
Part Number
S KY MD
X XX X
1
Lot Number:
Y is the last digit of the year of manufacture (0 to 9)
M is the month of the year (1 to 9, O, N, or D)
D is a period of days:
1: the first 10 days of the month (1st to 10th)
2: the second 10 days of the month (11th to 20th)
3: the last 10–11 days of the month (21st to 31st)
Control Number
SSC3S927L-DSE Rev.1.3
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Nov. 29, 2023
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© SANKEN ELECTRIC CO., LTD. 2019
9
SSC3S927L
8.
Operational Description
All of the parameter values used in these descriptions
are typical values, unless they are specified as minimum
or maximum. Current polarities are defined as follows:
current going into the IC (sinking) is positive current
(+); and current coming out of the IC (sourcing) is
negative current (−). Q(H) and Q(L) indicate a high-side
power MOSFET and a low-side power MOSFET
respectively. Ci and CV indicate a current resonant
capacitor and a voltage resonant capacitor, respectively.
8.1
Resonant Circuit Operation
Figure 8-1 shows a basic RLC series resonant circuit.
The impedance of the circuit, Ż, is as the following
Equation.
Ż = R + j (ωL −
1
),
ωC
(1)
where ω is angular frequency; and ω = 2πf.
Thus,
Ż = R + j (2πfL −
1
).
2πfC
(2)
When the frequency, f, changes, the impedance of
resonant circuit will change as shown in Figure 8-2.
R
Figure 8-1.
L
C
f0 =
1
2π√LC
.
(4)
Figure 8-3 shows the circuit of a current resonant
power supply. The basic configuration of the current
resonant power supply is a half-bridge converter. The
switching devices, Q(H) and Q(L), are connected in series
with VIN. The series resonant circuit and the voltage
resonant capacitor, CV, are connected in parallel with
Q(L). The series resonant circuit is consisted of the
following components: the resonant inductor, LR; the
primary winding, P, of a transformer, T1; and the current
resonant capacitor, Ci. The coupling between the
primary and secondary windings of T1 is designed to be
poor so that the leakage inductance increases. This
leakage inductance is used for LR. This results in a down
sized of the series resonant circuit. The dotted mark with
T1 describes the winding polarity, the secondary
windings, S1 and S2, are connected so that the polarities
are set to the same position as shown in Figure 8-3. In
addition, the winding numbers of each other should be
equal. From Equation (1), the impedance of a current
resonant power supply is calculated by Equation (5).
From Equation (4), the resonant frequency, f0 , is
calculated by Equation (6).
1
},
ωCi
Ż = R + j {ω(LR + LP ) −
RLC Series Resonant Circuit
f0 =
Inductance area
1
2π√(LR + LP ) × Ci
(5)
,
(6)
where:
R is the equivalent resistance of load,
LR is the inductance of the resonant inductor,
LP is the inductance of the primary winding P, and
Ci is the capacitance of current resonant capacitor.
Impedance
Capacitance area
The frequency in which Ż becomes minimum value is
called a resonant frequency, f0. The higher frequency
area than f0 is an inductance area. The lower frequency
area than f0 is a capacitance area.
From Equation (3), f0 is as follows:
R
ID(H)
f0
Figure 8-2.
Frequency
Q(H)
VGH
Impedance of Resonant Circuit
ω = 2πf =
√LC
LR
T1
IS1
VIN
When 2πfL = 1/2πfC, Ż of Equation (2) becomes the
minimum value, R (see Figure 8-2). In the case, ω is
calculated by Equation (3).
1
Series resonant circuit
VDS(H)
ID(L)
Q(L)
Cv
P
VOUT
(+)
S1
LP
VGL
VDS(L)
VCi
ICi
(3)
Figure 8-3.
SSC3S927L-DSE Rev.1.3
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© SANKEN ELECTRIC CO., LTD. 2019
S2
Ci
(−)
IS2
Current Resonant Power Supply Circuit
10
SSC3S927L
In the current resonant power supply, Q(H) and Q(L) are
alternatively turned on and off. The on and off times of
them are equal. There is a dead time between the on
periods of Q(H) and Q(L). During the dead time, Q(H) and
Q(L) are in off status.
In the current resonant power supply, the frequency is
controlled. When the output voltage decreases, the IC
decreases the switching frequency so that the output
power is increased to keep a constant output voltage.
This must be controlled in the inductance area (fSW <
f0 ). Since the winding current is delayed from the
winding voltage in the inductance area, the turn-on
operates in a ZCS (Zero Current Switching); and the
turn-off operates in a ZVS (Zero Voltage Switching).
Thus, the switching losses of Q(H) and Q(L) are nearly
zero. In the capacitance area (fSW < f0 ), the current
resonant power supply operates as follows: When the
output voltage decreases, the switching frequency is
decreased; and then, the output power is more decreased.
Therefore, the output voltage cannot be kept constant.
Since the winding current goes ahead of the winding
voltage in the capacitance area, Q(H) and Q(L) operate in
the hard switching. This results in the increases of a
power loss. This operation in the capacitance area is
called the capacitive mode operation. The current
resonant power supply must be operated without the
capacitive mode operation (for more details, see Section
8.11).
Figure 8-4 describes the basic operation waveform of
current resonant power supply (see Figure 8-3 about the
symbol in Figure 8-4). For the description of current
resonant waveforms in normal operation, the operation
is separated into a period A to F. In the following
description:
ID(H) is the current of Q(H),
ID(L) is the current of Q(L),
VF(H) is the forwerd voltage of Q(H),
VF(L) is the forwerd voltage of Q(L),
IL is the current of LR,
VIN is an input voltage,
VCi is Ci voltage, and
VCV is CV voltage.
resonant current flows to the primary side only to
charge Ci (see Figure 8-6).
VGH
0
VGL
0
VDS(H)
VIN+VF(H)
0
ID(H)
0
VDS(L)
0
ID(L)
0
ICi
0
VCi
VIN/2
IS1
0
IS2
0
A
B
D
t
E
C
F
Figure 8-4. The Basic Operation Waveforms of
Current Resonant Power Supply
Q(H)
ID(H)
ON
LR
LP
VIN
S1
Q(L)
IS1
Cv
VCV
OFF
S2
Ci
VCi
The current resonant power supply operations in
period A to F are as follows:
1) Period A
When Q(H) is on, an energy is stored into the series
resonant circuit by ID(H) that flows through the
resonant circuit and the transformer (see Figure 8-5).
At the same time, the energy is transferred to the
secondary circuit. When the primary winding voltage
can not keep the on status of the secondary rectifier,
the energy transmittion to the secondary circuit is
stopped.
Figure 8-5.
Operation in period A
Q(H)
ID(H)
ON
LR
LP
VIN
S1
Q(L)
Cv
OFF
S2
Ci
2) Period B
After the secondary side current becomes zero, the
Figure 8-6.
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Operation in Period B
11
SSC3S927L
3) Period C
C is the dead-time period. Q(H) and Q(L) are in off
status. When Q(H) turns off, CV is discharged by IL that
is supplied by the energy stored in the series resonant
circuit applies (see Figure 8-7). When VCV decreases
to VF(L), −ID(L) flows through the body diode of Q(L);
and VCV is clamped to VF(L). After that, Q(L) turns on.
Since VDS(L) is nearly zero at the point, Q(L) operates
in the ZVS and the ZCS; thus, the switching loss
achieves nearly zero.
4) Period D
Immidiately after Q(L) turns on, −ID(L), which was
flowing in Period C, continues to flow through Q(L)
for a while. Then, ID(L) flows as shown in Figure 8-8;
and VCi is applied the primary winding voltage of the
transformer. At the same time, energy is transferred to
the secondary circuit. When the primary winding
voltage can not keep the on status of the secondary
rectifier, the energy transmittion to the secondary
circuit is stopped.
Q(H)
LR
OFF
LP
VIN
IL
Q(L)
Cv
VCV
OFF
-ID(L)
Ci
Figure 8-7.
Operation in Period C
Q(H)
LR
OFF
LP
VIN
ID(L)
Q(L)
S1
Cv
–ID(L)
ON
S2
IS2
Ci
5) Period E
After the secondary side current becomes zero, the
resonant current flows to the primary side only to
charge Ci (see Figure 8-9).
6) Period F
F is the dead-time period. Q(H) and Q(L) are in off
status.
When Q(L) turns off, CV is charged by −IL that is
supplied by the energy stored in the series resonant
circuit applies (see Figure 8-10). When VCV decreases
to VIN + VF(H), −ID(H) flows through body diode of
Q(H); and VCV is clamped to VIN + VF(H). After that,
Q(H) turns on. Since VDS(H) is nearly zero at the point,
Q(H) operates in the ZVS and the ZCS; thus, the
switching loss achieves nearly zero.
7) After the period F
Immidiately after Q(H) turns on, −ID(H), which was
flowing in Period F, continues to flow through Q(H)
for a while. Then, ID(H) flows again; and the operation
returns to the period A. The above operation is
repeated to transfer energy to the secondary side from
the resonant circuit.
VCi
Figure 8-8.
Operation in Period D
Q(H)
LR
OFF
LP
VIN
ID(L)
Q(L)
S1
Cv
ON
S2
Ci
Figure 8-9.
Operation in Period E
Q(H)
-ID(H)
LR
OFF
LP
VIN
-IL
Q(L)
VCV
OFF
Cv
Ci
Figure 8-10.
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Operation in Period F
12
SSC3S927L
8.2
Startup Operation
8.3
The waveform at startup is shown in Figure 8-12.
When a mains input voltage is provided, and then the
VSEN pin voltage increases to the on-threshold voltage,
VSEN(ON) = 1.200 V, or more, C2 connected to the VCC
pin is charged by the constant startup current, IST of 6.0
mA. When the VCC pin voltage increases to the
operation start voltage, VCC(ON) = 17.0 V, the control
circuit of the IC is activated. After that, when the VSEN
pin voltage reaches to VSEN(ON) = 1.200 V at the first-up
edge of half-sinewave, REG pin voltage is output. Then,
the capacitor C9 connected to FB pin starts to be
charged. When the FB pin voltage increases to the
oscillation start threshold voltage, VFB(ON) = 0.30 V, or
more, the switching operation starts.
Undervoltage Lockout (UVLO)
Figure 8-13 shows the relationship of VCC and ICC.
After the IC starts operation, when the VCC pin
voltage decreases to VCC(OFF) = 8.9 V, the IC stops
switching operation by the Undervoltage Lockout
(UVLO) Function and reverts to the state before startup
again.
ICC
Stop
Start
DST1
VAC
L1
DST2
U2
C1
PFC
controller
Figure 8-13.
R2
R3
ST
U1
1
VSEN
18
VCC
FB
3
VCC（ON） VCC Pin
Voltage
VCC（OFF）
CX
2
RST
R1
GND
10
D1
VD
8.4
VCC vs. ICC
Bias Assist Function
Figure 8-14 shows the VCC pin voltage behavior
during the startup period.
R8
R4
C4
Figure 8-11.
C9
PC1
C2
VCC Pin Peripheral Circuit
VCC Pin Voltage
IC startup
VCC(ON)
VCC(BIAS)
VSEN Pin Voltage
VCC(OFF)
VSEN(ON)
0
Startup success
Target
operating
voltage
Increasing by output
voltage rising
Bias Assist period
Startup failure
VCC Pin Voltage
VCC(ON)
Time
0
Figure 8-14.
VCC Pin Voltage during Startup Period
REG Pin Voltage
VREG
0
FB Pin Voltage
0
VFB(ON)
VGL Pin Voltage
0
Figure 8-12.
The Startup Operational Waveforms
When the conditions of Section 8.2 are fulfilled, the
IC starts operation. Thus, the circuit current, I CC,
increases, and the VCC pin voltage begins dropping. At
the same time, the auxiliary winding voltage, VD,
increases in proportion to the output voltage rise. Thus,
the VCC pin voltage is set by the balance between
dropping due to the increase of ICC and rising due to the
increase of the auxiliary winding voltage, VD.
When the VCC pin voltage decreases to
VCC(OFF) = 8.9 V, the IC stops switching operation and a
startup failure occurs.
In order to prevent this, when the VCC pin voltage
decreases to the startup current threshold biasing voltage,
VCC(BIAS) = 9.8 V, the Bias Assist Function is activated.
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SSC3S927L
While the Bias Assist Function is activated, any
decrease of the VCC pin voltage is counteracted by
providing the startup current, IST, from the startup
circuit.
It is necessary to check the startup process based on
actual operation in the application, and adjust the VCC
pin voltage, so that the startup failure does not occur.
If VCC pin voltage decreases to VCC(BIAS) and the Bias
Assist Function is activated, the power loss increases.
Thus, VCC pin voltage in operation should be set
more than VCC(BIAS) by the following adjustments.
● The turns ratio of the auxiliary winding to the
secondary-side winding is increased.
● The value of C2 in Figure 5-1 is increased and/or the
value of R1 is reduced.
During all protection operation, the Bias Assist
Function is disabled.
8.5
Soft Start Function
Figure 8-15
waveforms.
shows
CSS Pin
Voltage
the
OCP operation
peropd
Soft-start
operation
Frequency control
by feedback signal
When the IC becomes any of the following conditions,
C6 is discharged by the CSS Pin Reset Current,
ICSS(R) = 1.8 mA.
● The VCC pin voltage decreases to the operation stop
voltage, VCC(OFF) = 8.9 V, or less.
● After AC input voltage turns off, thr CD pin voltage
increases to VCD1 = 3.0 V or more.
● Any of protection operations in protection mode
(OVP, HVP, OLP or TSD) is activated.
8.6
The minimum switching frequency is adjustable by
the value of R5 (RCSS) connected to the CSS pin. The
relationship of R5 (RCSS) and the externally adjusted
minimum frequency, f(MIN)ADJ, is shown in Figure 8-16.
The f(MIN)ADJ should be adjusted to more than the
resonant frequency, fO, under the condition of the
minimum mains input voltage and the maximum output
power. The maximum switching frequency, f MAX, is
determined by the inductance and the capacitance of the
resonant circuit. The fMAX should be adjusted to less than
the maximum frequency, f(MAX) = 300 kHz.
Soft-start
period
0
Time
Primary-side
Winding Current
OCP limit
0
f(MIN)ADJ (kHz)
80
C6 is charged by ICSS(C)
Figure 8-15.
Minimum and Maximum Switching
Frequency Setting
50
20
Soft-start Operation
* The maximum frequency during normal operation is
f(MAX) = 300 kHz.
60
40
Time
The IC has Soft Start Function to reduce stress of
peripheral component and prevent the capacitive mode
operation.
During the soft start operation, C6 connected to the
CSS pin is charged by the CSS Pin Charge Current,
ICSS(C) = −105 μA. The oscillation frequency is varied by
the CSS pin voltage. The switching frequency gradually
decreases from f(MAX)SS* = 500 kHz at most, according
to the CSS pin voltage rise. At same time, output power
increases. When the output voltage increases, the IC is
operated with an oscillation frequency controlled by
feedback.
70
30
Figure 8-16.
8.7
40
50
60
RCSS (kΩ)
70
80
R5 (RCSS) vs. f(MIN)ADJ
High-side Driver
Figure 8-17 shows a bootstrap circuit. The bootstrap
circuit is for driving to Q(H) and is made by D3, R12 and
C12 between the REG pin and the VS pin.
When Q(H) is OFF state and Q(L) is ON state, the VS
pin voltage becomes about ground level and C12 is
charged from the REG pin.
When the voltage of between the VB pin and the VS
pin, VB-S, increases to VBUV(ON) = 6.8 V or more, an
internal high-side drive circuit starts operation. When
VB-S decreases to VBUV(OFF) = 6.4 V or less, its drive
circuit stops operation. In case the both ends of C12 and
D4 are short, the IC is protected by VBUV(OFF). D4 for
protection against negative voltage of the VS pin
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SSC3S927L
● D3
D3 should be an ultrafast recovery diode of short
recovery time and low reverse current. When the
maximum mains input voltage of the apprication is
265VAC, it is recommended to use ultrafast recovery
diode of VRM = 600 V
● C11, C12, and R12
The values of C11, C12, and R12 are determined by
total gate charge, Qg, of external MOSFET and
voltage dip amount between the VB pin and the VS
pin in the burst oscillation mode of the standby mode
change.
C11, C12, and R12 should be adjusted so that the
voltage between the VB pin and the VS is more than
VBUV(ON) = 6.8 V by measuring the voltage with a
high-voltage differential probe.
The reference value of C11 is 0.47μF to 1 μF.
The time constant of C12 and R12 should be less than
500 ns. The values of C12 and R22 are 0.047μF to 0.1
μF, and 2.2 Ω to 10 Ω.
C11 and C12 should be a film type or ceramic
capacitor of low ESR and low leakage current.
condition, and thus the FB pin voltage decreases. While
the FB pin voltage decreases to the oscillation stop
threshold voltage, VFB(OFF) = 0.20 V, or less, the IC stops
switching operation. This operation reduces switching
loss, and prevents the increasing of the secondary output
voltage. In Figure 8-18, R8 and C9 are for phase
compensation adjustment, and C5 is for high frequency
noise rejection.
The secondary-side circuit should be designed so that
the collector current of PC1 is more than 195 μA which
is the absolute value of the maximum source current,
IFB(MAX). Especially the current transfer ratio, CTR, of
the photo coupler should be taken aging degradation into
consideration.
U1
FB
3
GND
10
R8
C5
C9
● D4
D4 should be a Schottky diode of low forward voltage,
VF, so that the voltage between the VB pin and the VS
pin must not decrease to the absolute maximum
ratings of −0.3 V or less.
Figure 8-18.
8.9
VGH
VS
16
Q(H)
T1
15
C12
D4
VB 14
Cv
R12
U1
REG
VGL
GND
12
D3
Q(L)
11
10
Ci
C11
Bootstrap circuit
Figure 8-17.
8.8
PC1
FB Pin Peripheral Circuit
Standby Function
The IC has the Standby Function in order to increase
circuit efficiency in light load. When the Standby
Function is activated, the IC operates in the burst
oscillation mode as shown in Figure 8-19.
The burst oscillation has periodic non-switching
intervals. Thus, the burst oscillation mode reduces
switching losses. Generally, to improve efficiency under
light load conditions, the frequency of the burst
oscillation mode becomes just a few kilohertz. In
addition, the IC has the Soft-on and the Soft-off
Function in order to suppress rapid and sharp fluctuation
of the drain current during the burst oscillation mode.
thus, the audible noises can be reduced (see Section
8.9.2). The operation of the IC changes to the standby
operation by the external signal (see Section 8.9.1).
Bootstrap Circuit
Constant Voltage Control Operation
Figure 8-18 shows the FB pin peripheral circuit. The
FB pin is sunk the feedback current by the photo-coupler,
PC1, connected to FB pin. As a result, since the
oscillation frequency is controlled by the FB pin, the
output voltage is controlled to constant voltage (in
inductance area).
The feedback current increases under slight load
Primary-side Main
Winding Current
Switching period
Non-switching period
Soft-on
Time
Soft-off
Figure 8-19.
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Standby Waveform
15
SSC3S927L
8.9.1 Standby Mode Changed by External
Signal
Figure 8-20 shows the standby mode change circuit
with external signal. Figure 8-21 shows the standby
change operation waveforms. When the standby
terminal of Figure 8-20 is provided with the L signal, Q1
turns off, C10 connected to the MODE pin is discharged
by the sink current, IMODE(SNK) = 10 µA, and then the
MODE pin voltage decreases. When the MODE pin
voltage decrease to the MODE Pin Standby Threshold
Voltage, VMODE(STB) = 1.5 V, the operation of the IC is
changed to the standby mode. In the standby mode, the
IC stops a switching operation while the following
conditions are fulfilled: MODE pin voltage ≤ VMODE(STB)
of 1.5 V, FB pin voltage ≤ VFB(OFF) of 0.20 V, and SB
pin voltage ≤ VSB(OFF) of 0.5 V.
When the standby terminal is provided with the H
signal and the SB pin voltage increases to Standby
Release Threshold Voltage, VMODE(NRM) = 5.0 V, or more,
the IC returns to normal operation.
8.9.2 Burst Oscillation Operation
In standby operation, the IC operates burst oscillation
where the peak drain current is suppressed by Soft-On
/Soft-off Function in order to reduce audible noise from
transformer. During burst oscillation operation, the
switching oscillation is controlled by SB pin voltage.
Figure 8-22 shows the burst oscillation operation
waveforms.
Output current
0
Output voltage
0
FB pin voltage
VFB(ON)
VFB(OFF)
0
Charged
by ISB(SRC)
SB pin voltage
Discharged
by ISB(SNK)
VSB(ON)
12
REG
VSB(OFF)
FB
SB MODE
3 R8
4
C5
0
C11
U1
9
R16
0
Q1
R15
PC2
Q51
C10
C9
PC1
R59
PC2
Figure 8-20.
Standby
GND
Standby Mode Change Circuit
H
0
H
L
Standby operation
MODE Pin
Voltage
VMODE(STB)
Discharged
by ISB(SNK)
VMODE(NRM)
0
SB Pin Voltage
VSB(OFF)
0
FB Pin Voltage
VFB(OFF)
0
Primary-side
Main Winding
Current
0
Switching stop
Figure 8-21.
Soft-on
Soft-off
Time
Standby
R17
CSB
Primary-side
main winding
current
R58
Time
Standby Change Operation Waveforms
Figure 8-22.
Burst Oscillation Operation Waveforms
When the SB pin voltage decreases to VSB(OFF) = 0.5 V
or less and the FB pin voltage decreases to
VFB(OFF) = 0.20 V or less, the IC stops switching
operation, and then the output voltage decreases. Since
the output voltage decreases, the FB pin voltage
increases. When the FB pin voltage increases to the
oscillation start threshold voltage, VFB(ON) = 0.30 V, CSB
connected to the SB pin is charged by ISB(SRC) = −10 µA,
and the SB pin voltage gradually increases. When the
SB pin voltage increases to the oscillation start threshold
voltage, VSB(ON) = 0.6 V, the IC resumes switching
operation, controlling the frequency control by the SB
pin voltage. Thus, the output voltage increases (Soft-on).
After that, when FB pin voltage decrease to oscillation
stop threshold voltage, VFB(OFF) = 0.20 V, CSB is
discharged by ISB(SNK) = 10 µA and SB pin voltage
decreases. When the SB pin voltage decreases to
VSB(OFF) again, the IC stops switching operation. Thus,
the output voltage decreases (Soft-off).
The SB pin discharge time in the Soft-on and Soft-off
Function depends on the value of CSB. When the value
of CSB increases, the Soft-On/Soft-off Function makes
the peak drain current suppressed, and makes the burst
period longer. Thus, the output ripple voltage may
increase and/or the VCC pin voltage may decrease. If
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SSC3S927L
the VCC pin voltage decreases to VCC(BIAS) = 9.8 V, the
Bias Assist Function is always activated, and it results in
the increase of power loss (see Section 8.4).
Thus, it is necessary to adjust the value of CSB during
checking the input power, the output ripple voltage, and
the VCC pin voltage. The reference value of CSB is
about 0.001 μF to 0.1 μF.
U1
VGH
RV
DETECTOR
VS 15
VGL
Main
T1
16
VDS(L)
Cv
11
GND
10
8.10 Automatic Dead Time Adjustment
Function
The dead time is the period when both the high-side
and the low-side power MOSFETs are off.
As shown in Figure 8-23, if the dead time is shorter
than the voltage resonant period, the power MOSFET is
turned on and off during the voltage resonant operation.
In this case, the power MOSFET turned on/off in hard
switching operation, and the switching loss increases.
Low-side VDS(L) On
Q(L) D-S Voltage,
VDS(L)
On
Figure 8-24.
VS Pin and Dead Time Period
Q(H) Drain Current,
ID(H)
Flows through body
diode about 600 ns
Dead time
Loss increase by hard
switching operation
Voltage resonant period
Figure 8-23.
dv Off
dt
dt
Dead Time Period
VGL
VGH
Ci
ZVS Failure Operation Waveform
The Automatic Dead Time Adjustment Function is
the function that the ZVS (Zero Voltage Switching)
operation of Q(H) and Q(L) is controlled automatically by
the voltage resonant period detection of IC. The voltage
resonant period is varied by the power supply
specifications (input voltage and output power, etc.).
However, the power supply with this function is
unnecessary to adjust the dead time for each power
supply specification.
As shown in Figure 8-24, the VS pin detects the dv/dt
period of rising and falling of the voltage between drain
and source of the low-side power MOSFET, VDS(L), and
the IC sets its dead time to that period. This function
controls so that the high-side and the low-side power
MOSFETs are automatically switched to Zero Voltage
Switching (ZVS) operation. This function operates in the
period from td(MIN) = 0.24 µs to td(MAX) = 1.65 µs.
In minimum output power at maximum input voltage
and maximum output power at minimum input voltage,
the ZCS (Zero Current Switching) operation of IC (the
drain current flows through the body diode is about 600
ns as shown in Figure 8-25), should be checked based on
actual operation in the application.
Figure 8-25.
ZCS Check Point
8.11 Capacitive Mode Detection Function
The resonant power supply is operated in the
inductance area shown in Figure 8-26. In the capacitance
area, the power supply becomes the capacitive mode
operation (see Section 8.1). In order to prevent the
operation, the minimum oscillation frequency is needed
to be set higher than f0 on each power supply
specification. However, the IC has the capacitive mode
operation Detection Function kept the frequency higher
than f0. Thus, the minimum oscillation frequency setting
is unnecessary and the power supply design is easier. In
addition, the ability of transformer is improved because
the operating frequency can operate close to the resonant
frequency, f0.
The resonant current is detected by the RC pin, and
the IC prevents the capacitive mode operation. When the
capacitive mode is detected, the C7 connected to CL pin
is charged by ICL(SRC)1 = −17 μA. When the CL pin
voltage increases to VCL(OLP), the OLP is activated and
the switching operation stops. During the OLP operation,
the intermittent operation by UVLO is repeated (see
Section 8.18). The detection voltage is changed to
VRC1 = ±0.10 V or VRC2 = ±0.30 V depending on the load
as shown in Figure 8-28 and Figure 8-29. The
Capacitive Mode Operation Detection Function
operations as follows:
● Period in Which the Q(H) is On
Figure 8-27 shows the RC pin waveform in the
inductance area, and Figure 8-28 and Figure 8-29
shows the RC pin waveform in the capacitance area.
In the inductance area, the RC pin voltage doesn’t
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SSC3S927L
cross the plus side detection voltage in the downward
direction during the on period of Q(H) as shown in
Figure 8-27. On the contrary, in the capacitance area,
the RC pin voltage crosses the plus side detection
voltage in the downward direction. At this point, the
capacitive mode operation is detected. Thus, Q(H) is
turned off, and Q(L) is turned on, as shown in Figure
8-28 and Figure 8-29.
● Period in Which the Q(L) is On
Contrary to the above of Q(H), in the capacitance area,
the RC pin voltage crosses the minus side detection
voltage in the upward directiont during the on period
of Q(L) At this point, the capacitive mode operation is
detected. Thus, Q(L) is turned off and Q(H) is turned on.
As above, since the capacitive mode operation is
detected by pulse-by-pulse and the operating frequency
is synchronized with the frequency of the capacitive
mode operation, and the capacitive mode operation is
prevented. In addition to the adjusting method of ROCP,
C3, and R6 in Section 8.17, ROCP, C3, and R6 should be
adjusted so that the absolute value of the RC pin voltage
increases to more than |VRC2| = 0.30 V under the
condition caused the capacitive mode operation easily,
such as startup, turning off the mains input voltage, or
output shorted. The RC pin voltage must be within the
absolute maximum ratings of −6 to 6 V
Inductance area
Impedance
Capacitance area
Operating area
VDS(H)
OFF
ON
0
Capacitive mode
operation detection
RC Pin
Voltage +VRC2
+VRC1
0
Figure 8-28.
High-side Capacitive Mode Detection in
Light Load
VDS(H)
OFF
ON
0
Capacitive mode
operation detection
RC Pin
Voltage +VRC2
+VRC1
0
Figure 8-29.
High-side Capacitive Mode Detection in
Heavy Load
8.12 X-Capacitor Discharge Function
Generally, the line filter is set in the input circuit part
of power supply as shown in Figure 8-30.
The voltage across the X-capacitor, CX, must be
decreased to 37 % of the peak voltage of AC input in
one second to meet safety requirements such as
IEC60950. Thus, the discharge resistor, RDIS, is
connected in parallel with CX. While the AC input
voltage is applied, RDIS consumes power at all time. The
dissipation power of RDIS, PRDIS, is calculated as follows:
f0
Resonant Frequency
Hard switching
Sift switching
PRDIS =
VAC(RMS) 2
R DIS
(7)
where, VAC(RMS) is the effective value of AC input
voltage.
Uncontrollable operation
Figure 8-26.
Operating Area of Resonant Power
Supply
VDS(H)
OFF
ON
RC Pin
Voltage
When the combined resistance of RDIS is 1 MΩ and
the AC input voltage is 265 V, PRDIS becomes about 70
mW.
VAC
RDIS
CX
+VRC
Line Filter
0
Figure 8-30.
Figure 8-27.
Typical Line Filter Circuit
RC Pin Voltage in Inductance Area
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SSC3S927L
In order to remove RST and improve the circuit
efficiency, the IC has the X-capacitor Discharge
Function. As shown in Figure 8-31, DST1, DST2 and RST
are connected to the ST pin from AC input line.
When AC voltage is input and VSEN pin voltage
reaches to VSEN(ON) = 1.200 V at startup, the IC starts.
Then, following half-sinewaves are detected by two
threshold voltages of the VSEN pin, VSEN(OFF)1 = 1.000
V or VSEN(AC)1 = 2.70 V (see Figure 8-32). Thus the IC’s
X-Capacitor Discharge Function achieves the wide
range detection for universal specification.
When AC input voltage is cut off, the VSEN pin
voltage becomes practically constant and the VSEN pin
cannot detect the both threshold, VSEN(OFF)1 and VSEN(AC)1.
Then, the CD pin capacitor, CCD, is discharged by
ICD(SRC) = –10.2 μA, and the CD pin voltage increases.
When the CD pin voltage reaches to VCD1 = 3.0 V, the
X-capacitor is discharged by the constant current,
IST = 6.0 mA.
When the VSEN pin voltage becomes VSEN(OFF)1 or
VSEN(AC)1, each internal threshold voltage becomes
VSEN(OFF)2 = 0.8 V or VSEN(AC)2 = 2.4 V automatically.
Thus, the input voltage can be detected stably.
L1
DST2
IST
RST
CX
C1
18
R2
ST
DST1
R3
VSEN
1
8
C4
Figure 8-31.
R4
U1
CD
GND
CCD
10
ST Pin Peripheral Circuit
X-capacitor
discharge
ST Pin
Voltage
The time until the CD pin voltage reaches to VCD1
from the cutoff of AC input voltage is delay time, t DLY.
The maximum value of tDLY, tDLY_MAX, can be set by
the capacitor of CD pin and is calculated by Equation (9)
in Section 8.16.2.
The recommend value of RST is 5.6 kΩ to 10 kΩ.
RST is applied high voltage and are high resistance, the
following should be considered according to the
requirement of the application:
● Select a resistor designed against electromigration, or
● Use a combination of resistors in series for that to
reduce each applied voltage
8.13 Reset Detection Function
In the startup period, the feedback control for the
output voltage is inactive. If a magnetizing current may
not be reset in the on-period because of unbalanced
operation, a negative current may flow just before a
power MOSFET turns off. This causes a hard switching
operation, increases the stresses of the power MOSFET.
Where the magnetizing current means the circulating
current applied for resonant operation, and flows only
into the primary-side circuit. To prevent the hard
switching, the IC has the reset detection function.
Figure 8-34 shows the high-side operation and the
reference drain current waveforms in a normal resonant
operation and a reset failure operation. To prevent the
hard switching operation, the reset detection function
operates such as an on period is extended until the
absolute value of a RC pin voltage, |VRC1|, increases to
0.10 V or more. When the on period reaches the
maximum reset time, tRST(MAX) = 5 μs, the on-period
expires at that moment, i.e., the power MOSFET turns
off (see Figure 8-33).
VGH Pin
Voltage Low
High
VGL Pin High
Voltage
Low
Turning-on
in negative drain current
AC input voltage OFF
VSEN Pin
Voltage
VSEN(AC)1
Time
ID(H)
Reset failure waveform
VRC= +0.1V
0
VSEN(OFF)1
CD Pin
Voltage
Time
Expanded
on-period
tDLY
Normal on-period
tRST(MAX)
VCD1
Time
Figure 8-33.
Figure 8-32. Operational Waveform of X-capacitor
Discharge Function
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Reset Detection Operation Example
at High-side On Period
19
SSC3S927L
○ Normal resonant operation
B
ID(H)
C
● Reset failure operation
ID(H)
Magnetizing
current
Point D
VDS(H)=0V
A
Point A
VDS(H)=0V
Q(H)
Q(L)
Cv
Off
Ci
Lp
ID(H)
Cv
Ci
Point E
VDS(H)=0V
Q(H)
Lr
On
Q(L)
Q(L)
ID(H)
Off
Ci
Q(H)
Off
Lp
Q(L)
Lp
ID(H)
Cv
Ci
Point F
Q(H)
Lr
Lr
On
Lp
Cv
Point C
Recovery current
of body diode
ID(H)
Off
Lr
Lp
Q(L)
Cv
Ci
Turning on at VDS(L)= 0V results in soft-switching
Figure 8-34.
Lr
Q(L)
Q(H)
Off
E
D
Off
Lp
ID(H)
Point B
VDS(H)=0V
Off
0
Q(H)
Lr
Off
Off
F
On
Cv
Ci
Turning on at VDS(L) >> 0V results in hard-switching
Reference High-side Operation and Drain Current Waveforms in Normal Resonant Operation
and in Reset Failure Operation
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SSC3S927L
8.14 Overvoltage Protection (OVP)
When the voltage between the VCC pin and the GND
pin is applied to the OVP threshold voltage,
VCC(OVP) = 32.0 V, or more, the Overvoltage Protection
(OVP) is activated, and the IC stops switching operation
in protection mode. When the OVP activates, the Bias
Assist Function is disabled and VCC pin voltage
decreases. Then the VCC pin voltage decreases to
VCC(P.OFF) = 8.9 V, the Undervoltage Lockout (UVLO)
Function is activated, and the IC reverts to the state
before startup again.
After that, the startup circuit activates, and the VCC
pin voltage increases to VCC(ON) = 17.0 V, and the IC
starts operation. During the protection mode, restart and
stop are repeated. When the fault condition is removed,
the IC returns to normal operation automatically. When
the auxiliary winding supplies the VCC pin voltage, the
OVP is able to detect an excessive output voltage, such
as when the detection circuit for output control is open
in the secondary-side circuit because the VCC pin
voltage is proportional to the output voltage.
The output voltage of the secondary-side circuit at
OVP operation, VOUT(OVP), is approximately given as
below:
VOUT(OVP) =
VOUT(NORMAL)
× 32(V)
VCC(NORMAL)
pin voltage reaches to VCL(OLP) = 4.2 V, the IC stops
switching operation and restarts after decreasing to
VCC(OFF).
In this way, the intermittent operation by the CL pin
protection and the UVLO is repeated.
When the fault condition is removed, the IC returns to
normal operation automatically.
REG Pin Voltage
VREG(OVP)
0
RC Pin Voltage
VRC1 = ±0.10 V
0
VCC Pin Voltage
VCC(ON)
VCC(BIAS)
VCC(P.OFF)
0
CL Pin Voltage
Charged by ICL(SRC)2
VCL(OLP)
0
VGH/VGL
(8)
0
where, VOUT(NORMAL) is output voltage in normal
operation, and VCC(NORMAL) is VCC pin voltage in
normal operation
Figure 8-35.
REG_OVP Waveform
8.16 Input Voltage Detection Function
8.15 REG Overvoltage Protection
(REG_OVP)
The IC has REG Overvoltage Protection (REG_OVP)
for the overvoltage of the REG pin.
When the REG pin voltage increases to REG Pin
OVP Threshold Voltage, VREG(OVP) = 12.4 V, the
REG_OVP is activated, and the IC stops switching
operation and fixes the REG pin voltage to ground level.
When the REG_OVP activates, the Bias Assist
Function is disabled and VCC pin voltage decreases.
Then the VCC pin voltage decreases to VCC(P.OFF) = 8.9
V, the Undervoltage Lockout (UVLO) Function is
activated, and the IC reverts to the state before startup
again.
After that, the startup circuit activates, and the VCC
pin voltage increases. When the VCC pin voltage
reaches to VCC(ON) = 17.0 V, the IC starts operation and
the VCC pin voltage decreases. When the VCC pin
voltage decreases to VCC(BIAS), FB pin voltage increases
and switching operation starts.
When the switching operation starts at RC pin voltage
within VRC1 = ±0.10 V, C7 connected to CL pin is
rapidly charged by ICL(SRC)2 = −135 μA. When the CL
This function has the following:
▫ Input Overvoltage Protection (HVP)
▫ Input Undervoltage Protection (UVP)
This function turns on and off switching operation
according to the VSEN pin voltage detecting the AC
input voltage, and thus prevents excessive input current
and over heating. Section 8.16.1 shows HVP, Section
8.16.2 shows UVP. Figure 8-36 shows the pherepheral
circuit of VSEN pin. Figure 8-37 shows Input Voltage
Detection Function operational waveforms.
8.16.1 Input Overvoltage Protection (HVP)
When the AC input voltage increases from steady
state and the VSEN pin voltage reaches VSEN(HVP) = 5.6
V or more, Input Overvoltage Protection (HVP)
activates and the IC stops switching operation. During
the HVP operation, the intermittent operation by UVLO
is repeated (see Section 8.14). After that, when the AC
input voltage decreases and the VSEN pin voltage falls
to VSEN(HVP) or less, the IC starts switching operation.
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SSC3S927L
Because R2 and R3 are applied high voltage and are
high resistance, the following should be considered:
8.16.2 Input Undervoltage Protection
(UVP)
Even if the IC is in the operating state that the VCC
pin voltage is VCC(OFF) or more, when the AC input
voltage decreases from steady-state and the VSEN pin
voltage falls to VSEN(OFF)1 = 1.000 V or less for the delay
time, tDLY, the IC stops switching operation.
When the AC input voltage increases and the VSEN
pin voltage reaches VSEN(ON) = 1.200 V or more in the
operating state that the VCC pin voltage is VCC(OFF) or
more, the IC starts switching operation.
The maximum delay time, tDLY_MAX, can be calculated
by Equation (9).
t DLY_MAX =
VCD1 × CCD
● Select a resistor designed against electromigration
according to the requirement of the application, or
● Use a combination of resistors in series for that to
reduce each applied voltage.
The reference value of R2 is about 10 MΩ.
C4 shown in Figure 8-36 is for reducing noises. The
value is 1000 pF or more, and the reference value is
about 0.01 µF.
The value of R2, R3 and R4 and C4 should be
selected based on actual operation in the application.
L1
(9)
|ICD(SRC) |
Where,
VCD1 is CD Pin Threshold Voltage 1 (3.0 V),
CCD is the capacitance value of CD pin connected
capacitor (about 0.1µF to 0.47µF), and
ICD(SRC) is CD Pin Source Current (–10.2 μA)
DST2
CX
R2
DST1
C1
R3
RST
18
ST
VSEN
1
U1
8
For example, if CCD is 0.1µF,
t DLY_MAX
C4
R4
CD
GND
10
CCD
3.0 V × 0.1µF
=
≈ 29.4 ms
|– 10.2 μA|
Figure 8-36.
Neglecting the effect of both input resistance and
forward voltage of rectifier diode, the effective value of
AC input voltage when HVP and UVP are activated is
calculated as follows:
VAC(OP) =
1
√2
× VSEN(TH) × (1 +
R2 + R3
)
R4
VSEN Pin Pherepheral Circuit
VSEN Pin
Voltage
VSEN(HVP)
(10)
VSEN(ON)
VSEN(OFF)1
where,
VDC(OP) is the effective value of AC input voltage
when HVP and UVP are activated, and
VSEN(TH) is any one of threshold voltage of VSEN pin
(see Table 8-1).
Drain Current,
ID
tDLY
Table 8-1. VSEN Pin Threshold Voltage
Symbol
Value
(Typ.)
VSEN Pin HVP Threshold Voltage
VSEN(HVP)
5.6 V
VSEN Pin Threshold Voltage (On)
VSEN(OFF)1
1.000 V
VSEN Pin Threshold Voltage (Off)
VSEN(ON)
1.200 V
Parameter
Figure 8-37. Input Voltage Detection Function
Operational Waveforms
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SSC3S927L
8.17 Overcurrent Protection (OCP)
The Overcurrent Protection (OCP) detects the drain
current, ID, on pulse-by-pulse basis, and limits output
power. In Figure 8-38, this circuit enables the value of
C3 for shunt capacitor to be smaller than the value of Ci
for current resonant capacitor, and the detection current
through C3 is small. Thus, the loss of the detection
resistor, ROCP, is reduced, and ROCP is a small-sized one
available.
There is no convenient method to calculate the
accurate resonant current value according to the mains
input and output conditions, and others. Thus, ROCP, C3,
and C6 should be adjusted based on actual operation in
the application. The following is a reference adjusting
method of ROCP, C3, R6, and C8:
● C3 and ROCP
C3 is 100pF to 330pF (around 1 % of Ci value).
ROCP is around 100 Ω.
Given the current of the high side power MOSFET at
ON state as ID(H). ROCP is calculated Equation (11).
The detection voltage of ROCP is used the detection of
the capacitive mode operation (see Section 8.11).
Therefore, setting of ROCP and C3 should be taken
account of both OCP and the capacitive mode
operation.
R OCP ≈
|VRC(L) |
C3 + Ci
×(
)
ID(H)
C3
(11)
● R6 and C8 are for high frequency noise reduction.
R6 is 100 Ω to 470 Ω. C6 is 100 pF to 1000 pF.
Q(H)
VGH
VS
U1
16
Q(L)
VGL
CSS CL RC
5
6 7
T1
15
11
GND 10
Cv
I(H)
Ci
R6
C3
V, C6 connected to the CSS pin is discharged by
ICSS(L) = 1.8 mA. Thus, the switching frequency increases,
and the output power is limited. During discharging C6,
when the absolute value of the RC pin voltage decreases
to |VRC(L)| or less, the discharge stops.
Step II, RC Pin Threshold Voltage (High-speed),
VRC(S):
This step is active second. When the absolute value of
the RC pin voltage increases to more than |VRC(S) | = 2.80
V, the high-speed OCP is activated, and power
MOSFETs reverse on and off. At the same time, C6 is
discharged by ICSS(S) = 20.5 mA. Thus, the switching
frequency quickly increases, and the output power is
quickly limited. This step operates as protections for
exceeding overcurrent, such as the output shorted.
When the absolute value of the RC pin voltage
decreases to |VRC(S)| or less, the operation is changed to
the above Step I.
8.18 Overload Protection (OLP)
Figure 8-39 shows the Overload Protection (OLP)
waveforms.
When the absolute value of RC pin voltage increases
to |VRC(L)| = 1.90 V by increasing of output power, the
Overcurrent Protection (OCP) is activated. After that,
the C7 connected to CL pin is charged by I CL(SRC)1 = −17
μA. When the OCP state continues and CL pin voltage
increases to VCL(OLP), the OLP is activated.
When CL pin voltage becomes the threshold voltage
of OLP, VCL(OLP) = 4.2 V, the OLP is activated and the
switching operation stops. During the OLP operation,
the intermittent operation by UVLO is repeated (see
Section 8.14). When the fault condition is removed, the
IC returns to normal operation automatically.
RC Pin Voltage
VRC(L)
0
VRC(L)
CL Pin Voltage
VCL(OLP)
0
ROCP
R5 C6 C7 C8
Figure 8-38.
Charged by ICL(SRC)1
VCC Pin Voltage
RC Pin Peripheral Circuit
VCC(ON)
VCC(BIAS)
VCC(P.OFF)
0
The OCP operation has two-step threshold voltage as
follows:
VGH/VGL
0
Step I, RC Pin Threshold Voltage (Low), VRC(L):
This step is active first. When the absolute value of
the RC pin voltage increases to more than |VOC(L) | = 1.90
Figure 8-39.
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OLP Waveform
23
SSC3S927L
8.19 Thermal Shutdown (TSD)
9.1.5
When the junction temperature of the IC reach to the
Thermal Shutdown Temperature TJ(TSD) = 140 °C (min.),
Thermal Shutdown (TSD) is activated and the IC stops
switching operation. When the VCC pin voltage is
decreased to VCC(P.OFF) = 8.9 V or less and the junction
temperature of the IC is decreased to less than TJ(TSD),
the IC restarts.
During the protection mode, restart and stop are
repeated. When the fault condition is removed, the IC
returns to normal operation automatically.
The VGH and VGL pins are gate drive outputs for
external power MOSFETs. These peak source and sink
currents are –540 mA and 1.50 A, respectively.
To make a turn-off speed faster, connect the diode, DS,
as shown in Figure 9-1. When RA and DS is adjusted, the
following contents should be taken into account: the
power losses of power MOSFETs, gate waveforms (for
a ringing reduction caused by a pattern layout, etc.), and
EMI noises. To prevent the malfunctions caused by
steep dv/dt at turn-off of power MOSFETs, connect RGS
of 10 kΩ to 100 kΩ between the Gate and Source pins of
the power MOSFET with a minimal length of PCB
traces. When these gate resistances are adjusted, the gate
waveforms should be checked that the dead time is
ensured as shown in Figure 9-2.
9.
9.1
Design Notes
Gate Pin Peripheral Circuit
External Components
DS
Drain
Take care to use the proper rating and proper type of
components.
Gate
RA
RGS
9.1.1
Source
Input and output electrolytic
capacitors
Apply proper derating to a ripple current, a voltage,
and a temperature rise. It is required to use the high
ripple current and low impedance type electrolytic
capacitor that is designed for switch mode power
supplies.
Figure 9-1.
Power MOSFET Peripheral Circuit
High-side
Gate
Vth(min.)
9.1.2
Resonant transformer
Low-side
Gate
The resonant power supply uses the leakage
inductance of a transformer. Therefore, to reduce the
effect of the eddy current and the skin effect, the wire of
transformer should be used a bundle of fine litz wires.
9.1.3
9.1.4
Current resonant capacitor, Ci
Since a large resonant current flows through Ci, Ci
should be used a low loss and a high current capability
capacitor such as a polypropylene film capacitor. In
addition, Ci must be taken into account its frequency
characteristic because a high frequency current flows.
Dead time
Vth(min.)
Figure 9-2.
Current detection resistor, ROCP
To reduce the effect of the high frequency switching
current flowing through ROCP, choose the resister of a
low internal inductance type. In addition, its allowable
dissipation should be chosen suitable.
Dead time
9.2
Dead Time Confirmation
PCB Trace Layout and Component
Placement
The PCB circuit design and the component layout
significantly affect a power supply operation, EMI
noises, and power dissipation. Thus, to reduce the
impedance of the high frequency traces on a PCB (see
Figure 9-3), they should be designed as wide trace and
small loop as possible. In addition, ground traces should
be as wide and short as possible so that radiated EMI
levels can be reduced.
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SSC3S927L
short as possible to the GND pin at a single-point
ground (or star ground) that is separated from the
power ground.
3) VCC Trace
The trace for supplying power to the IC should be as
small loop as possible. If C3 and the IC are distant
from each other, a film capacitor Cf (about 0.1 μF to
1.0 μF) should be connected between the VCC and
GND pins with a minimal length of PCB traces.
Figure 9-3
High Frequency Current Loops
(Hatched Areas)
4) Trace of Peripheral Components for the IC Control
These components should be placed close to the IC,
and be connected to the corresponding pin of the IC
with as short trace as possible.
Figure 9-4 shows the circuit design example. The
PCB trace design should be also taken into account as
follows:
5) Trace of Bootstrap Circuit Components
These components should be connected to the IC pin
with as short trace as possible. In addition, the loop
for these should be as small as possible.
1) Main Circuit Trace
The main traces that switching current flows should
be designed as wide trace and small loop as possible.
6) Secondary Side Rectifier Smoothing Circuit Trace
The traces of the rectifier smoothing loops carry the
switching current. Thus it should be designed as wide
trace and small loop as possible.
2) Control Ground Trace
If the large current flows through a control ground, it
may cause varying electric potential of the control
ground; and this may result in the malfunctions of the
IC. Therefore, connect the control ground as close and
(1)Main trace should
be wide and short
CY
BR1
C1
R4
VAC
R3
R2
VSEN
Cf
C5
C9
PC1
1
18
2
17
3
16
4
15
5
14
(6)Main trace of
secondary side should
be wide and short
ST
C4
VCC
R8
FB
SB
CSB
R5
CSS
C6
CL
C7
C8
RC
ROCP
R6
(4)Peripheral
components for IC
control should
place near IC
SSC3S927L
CD
T1
U1
VGH
R10
VS
VB
C12
6
13
7
12
8
11
9
C52
Q(H)
R11
D4
CV
R12
D3
10
D54
REG
D6
VGL
(5)Boot strap trace should
be small loop
Q(L)
C11
Ci
R13
CCD
MODE
D53
D5
GND
C3
R14
D1
C10
A
Standby
signal
R1
C2
(2)GND trace for IC should be
connected at a single point
(3)Loop of VCC and C2 should be short
Figure 9-4
Peripheral Circuit Trace Example Around the IC
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SSC3S927L
10.
Pattern Layout Example
The following show the PCB pattern layout example and the schematic of circuit using SSC3S927L.
(5)Boot strap trace should be
small loop
(1)Main trace should be
wide and short
(6)Main trace of secondary side
should be wide and short
S3
Lp
S4
S1
S2
D
(2)GND trace for IC should be
connected at a single point
(4)Peripheral components for IC
control should placed near IC
Figure 10-1.
(3)Loop of VCC and C2
should be short
PCB Pattern Layout Example
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SSC3S927L
Main1
CN1
FP101
LX101
PSA50117_Rev.2.0
LX102
CY101
CX102
BD101
LP101
VR101
RX102
CP110
DP101
RX101
RX103
PFC OUT
6,7,8,9
(5,6,7,8)
1,2,3
(1,2)
DBH282312
(DBH332514)
CY102
CX101
DP102
RP102
CX103
RP106
12(13,14)
11
(12)
TH101
RP115
Main2
CP102 CP103
DP103
RP107
QP101
QP103
CP115
CP101
RP103
RP108
RP114
QP104
RP109
RP104
RP113
CP111
RP111 RP112
ZP101
SSC2016S
RP101
RP105
5 ZCD
CS 4
6 GND
COMP 3
7 OUT
CT 2
8 VCC
FB 1
PFC Vcc
QP102
STBY
ON/OFF
RP116
CP104
CP106
CP105
CP112 CP113
CP109
RP110
CP114
CP108
RP117
CP107
DM210
Main1
DM211
Main2
RM201
PFC OUT
T1
RM205
RM204
RM203
RM202
DM303
ZM201
SSC3S927L
CM201
QM201
1 VSEN
RM213
ST 18
CN602
(15, 16)
12
CM214
18Vout
S3
CM302
RM321
CM306
CM207
RM214
2 VCC
RM212
CM202
3 FB
VGH 16
4 SB
VS 15
CM203
5 CSS
VB 14
CM204
6 CL
CM205
7 RC
REG 12
RM211
8 CD
VGL 11
9 MODE
GND 10
1
(1,2)
DM202
RM210 RM209
DM203
CM210
QM202
CM215
DM204
RM216
RM310
RM215
(3,4)
2,3
CM301CM307
(11)
8
DM205
S1
DM301
12.8Vout
RM301
RM319
RM306
9 (12)
CM213
PC201
S2
CM211
CM216 CM217
RM206
CM208
CN601
CM303
RM217
C212
RM222
RM309
11
(14)
Lp
RM218
CCD
10 (13)
S4
DM304
QM203
Jumper
DM206
5
(7,8)
RM302
6,7
(9,10)
RM316
QM301
PC202
CM209
DM208
RM311
D
(5,6)
4
DBS3360
(TBS4016)
RM317
RM314
RM303 CM305
DM305
ZM301
RM308
QM302
PC201
POWER
_ON
QM303
PC202
RM219
CM206
CN603
RM313
RM312
RM318
RM208
RM322
CM304
DM302
RM207 DM207
RM220
RM320
RM307
CM310
RM305
RM315
RM304
DM209
CY203
Fault signal_1
Fault signal_2
Figure 10-2.
PCB Pattern Layout Example Circuit
SSC3S927L-DSE Rev.1.3
SANKEN ELECTRIC CO., LTD.
Nov. 29, 2023
https://www.sanken-ele.co.jp/en
© SANKEN ELECTRIC CO., LTD. 2019
27
SSC3S927L
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DSGN-CEZ-16003
SSC3S927L-DSE Rev.1.3
SANKEN ELECTRIC CO., LTD.
Nov. 29, 2023
https://www.sanken-ele.co.jp/en
© SANKEN ELECTRIC CO., LTD. 2019
28
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