Off-Line PWM Controllers with Integrated Power MOSFET
STR6A100xV/xVD Series
Data Sheet
Description
Package
The STR6A100xV/xVD series are power ICs for
switching power supplies, incorporating a MOSFET and
a current mode PWM controller IC.
The operating mode of the IC automatically changes
to green-mode or burst oscillation mode according to
load in order to improve the all load efficiency. The
product achieves high cost-performance power supply
systems with few external components.
DIP8
● Part Number
Features
● Improving Circuit Efficiency
(Since the step drive control can keep VRM of
secondary rectification diodes low, the circuit
efficiency can be improved by low VF)
● Current Mode Type PWM Control
● Soft Start Function
● Adjustable Standby Operating Point
No Load Power Consumption < 15 mW
● Operation Mode
Fixed Frequency: 65 kHz / 100 kHz
Green-Mode: 25 kHz to 65 kHz / 25 kHz to 100 kHz
Burst Oscillation Mode
● Random Switching Function
● Slope Compensation Function
● Leading Edge Blanking Function
● Bias Assist Function
● Protections
● Two Types of Overcurrent Protection (OCP): Pulseby-Pulse, built-in compensation circuit to minimize
OCP point variation on AC input voltage
Overload Protection with Timer (OLP): Auto-restart
Overvoltage Protection (OVP): Latched shutdown or
auto-restart
Thermal Shutdown (TSD): Latched shutdown or autorestart*
*With hysteresis
Typical Application
VAC
BR1
D51
T1
P
C1
ROCP
C4
U1
1
2
C3
3
S/OCP
D/ST
BA
D/ST
GND
C51
8
S
7
NC
RBA
Not to Scale
Selection Guide
FB/OLP
(1) (2)
(1) Frequency
M is 65 kHz.
H is 100 kHz.
(2) OVP and TSD operation
D is auto-restart.
None is latched shutdown.
• Electrical Characteristics
Part Number
STR6A153MV
STR6A153MVD
STR6A163HVD (1)
STR6A161HV
STR6A161HVD
STR6A169HVD
STR6A168HV
STR6A168HVD
RDS(ON)(max.)
VDSS(min.)
fOSC(AVG)
1.9 Ω
650 V
65 kHz
700 V
100 kHz
2.3 Ω
3.95 Ω
6.0 Ω
10 Ω
● Output Power, POUT (2)
Part Number
STR6A153MV
STR6A153MVD
STR6A163HVD
STR6A161HV
STR6A161HVD
STR6A169HVD
STR6A168HV
STR6A168HVD
Adapter
AC85
AC230V
~265V
Open Frame
AC85
AC230V
~265V
26 W
21 W
40 W
28 W
25 W
20 W
40 W
28 W
20.5 W
15 W
35 W
23.5 W
17 W
11 W
30 W
19.5 W
14 W
8W
24 W
14 W
Application
●
●
●
●
●
White Goods
Office Automation Equipment
Audio Visual Equipment
Industrial Equipment
Other Switched-Mode Power Supply
(1)
Under development
The output power is actual continues power that is measured
at 50 °C ambient. The peak output power can be 120 to
140 % of the value stated here. Core size, ON Duty, and
thermal design affect the output power. It may be less than
the value stated here.
D2
5
4
STR6A1××HVD
VCC
STR6A100×V
C2
(2)
D
PC1
CY
TC_STR6A100xV_1_R2
STR6A100xV/xVD-DSJ Rev.3.2
SANKEN ELECTRIC CO., LTD.
Sep. 07, 2022
https://www.sanken-ele.co.jp/en/
© SANKEN ELECTRIC CO., LTD. 2014
1
STR6A100xV/xVD Series
Contents
Description ------------------------------------------------------------------------------------------------------ 1
Contents --------------------------------------------------------------------------------------------------------- 2
1. Absolute Maximum Ratings----------------------------------------------------------------------------- 4
2. Electrical Characteristics -------------------------------------------------------------------------------- 5
3. Performance Curves -------------------------------------------------------------------------------------- 7
3.1. Derating Curves ------------------------------------------------------------------------------------- 7
3.2. MOSFET Safe Operating Area Curves --------------------------------------------------------- 8
3.3. Transient Thermal Resistance Curves -------------------------------------------------------- 10
4. Block Diagram ------------------------------------------------------------------------------------------- 12
5. Pin Configuration Definitions ------------------------------------------------------------------------- 12
6. Typical Application ------------------------------------------------------------------------------------- 13
7. Physical Dimensions ------------------------------------------------------------------------------------ 13
8. Marking Diagram --------------------------------------------------------------------------------------- 14
9. Operational Description ------------------------------------------------------------------------------- 15
9.1. Startup Operation --------------------------------------------------------------------------------- 15
9.2. Undervoltage Lockout (UVLO) ---------------------------------------------------------------- 15
9.3. Bias Assist Function------------------------------------------------------------------------------- 15
9.4. Soft Start Function -------------------------------------------------------------------------------- 16
9.5. Constant Output Voltage Control-------------------------------------------------------------- 16
9.6. Leading Edge Blanking Function -------------------------------------------------------------- 17
9.7. Random Switching Function -------------------------------------------------------------------- 17
9.8. Step Drive Control -------------------------------------------------------------------------------- 17
9.9. Operation Mode ----------------------------------------------------------------------------------- 18
9.10. Overcurrent Protection (OCP) ----------------------------------------------------------------- 19
9.10.1. OCP Operation ------------------------------------------------------------------------------ 19
9.10.2. OCP Input Compensation Function ----------------------------------------------------- 19
9.11. Overload Protection (OLP) ---------------------------------------------------------------------- 20
9.12. Overvoltage Protection (OVP) ------------------------------------------------------------------ 20
9.12.1. Latched Shutdown Type ------------------------------------------------------------------- 21
9.12.2. Auto-restart Type --------------------------------------------------------------------------- 21
9.13. Thermal Shutdown (TSD) ----------------------------------------------------------------------- 21
9.13.1. Latched Shutdown Type ------------------------------------------------------------------- 21
9.13.2. Auto-restart Type --------------------------------------------------------------------------- 21
10. Design Notes ---------------------------------------------------------------------------------------------- 22
10.1. External Components ---------------------------------------------------------------------------- 22
10.1.1. Input and Output Electrolytic Capacitor ----------------------------------------------- 22
10.1.2. S/OCP Pin Peripheral Circuit ------------------------------------------------------------ 22
10.1.3. BA Pin Peripheral Circuit ----------------------------------------------------------------- 22
10.1.4. FB/OLP Pin Peripheral Circuit ---------------------------------------------------------- 22
10.1.5. VCC Pin Peripheral Circuit --------------------------------------------------------------- 22
10.1.6. Snubber Circuit ------------------------------------------------------------------------------ 22
10.1.7. Phase Compensation ------------------------------------------------------------------------ 23
10.1.8. Transformer ---------------------------------------------------------------------------------- 23
10.2. PCB Trace Layout and Component Placement --------------------------------------------- 24
11. Pattern Layout Example ------------------------------------------------------------------------------- 25
12. Reference Design of Power Supply ------------------------------------------------------------------ 26
12.1. Circuit Specifications ----------------------------------------------------------------------------- 26
12.2. Circuit Schematic --------------------------------------------------------------------------------- 26
12.3. Transformer Specification ----------------------------------------------------------------------- 26
STR6A100xV/xVD-DSJ Rev.3.2
SANKEN ELECTRIC CO., LTD.
Sep. 07, 2022
https://www.sanken-ele.co.jp/en/
© SANKEN ELECTRIC CO., LTD. 2014
2
STR6A100xV/xVD Series
12.4. Bill of Materials ------------------------------------------------------------------------------------ 27
Important Notes ---------------------------------------------------------------------------------------------- 28
STR6A100xV/xVD-DSJ Rev.3.2
SANKEN ELECTRIC CO., LTD.
Sep. 07, 2022
https://www.sanken-ele.co.jp/en/
© SANKEN ELECTRIC CO., LTD. 2014
3
STR6A100xV/xVD Series
1.
Absolute Maximum Ratings
Current polarities are defined as follows: a current flow going into the IC (sinking) is positive current (+); and a
current flow coming out of the IC (sourcing) is negative current (−).
Unless otherwise specified, TA = 25 °C, 7 pin = 8 pin.
Parameter
Symbol
Conditions
Pins
Rating
Unit
STR6A153MV/MVD
STR6A163HVD
4.0
Drain Peak Current (1)
Maximum Drain Current
Avalanche Energy(2)(3)
IDPEAK
IDMAX
EAS
Single pulse
TA =
− 40 ~ 125 °C
8−1
8−1
2.5
A
STR6A161HV/HVD
1.8
STR6A169HVDSTR6
A168HV/HVD
4.0
STR6A153MV/MVD
STR6A163HVD
2.5
A
STR6A161HV/HVD
1.8
STR6A169HVDSTR6
A168HV/HVD
ILPEAK = 2.2 A
57
STR6A153MV/MVD
ILPEAK = 2.15 A
53
STR6A163HVD
ILPEAK = 1.78 A
8–1
36
mJ
STR6A161HV/HVD
ILPEAK = 1.8 A
24
STR6A169HVD
ILPEAK = 1.4 A
22
STR6A168HV/HVD
VS/OCP
1−3
−2 to 6
V
BA Pin Voltage
VBA
2−3
−0.3 to 7.5
V
BA Pin Sink Current
IBA
2−3
1.0
mA
FB/OLP Pin Voltage
VFB
4−3
−0.3 to 14
V
FB/OLP Pin Sink Current
IFB
4−3
1.0
mA
VCC Pin Voltage
VCC
5−3
−0.3 to 32
V
D/ST Pin Voltage
VD/ST
8−3
−1 to VDSS
V
8−1
1.35
W
S/OCP Pin Voltage
Remarks
MOSFET Power Dissipation(4)
PD1
(5)
Control Part Power Dissipation
PD2
5−3
1.2
W
Operating Ambient Temperature
TOP
—
−40 to 125
°C
Storage Temperature
Tstg
—
−40 to 125
°C
Junction Temperature
Tj
—
150
°C
(1)
See Section 3.2, MOSFET Safe Operating Area Curves.
See Figure 3-2. Avalanche Energy Derating Coefficient Curve
(3)
Single pulse, VDD = 99 V, L = 20 mH.
(4)
See Section Figure 3-3 TA-PD1Curve.
(5)
When embedding this hybrid IC onto the printed circuit board (copper area in a 15 mm × 15 mm).
(2)
STR6A100xV/xVD-DSJ Rev.3.2
SANKEN ELECTRIC CO., LTD.
Sep. 07, 2022
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© SANKEN ELECTRIC CO., LTD. 2014
4
STR6A100xV/xVD Series
2.
Electrical Characteristics
Current polarities are defined as follows: a current flow going into the IC (sinking) is positive current (+); and a
current flow coming out of the IC (sourcing) is negative current (−).
Unless otherwise specified, TA = 25 °C, VCC = 18 V, 7 pin = 8 pin.
Parameter
Symbol
Conditions
Pins
Min.
Typ.
Max.
Unit
Remarks
Power Supply Startup Operation
Operation Start Voltage
VCC(ON)
5−3
13.8
15.0
16.2
V
Operation Stop Voltage*
VCC(OFF)
5−3
7.6
8.5
9.2
V
5−3
—
1.5
3.0
mA
8–3
40
47
55
V
5−3
−4.05
−2.50
−1.08
mA
8.0
9.6
10.5
V
58
65
72
90
100
110
—
5.4
—
—
8.4
—
4−3
−170
−130
−85
µA
IFB(MIN)
4−3
−21
−13
−5
µA
VFB(FDS)
fOSC(AVG) × 0.9 4 − 3
2.64
3.30
3.96
2.88
3.60
4.32
VFB(FDE)
2.40
3.00
3.60
fOSC(MIN) × 1.1
2.48
3.10
3.72
18
25
32
1.17
1.28
1.39
1.24
1.35
1.46
1.50
1.63
1.76
1.65
1.79
1.93
1.78
1.92
2.06
2.01
2.16
2.31
2.02
2.17
2.32
2.29
2.45
2.61
Circuit Current in Operation
Startup Circuit Operation
Voltage
Startup Current
Startup Current Biasing
Threshold Voltage*
Normal Operation
Average Switching
Frequency
Switching Frequency
Modulation Deviation
Maximum Feedback
Current
Minimum Feedback
Current
Light Load Operation
FB/OLP Pin Starting
Voltage of Frequency
Decreasing
FB/OLP Pin Ending
Voltage of Frequency
Decreasing
Minimum Switching
Frequency
Standby Operation
ICC(ON)
VCC = 12 V
VST(ON)
ICC(ST)
VCC = 13.5 V
VCC(BIAS)
ICC = −500 µA 5 − 3
fOSC(AVG)
8–3
Δf
8−3
IFB(MAX)
VCC = 12 V
4−3
8−3
fOSC(MIN)
FB/OLP Pin Oscillation
Stop Threshold Voltage 1
VFB(OFF1)
RBA: Short
FB/OLP Pin Oscillation
Stop Threshold Voltage 2
VFB(OFF2)
RBA: Open
FB/OLP Pin Oscillation
Stop Threshold Voltage 3
VFB(OFF3)
RBA: 330 kΩ
FB/OLP Pin Oscillation
Stop Threshold Voltage 4
VFB(OFF4)
RBA: 68 kΩ
4−3
4−3
4−3
4−3
STR6A153MV/MVD
kHz
STR6A16xHV/HVD
STR6A153MV/MVD
kHz
STR6A16xHV/HVD
STR6A153MV/MVD
V
STR6A16xHV/HVD
STR6A153MV/MVD
V
STR6A16xHV/HVD
kHz
STR6A153MV/MVD
V
STR6A16xHV/HVD
STR6A153MV/MVD
V
STR6A16xHV/HVD
STR6A153MV/MVD
V
STR6A16xHV/HVD
STR6A153MV/MVD
V
STR6A16xHV/HVD
* VCC(BIAS) > VCC(OFF) always.
STR6A100xV/xVD-DSJ Rev.3.2
SANKEN ELECTRIC CO., LTD.
Sep. 07, 2022
https://www.sanken-ele.co.jp/en/
© SANKEN ELECTRIC CO., LTD. 2014
5
STR6A100xV/xVD Series
Parameter
Symbol
Conditions
Pins
Min.
Typ.
Max.
Unit
DMAX
8−3
70
75
80
%
tBW
—
—
330
—
ns
DPC
—
—
17.3
—
—
25.8
—
Remarks
Protection
Maximum ON Duty
Leading Edge Blanking
Time
OCP Compensation
Coefficient
OCP Compensation ON
Duty
OCP Threshold Voltage at
Zero ON Duty
OCP Threshold Voltage at
36% ON Duty
OCP Threshold Voltage in
Leading Edge Blanking
Time
OLP Threshold Voltage
mV/μs
STR6A153MV/MVD
STR6A16xHV/HVD
DDPC
—
—
36
—
%
VOCP(L)
1−3
0.735
0.795
0.855
V
VOCP(H)
1−3
0.843
0.888
0.933
V
VOCP(LEB)
1−3
—
1.69
—
V
VFB(OLP)
4−3
6.8
7.3
7.8
V
tOLP
4−3
55
75
90
ms
ICC(OLP)
5−3
—
260
—
µA
FB/OLP Pin Clamp Voltage VFB(CLAMP)
4−3
10.5
11.8
13.5
V
OVP Threshold Voltage
Thermal Shutdown
Operating Temperature
Thermal Shutdown
Temperature Hysteresis
MOSFET
VCC(OVP)
5−3
27.0
29.1
31.2
V
Tj(TSD)
—
127
145
—
°C
Tj(TSD)HYS
—
—
80
—
°C
650
—
—
700
—
—
—
—
300
—
—
1.9
STR6A153MV/MVD
—
—
2.3
STR6A163HVD
—
—
3.95
—
—
6.0
STR6A169HVD
—
—
10
STR6A168HV/HVD
OLP Delay Time
OLP Operation Current
Drain-to-Source Breakdown
Voltage
VDSS
IDS = 300 µA
Drain Leakage Current
IDSS
VDS = VDSS
On-Resistance
Switching Time
RDS(ON)
IDS = 0.4 A
8−1
8−1
8−1
STR6A153MVD
STR6A16xHVD
STR6A153MV/MVD
V
STR6A16xHV/HVD
µA
Ω
tf
8−1
—
—
250
ns
θj-C
—
—
—
22
°C/W
STR6A161HV/HVD
Thermal Resistance
Junction to Case
STR6A100xV/xVD-DSJ Rev.3.2
SANKEN ELECTRIC CO., LTD.
Sep. 07, 2022
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© SANKEN ELECTRIC CO., LTD. 2014
6
STR6A100xV/xVD Series
3.
Performance Curves
3.1.
Derating Curves
100
EAS Temperature Derating Coefficient (%)
Safe Operating Area
Temperature Derating Coefficient (%)
100
80
60
40
20
80
60
40
20
0
0
0
25
50
75
100
125
150
25
75
100
125
150
Junction Temperature, TJ (°C)
Ambient Temperature, TA (°C )
Figure 3-1.
50
SOA Temperature Derating Coefficient
Curve
Figure 3-2.
Avalanche Energy Derating Coefficient
Curve
1.6
PD1=1.35W
Power Dissipation, PD1 (W)
1.4
1.2
1
0.8
0.6
0.4
0.2
0
0
25
50
75
100
125
150
Ambient Temperature, TA (°C )
Figure 3-3.
Ambient Temperature versus Power
Dissipation Curve
STR6A100xV/xVD-DSJ Rev.3.2
SANKEN ELECTRIC CO., LTD.
Sep. 07, 2022
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7
STR6A100xV/xVD Series
3.2.
MOSFET Safe Operating Area Curves
When the IC is used, the safe operating area curve should be multiplied by the temperature derating coefficient
derived from Figure 3-1.
The broken line in the safe operating area curve is the drain current curve limited by on-resistance.
Unless otherwise specified, TA = 25 °C and single pulse input.
1
1ms
0.1
0.01
0.1ms
Drain Current, ID (A)
Drain Current, ID (A)
0.1ms
1
1ms
0.1
0.01
1
10
100
1000
1
10
Drain to Source Voltage (V)
Figure 3-4.
100
1000
Drain to Source Voltage (V)
STR6A153MV/MVD SOA Curve
Figure 3-5.
STR6A163HVD SOA Curve
S_STR6A169HVD_R1
S_STR6A161HVD_R1
1
Drain Current, ID (A)
10
10
Drain Current, ID (A)
S_STR6A163HVD_R1
10
S_STR6A153MV_R1
10
1
0.1
0.1
0.01
0.01
1
10
100
1000
1
STR6A161HV/HVD SOA Curve
100
1000
Drain-to-Source Voltage (V)
Drain-to-Source Voltage (V)
Figure 3-6.
10
Figure 3-7.
STR6A100xV/xVD-DSJ Rev.3.2
SANKEN ELECTRIC CO., LTD.
Sep. 07, 2022
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© SANKEN ELECTRIC CO., LTD. 2014
STR6A169HVD SOA Curve
8
STR6A100xV/xVD Series
Drain Current, ID (A)
S_STR6A168HVD_R1
10
1
0.1
0.01
1
10
100
1000
Drain-to-Source Voltage (V)
Figure 3-8.
STR6A168HV/HVD SOA Curve
STR6A100xV/xVD-DSJ Rev.3.2
SANKEN ELECTRIC CO., LTD.
Sep. 07, 2022
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© SANKEN ELECTRIC CO., LTD. 2014
9
STR6A100xV/xVD Series
3.3.
Transient Thermal Resistance Curves
TR_STR6A153MV/63HVD_R1
Transient Thermal Resistance,
θJ-C (°C/W)
100
10
1
0.1
0.01
1µ
10µ
100µ
1m
10m
100m
1s
Time (s)
Figure 3-9.
STR6A153MV, STR6A153MVD and STR6A163HVD Transient Thermal Resistance Curve
TR_STR6A161HVD_R1
Transient Thermal Resistance,
θJ-C (°C/W)
100
10
1
0.1
0.01
1µ
10µ
100µ
1m
10m
100m
1s
Time (s)
Figure 3-10.
STR6A161HV/HVD Transient Thermal Resistance Curve
STR6A100xV/xVD-DSJ Rev.3.2
SANKEN ELECTRIC CO., LTD.
Sep. 07, 2022
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© SANKEN ELECTRIC CO., LTD. 2014
10
STR6A100xV/xVD Series
TR_STR6A169HVD_R1
Transient Thermal Resistance
θJ-C (°C/W)
100
10
1
0.1
0.01
1µ
10µ
100µ
1m
10m
100m
1s
100m
1s
Time (s)
Figure 3-11.
STR6A169HVD Transient Thermal Resistance Curve
TR_STR6A168HVD_R1
Transient Thermal Resistance
θJ-C (°C/W)
100
10
1
0.1
0.01
1µ
10µ
Figure 3-12.
100µ
1m
Time (s)
10m
STR6A168HV/HVD Transient Thermal Resistance Curve
STR6A100xV/xVD-DSJ Rev.3.2
SANKEN ELECTRIC CO., LTD.
Sep. 07, 2022
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© SANKEN ELECTRIC CO., LTD. 2014
11
STR6A100xV/xVD Series
4.
Block Diagram
VCC
5
Startup
UVLO
BA
2
Reg.
VREG
OVP
TSD
Auto Standby
Adjustment
PWM OSC
D/ST
7, 8
Driver
S Q
R
OCP
VREG
VCC
Drain Peak Current
Compensation
OLP
Feedback
Control
FB/OLP
4
LEB
S/OCP
1
GND
3
Slope
Compensation
BD_STR6A100xV_R1
5.
Pin Configuration Definitions
Pin
Name
S/OCP
1
8
D/ST
1
S/OCP
BA
2
7
D/ST
2
BA
3
GND
GND
3
6
4
FB/OLP
FB/OLP
4
5
5
VCC
6
−
VCC
7
8
D/ST
Descriptions
MOSFET source and Overcurrent Protection
(OCP) signal input
Input of selectable standby operation point signal
Ground
Constant voltage control signal input and
Overload Protection (OLP) signal input
Power supply voltage input for control part and
Overvoltage Protection (OVP) signal input
(Pin removed)
MOSFET drain and startup current input
STR6A100xV/xVD-DSJ Rev.3.2
SANKEN ELECTRIC CO., LTD.
Sep. 07, 2022
https://www.sanken-ele.co.jp/en/
© SANKEN ELECTRIC CO., LTD. 2014
12
STR6A100xV/xVD Series
6.
Typical Application
The PCB traces for D/ST pins should be as wide as possible, in order to improve thermal release capability.
In applications having a power supply specified such that D/ST pin has large transient surge voltages, a clamp
snubber circuit of a capacitor-resistor-diode (CRD) combination should be added on the primary winding P, or a
damper snubber circuit of a capacitor (C) or a resistor-capacitor (RC) combination should be added between the D/ST
pin and the S/OCP pin.
CRD clamp snubber
C(RC)
damper snubber
BR1
VAC
VOUT
(+)
R54
R1
C6
C1
L51
D51
T1
PC1
C5
P
R55
C51
D1
U1
ROCP
1
RBA
2
C4
BA
GND
D/ST
FB/OLP
C53
C52 R53
7
D2
R2
U51
R56
(-)
5
4
C3
D/ST
R52
8
NC
3
S/OCP
S
R51
C2
D
VCC
STR6A100×V
PC1
CY
TC_STR6A100xV_2_R1
Figure 6-1.
7.
Typical Application
Physical Dimensions
● DIP8
NOTES
● Dimensions in millimeters
● Pb-free (RoHS compliant)
STR6A100xV/xVD-DSJ Rev.3.2
SANKEN ELECTRIC CO., LTD.
Sep. 07, 2022
https://www.sanken-ele.co.jp/en/
© SANKEN ELECTRIC CO., LTD. 2014
13
STR6A100xV/xVD Series
8.
Marking Diagram
STR6A100xV
8
6A1xxx
S KY MD V
1
Specific Device Code (See Table 8-1)
Lot Number:
Y is the last digit of the year of manufacture (0 to 9)
M is the month of the year (1 to 9, O, N or D)
D is a period of days,
1: the first 10 days of the month (1 st to 10 th)
2: the second 10 days of the month (11 th to 20 th)
3: the last 10-11 days of the month (21 st to 31 st)
Control Number
STR6A100xVD
8
6A1xxx
Specific Device Code (See Table 8-1)
S KY MD V D
1
Lot Number:
Y is the last digit of the year of manufacture (0 to 9)
M is the month of the year (1 to 9, O, N or D)
D is a period of days,
1: the first 10 days of the month (1 st to 10 th)
2: the second 10 days of the month (11 th to 20 th)
3: the last 10-11 days of the month (21 st to 31 st)
Control Number
Table 8-1. Specific Device Code
Specific Device Code
Part Number
6A153MV
STR6A153MV
6A161HV
STR6A161HV
6A168HV
STR6A168HV
6A153MVD
STR6A153MVD
6A161HVD
STR6A161HVD
6A163HVD
STR6A163HVD
6A168HVD
STR6A168HVD
6A169HVD
STR6A169HVD
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STR6A100xV/xVD Series
9.
Operational Description
VCC pin
voltage
VCC(ON)
All of the parameter values used in these descriptions
are typical values, unless they are specified as minimum
or maximum. Current polarities are defined as follows: a
current flow going into the IC (sinking) is positive
current (+); and a current flow coming out of the IC
(sourcing) is negative current (−).
9.1.
tSTART
Drain current,
ID
Startup Operation
Figure 9-2.
Figure 9-1 shows the circuit around IC.
The IC incorporates the startup circuit. The circuit is
connected to D/ST pin. When D/ST pin voltage reaches
to Startup Circuit Operation Voltage VST(ON) = 47 V, the
startup circuit starts operation.
During the startup process, the constant current,
ICC(ST) = −2.50 mA, charges C2 at VCC pin. When VCC
pin voltage increases to VCC(ON) = 15.0 V, the control
circuit starts operation. During the IC operation, the
voltage rectified the auxiliary winding voltage, V D, of
Figure 9-1 becomes a power source to the VCC pin.
After switching operation begins, the startup circuit turns
off automatically so that its current consumption
becomes zero.
9.2.
Undervoltage Lockout (UVLO)
Figure 9-3 shows the relationship of VCC pin voltage
and circuit current ICC. When VCC pin voltage decreases
to VCC(OFF) = 8.5 V, the control circuit stops operation by
Undervoltage Lockout (UVLO) circuit, and reverts to the
state before startup.
Circuit Current, ICC
Stop
VCC(BIAS) (max. ) < VCC < VCC(OVP) (min. )
⇒ 10.5 (V) < VCC < 27.0 (V)
(1)
VCC(OFF)
The startup time of IC is determined by C2 capacitor
value. The approximate startup time tSTART (shown in
Figure 9-2) is calculated as follows:
t START = C2 ×
Start
VCC(ON)
VCC Pin
Voltage
Figure 9-3. Relationship between
VCC Pin Voltage and ICC
VCC(ON) − VCC(INT)
|ICC(ST) |
(2)
where,
tSTART is startup time of IC (s), and
VCC(INT) is initial voltage on VCC pin (V).
BR1
T1
VAC
C1
U1
Startup Operation
7, 8
D/ST
VCC
5
D2
C2
GND
Figure 9-1.
P
R2
VD
D
3
9.3.
Bias Assist Function
By the Bias Assist Function, the startup failure is
prevented. The Bias Assist Function is activated, in both
of following condition:
the FB pin voltage is FB/OLP Pin Oscillation Stop
Threshold Voltage, VFB(OFF) or less
and the VCC voltage decreases to the Startup Current
Biasing Threshold Voltage, VCC(BIAS) = 9.6 V.
When the Bias Assist Function is activated, the VCC
pin voltage is kept almost constant voltage, VCC(BIAS) by
providing the startup current, ICC(ST), from the startup
circuit. Thus, the VCC pin voltage is kept more than
VCC(OFF).
Since the startup failure is prevented by the Bias Assist
Function, the value of C2 connected to VCC pin can be
small. Thus, the startup time and the response time of the
OVP become shorter.
VCC pin Peripheral Circuit
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STR6A100xV/xVD Series
The operation of the Bias Assist Function in startup is
as follows. It is necessary to check and adjust the startup
process based on actual operation in the application, so
that poor starting conditions may be avoided.
Figure 9-4 shows VCC pin voltage behavior during the
startup period.
After VCC pin voltage increases to VCC(ON) = 15.0 V at
startup, the IC starts the operation. Then circuit current
increases and VCC pin voltage decreases. At the same
time, the auxiliary winding voltage VD increases in
proportion to output voltage. These are all balanced to
produce VCC pin voltage.
When VCC pin voltage is decrease to VCC(OFF) = 8.5 V
in startup operation, the IC stops switching operation and
a startup failure occurs.
When the output load is light at startup, the output
voltage may become more than the target voltage due to
the delay of feedback circuit. In this case, the FB pin
voltage is decreased by the feedback control. When the
FB pin voltage decreases to VFB(OFF) or less, the IC stops
switching operation and VCC pin voltage decreases.
When VCC pin voltage decreases to VCC(BIAS), the Bias
Assist Function is activated and the startup failure is
prevented.
In case tLIM is longer than the OLP Delay Time, t OLP,
the output power is limited by the Overload Protection
(OLP).
Thus, it is necessary to adjust the value of output
capacitor and the turn ratio of auxiliary winding D so that
the tLIM is less than tOLP = 55 ms (min.).
VCC pin
voltage
Startup of IC Startup of SMPS
Normal opertion
tSTART
VCC(ON)
VCC(OFF)
Time
D/ST pin
current, ID
Time
Startup success
Target operating
voltage
Increase with rising of
output voltage
Bias assist period
VCC(OFF)
Startup failure
Time
9.4.
VCC and ID Waveforms during Startup
IC starts operation
VCC(ON)
VCC(BIAS)
Figure 9-4.
Limited by OCP operation
tLIM < tOLP (min.)
Figure 9-5.
VCC Pin
Voltage
Soft start period
approximately 8.75 ms (fixed)
VCC pin Voltage during Startup Period
Soft Start Function
Figure 9-5 shows the behavior of VCC pin voltage and
drain current during the startup period.
The IC activates the soft start circuitry during the
startup period. Soft start time is fixed to around 8.75 ms.
during the soft start period, over current threshold is
increased step-wisely (7 steps). This function reduces the
voltage and the current stress of MOSFET and secondary
side rectifier diode.
Since the Leading Edge Blanking Function (see
Section 9.6) is deactivated during the soft start period,
there is the case that ON time is less than the leading
edge blanking time, tBW = 330 ns.
After the soft start period, D/ST pin current, ID, is
limited by the Overcurrent Protection (OCP), until the
output voltage increases to the target operating voltage.
This period is given as tLIM.
9.5.
Constant Output Voltage Control
The IC achieves the constant voltage control of the
power supply output by using the current-mode control
method, which enhances the response speed and provides
the stable operation.
The FB/OLP pin voltage is internally added the slope
compensation at the feedback control (see Section
4.Block Diagram), and the target voltage, VSC, is
generated. The IC compares the voltage, VROCP, of a
current detection resistor with the target voltage, V SC, by
the internal FB comparator, and controls the peak value
of VROCP so that it gets close to VSC, as shown in Figure
9-6 and Figure 9-7.
• Light Load Conditions
When load conditions become lighter, the output
voltage, VOUT, increases. Thus, the feedback current
from the error amplifier on the secondary-side also
increases. The feedback current is sunk at the FB/OLP
pin, transferred through a photo-coupler, PC1, and the
FB/OLP pin voltage decreases. Thus, VSC decreases,
and the peak value of VROCP is controlled to be low,
and the peak drain current of ID decreases.
This control prevents the output voltage from
increasing.
• Heavy Load Conditions
When load conditions become greater, the IC performs
the inverse operation to that described above. Thus,
VSC increases and the peak drain current of I D
increases.
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STR6A100xV/xVD Series
This control prevents the output voltage from
decreasing.
Target voltage
without Slope Compensation
U1
S/OCP
1
GND
3
FB/OLP
4
PC1
ROCP
VROCP
C3
tON1
IFB
T
Figure 9-6.
-
VSC
+
VROCP
FB Comparator
Voltage on both
sides of ROCP
Drain Current,
ID
Figure 9-7. Drain Current, ID, and FB Comparator
Operation in Steady Operation
In the current mode control method, when the drain
current waveform becomes trapezoidal in continuous
operating mode, even if the peak current level set by the
target voltage is constant, the on-time fluctuates based on
the initial value of the drain current.
This results in the on-time fluctuating in multiples of
the fundamental operating frequency as shown in Figure
9-8. This is called the subharmonics phenomenon.
In order to avoid this, the IC incorporates the Slope
Compensation Function. Because the target voltage is
added a down-slope compensation signal, which reduces
the peak drain current as the on-duty gets wider relative
to the FB/OLP pin signal to compensate VSC, the
subharmonics phenomenon is suppressed.
Even if subharmonic oscillations occur when the IC
has some excess supply being out of feedback control,
such as during startup and load shorted, this does not
affect performance of normal operation.
T
T
Figure 9-8. Drain Current, ID, Waveform
in Subharmonic Oscillation
FB/OLP Pin Peripheral Circuit
Target voltage including
Slope compensation
tON2
9.6.
Leading Edge Blanking Function
The constant voltage control of output of the IC uses
the peak-current-mode control method.
In peak-current-mode control method, there is a case
that the power MOSFET turns off due to unexpected
response of FB comparator or Overcurrent Protection
circuit (OCP) to the steep surge current in turning on a
power MOSFET.
In order to prevent this response to the surge voltage in
turning-on the power MOSFET, the Leading Edge
Blanking, tBW = 330 ns is built-in. During tBW, the OCP
threshold voltage becomes VOCP(LEB) = 1.69 V which is
higher than the normal OCP threshold voltage (see
Section 9.10).
9.7.
Random Switching Function
The IC modulates its switching frequency randomly by
superposing the modulating frequency on fOSC(AVG) in
normal operation. This function reduces the conduction
noise compared to others without this function, and
simplifies noise filtering of the input lines of power
supply.
9.8.
Step Drive Control
Figure 9-9 shows a flyback control circuit. The both
end of secondary rectification diode (D51) is generated
surge voltage when a power MOSFET turns on. Thus,
VRM of D51 should be set in consideration of the surge.
The IC optimally controls the gate drive of the internal
power MOSFET (Step drive control) depending on the
load condition. The step drive control reduces the surge
voltage of D51 when the power MOSFET turns on (see
Figure 9-10). Since VRM of D51 can be set to lower value
than usual, the price reduction and the increasing circuit
efficiency are achieved by using a diode of low VF.
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STR6A100xV/xVD Series
VAC
Switching
frequency
fOSC
fOSC(AVG)
VD51
BR1
T1
D51
P1
C1
Normal
operation
S1
C51
fOSC(MIN)
Burst oscillation
ID
7, 8
U1 D/ST
Green mode
Output power, PO
S/OCP
1
Figure 9-11.
ROCP
Figure 9-9.
Flyback Control Circuit
ID
Relationship between PO and fOSC
Switching period
Non-switching period
ID
Time
fOSC(MIN)
Time
Time
Reducing surge voltage
Figure 9-12.
Switching Waveform at Burst Oscillation
VD51
Time
Without step drive
control
Figure 9-10.
9.9.
Time
Table 9-1. FB/OLP Pin Starting and Ending Voltage of
Frequency Decreasing
With step drive
control
ID and VD51 Waveforms
Operation Mode
The operation of the IC automatically changes to green
mode or burst oscillation mode in order to reduce the
switching loss (see Figure 9-11).
When the output load becomes lower, FB/OLP pin
voltage decreases. When FB/OLP pin voltage decreases
to VFB(FDS) or less, the green mode is activated and the
oscillation frequency starts decreasing. When FB/OLP
pin voltage becomes VFB(FDE), the oscillation frequency
stops decreasing (see Table 9-1). At this point, the
oscillation frequency becomes fOSC(MIN) = 25 kHz.
When FB/OLP pin voltage further decreases and
becomes the standby operation point, the burst oscillation
mode is activated. As shown in Figure 9-12, the burst
oscillation mode consists of switching period and nonswitching period. The oscillation frequency during
switching period is the Minimum Frequency,
fOSC(MIN) = 25 kHz.
STR6A153MV/MVD STR6A16xHV/HVD
VFB(FDS) (typ.)
(fOSC = 65 kHz)
3.30 V
(fOSC = 100 kHz)
3.60 V
VFB(FDE) (typ.)
3.00 V
3.10 V
The standby operation point can be adjusted by the
external resistor, RBA (see Figure 9-13) according to the
power supply specification.
Table 9-2 shows the load ratio of the standby operation
point, where the load ratio at the Overcurrent Protection
operating point is 100 %.
U1
BA
GND
2
3
FB/OLP
4
PC1
RBA
C4
Figure 9-13.
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C3
BA Pin Peripheral Circuit
18
STR6A100xV/xVD Series
Table 9-2. Standby Operation Point
RBA
FB/OLP Pin Oscillation Stop
Threshold Voltage
Output Power Ratio
of the Standby
STR6A153MV/ STR6A16xHV/
Operation Point
MVD
HVD
(fOSC=65 kHz) (fOSC=100kHz)
When power MOSFET turns on, the surge voltage
width of S/OCP pin should be less than tBW, as shown in
Figure 9-14. In order to prevent surge voltage, pay extra
attention to ROCP trace layout (See Section 10.2).
In addition, if a C (RC) damper snubber of Figure 9-15
is used, reduce the capacitor value of damper snubber.
Short
1.28 V
1.35 V
About 3 to 6 %
Open
1.63 V
1.79 V
About 4 to 8 %
VOCP(LEB)
330 kΩ
1.92 V
2.16 V
About 6 to 11 %
VOCP’
68 kΩ
2.17 V
2.45 V
About 8 to 13 %
Generally, to improve efficiency under light load
conditions, the frequency of the burst mode becomes just
a few kilohertz. Because the IC suppresses the peak drain
current well during burst mode, audible noises can be
reduced.
The OCP detection usually has some detection delay
time. The higher the AC input voltage is, the steeper the
slope of ID is. Thus, the peak drain current at the burst
oscillation mode becomes high at a high AC input
voltage.
It is necessary to consider that the burst frequency
becomes low at a high AC input.
If the VCC pin voltage decreases to VCC(BIAS) = 9.6 V
during the transition to the burst mode, the Bias Assist
function is activated and stabilizes the standby mode,
because the Startup Current, ICC(ST), is provided to the
VCC pin so that the VCC pin voltage does not decrease
to VCC(OFF). However, if the Bias Assist Function is
always activated during steady-state operation including
standby mode, the power loss increases. Therefore, the
VCC pin voltage should be more than VCC(BIAS), for
example, by adjusting the turns ratio of the auxiliary
winding and secondary-side winding and/or reducing the
value of R2 (See Section 10.1).
9.10. Overcurrent Protection (OCP)
9.10.1. OCP Operation
Overcurrent Protection (OCP) detects each drain peak
current level of a power MOSFET on pulse-by-pulse
basis, and limits the output power when the current level
reaches to OCP threshold voltage.
During Leading Edge Blanking Time, the OCP
threshold voltage becomes VOCP(LEB) = 1.69 V which is
higher than the normal OCP threshold voltage as shown
in Figure 9-14. Changing to this threshold voltage
prevents the IC from responding to the surge voltage in
turning-on the power MOSFET. This function operates
as protection at the condition such as output windings
shorted or unusual withstand voltage of secondary-side
rectifier diodes.
tBW
Surge pulse voltage width at turning-on
Figure 9-14.
S/OCP Pin Voltage
C(RC)
Damper snubber
T1
D51
C1
C51
7, 8
D/ST
U1
C(RC)
Damper snubber
S/OCP
1
ROCP
Figure 9-15.
Damper Snubber
9.10.2. OCP Input Compensation Function
ICs with PWM control usually have some propagation
delay time. The steeper the slope of the actual drain
current at a high AC input voltage is, the larger the
detection voltage of actual drain peak current is,
compared to VOCP. Thus, the peak current has some
variation depending on the AC input voltage in OCP
state.
In order to reduce the variation of peak current in OCP
state, the IC incorporates a built-in Input Compensation
Function.
The Input Compensation Function is the function of
correction of OCP threshold voltage depending with AC
input voltage, as shown in Figure 9-16.
When AC input voltage is low (ON Duty is broad), the
OCP threshold voltage is controlled to become high. The
difference of peak drain current become small compared
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STR6A100xV/xVD Series
with the case where the AC input voltage is high (ON
Duty is narrow).
The compensation signal depends on ON Duty. The
relation between the ON Duty and the OCP threshold
voltage after compensation VOCP' is expressed as
Equation (3). When ON Duty is broader than 36 %, the
VOCP' becomes a constant value VOCP(H) = 0.888 V
VOCP ′ = VOCP(L) + DPC × ONTime
= VOCP(L) + DPC ×
ONDuty
fOSC(AVG)
(3)
where,
VOCP(L) is OCP Threshold Voltage at Zero ON Duty (V),
DPC is OCP Compensation Coefficient (mV/μs),
ONTime is on-time of power MOSFET (μs),
ONDuty is on duty of power MOSFET (%), and
fOSC(AVG) is Average PWM Switching Frequency (kHz).
such as the power MOSFET and secondary side rectifier
diode.
When the OLP is activated, the IC stops switching
operation, and the VCC pin voltage decreases.
During OLP operation, the Bias Assist Function is
disabled. When the VCC pin voltage decreases to
VCC(OFF)SKP (about 9 V), the startup current flows, and the
VCC pin voltage increases. When the VCC pin voltage
increases to VCC(ON), the IC starts operation, and the
circuit current increases. After that, the VCC pin voltage
decreases. When the VCC pin voltage decreases to
VCC(OFF) = 8.5 V, the control circuit stops operation.
Skipping the UVLO operation of VCC(OFF) (see Section
9.2), the intermittent operation makes the non-switching
interval longer and restricts the temperature rise of the
power MOSFET.
When the abnormal condition is removed, the IC
returns to normal operation automatically.
U1
GND
OCP Threshold Voltage after
Compensation, VOCP'
1.0
FB/OLP
4
3
VCC
5
PC1
VOCP(H)
C3
VOCP(L)
D2 R2
C2
D
Figure 9-17.
DDPC=36%
0.5
0
50
FB/OLP Pin Peripheral Circuit
DMAX=75%
100
On Duty (%)
VCC Pin Voltage
Non-switching
interval
Non-switching
interval
VCC(ON)
Figure 9-16. Relationship between On Duty and Drain
Current Limit after Compensation
VCC(OFF)SKP
VCC(OFF)
FB/OLP Pin Voltage
9.11. Overload Protection (OLP)
Figure 9-17 shows the FB/OLP pin peripheral circuit,
and Figure 9-18 shows each waveform for OLP
operation.
When the peak drain current of ID is limited by OCP
operation, the output voltage, VOUT, decreases and the
feedback current from the secondary photo-coupler
becomes zero. Thus, the feedback current, I FB, charges
C3 connected to the FB/OLP pin and the FB/OLP pin
voltage increases. When the FB/OLP pin voltage
increases to VFB(OLP) = 7.3 V or more for the OLP delay
time, tOLP = 75 ms or more, the OLP is activated, the IC
stops switching operation.
During OLP operation, the intermittent operation by
VCC pin voltage repeats and reduces the stress of parts
tOLP
tOLP
tOLP
VFB(OLP)
Drain Current,
ID
Figure 9-18.
OLP Operational Waveforms
9.12. Overvoltage Protection (OVP)
When a voltage between VCC pin and GND terminal
increases to VCC(OVP) = 29.1 V or more, Overvoltage
Protection (OVP) is activated. The IC has two operation
types of OVP. One is the latched shutdown. The other is
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STR6A100xV/xVD Series
auto-restart.
In case the VCC pin voltage is provided by using
auxiliary winding of transformer, the overvoltage
conditions such as output voltage detection circuit open
can be detected because the VCC pin voltage is
proportional to output voltage. The approximate value of
output voltage VOUT(OVP) in OVP condition is calculated
by using Equation (4).
VOUT(OVP)
VOUT(NORMAL)
=
× 29.1 (V)
VCC(NORMAL)
(4)
where,
VOUT(NORMAL) is output voltage in normal operation, and
VCC(NORMAL) is VCC pin voltage in normal operation.
9.12.1. Latched Shutdown Type
When the OVP is activated, the IC stops switching
operation at the latched state. In order to keep the latched
state, when VCC pin voltage decreases to VCC(BIAS), the
Bias Assist Function is activated and VCC pin voltage is
kept to over the VCC(OFF).
Releasing the latched state is done by turning off the
input voltage and by dropping the VCC pin voltage
below VCC(OFF).
9.12.2. Auto-restart Type
When the OVP is activated, the IC stops switching
operation. During OVP operation, the Bias Assist
Function is disabled, the intermittent operation by UVLO
is repeated. When the fault condition is removed, the IC
returns to normal operation automatically (see Figure
9-19).
VCC Pin Voltage
9.13. Thermal Shutdown (TSD)
When the temperature of control circuit increases to
Tj(TSD) = 145 °C or more, Thermal Shutdown (TSD) is
activated. The IC has two operation types of TSD. One is
latched shutdown, the other is auto-restart.
9.13.1. Latched Shutdown Type
When the TSD is activated, the IC stops switching
operation at the latched state. In order to keep the latched
state, when VCC pin voltage decreases to VCC(BIAS), the
Bias Assist Function is activated and VCC pin voltage is
kept to over the VCC(OFF). Releasing the latched state is
done by turning off the input voltage and by dropping the
VCC pin voltage below VCC(OFF).
9.13.2. Auto-restart Type
Figure 9-20 shows the TSD operational waveforms.
When TSD is activated, and the IC stops switching
operation. After that, VCC pin voltage decreases. When
the VCC pin voltage decreases VCC(BIAS), the Bias Assist
Function is activated and VCC pin voltage is kept to over
the VCC(OFF).
When the temperature reduces to less than
Tj(TSD)−Tj(TSD)HYS, the Bias Assist Function is disabled
and the VCC pin voltage decreases to VCC(OFF). At that
time, the IC stops operation by the UVLO circuit and
reverts to the state before startup. After that, the startup
circuit is activated, the VCC pin voltage increases to
VCC(ON), and the IC starts switching operation again.
In this way, the intermittent operation by TSD and
UVLO is repeated while there is an excess thermal
condition. When the fault condition is removed, the IC
returns to normal operation automatically.
VCC(OVP)
Junction Temperature,
Tj
VCC(ON)
Tj(TSD)−Tj(TSD)HYS
Tj(TSD)
VCC(OFF)
Bias Assist
Function
OFF
VCC Pin Voltage
Drain Current,
ID
Figure 9-19.
ON
ON
OFF
VCC(ON)
VCC(BIAS)
VCC(OFF)
OVP Operational Waveforms
Drain Current,
ID
Figure 9-20.
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TSD Operational Waveforms (Autorestart)
21
STR6A100xV/xVD Series
10. Design Notes
10.1.4. FB/OLP Pin Peripheral Circuit
10.1. External Components
C3 is for high frequency noise reduction and phase
compensation, and should be connected close to these
pins. The value of C3 is recommended to be about 2200
pF to 0.01 µF, and should be selected based on actual
operation in the application.
Take care to use properly rated, including derating as
necessary and proper type of components.
CRD clamp snubber
C(RC)
damper snubber
BR1
T1
VAC
C1
R1
C6
C5
P
D1
U1
ROCP
1
S/OCP
D/ST
2
BA
D/ST
RBA
C4
GND
7
5
4
FB/OLP
D2
R2
NC
3
8
C2
D
VCC
C3
PC1
Figure 10-1.
The IC Peripheral Circuit
10.1.1. Input and Output Electrolytic
Capacitor
Apply proper derating to ripple current, voltage, and
temperature rise. Use of high ripple current and low
impedance types, designed for switch mode power
supplies, is recommended.
10.1.5. VCC Pin Peripheral Circuit
• The value of C2 is generally recommended to be 10 µF
to 47 μF (see Section 9.1 Startup Operation, because
the startup time is determined by the value of C2).
In actual power supply circuits, there are cases in
which the VCC pin voltage fluctuates in proportion to
the output current, IOUT (see Figure 10-1), and the
Overvoltage Protection (OVP) on the VCC pin may be
activated. This happens because C2 is charged to a
peak voltage on the auxiliary winding D, which is
caused by the transient surge voltage coupled from the
primary winding when the power MOSFET turns off.
For alleviating C2 peak charging, it is effective to add
some value R2, of several tenths of ohms to several
ohms, in series with D2 (see Figure 10-1). The optimal
value of R2 should be determined using a transformer
matching what will be used in the actual application,
because the variation of the auxiliary winding voltage
is affected by the transformer structural design.
VCC Pin Voltage
With R2
10.1.2. S/OCP Pin Peripheral Circuit
In Figure 10-1, ROCP is the resistor for the current
detection. A high frequency switching current flows to
ROCP, and may cause poor operation if a high
inductance resistor is used. Choose a low inductance and
high surge-tolerant type.
Without R2
Output Current, IOUT
Figure 10-2.
Variation of VCC Pin Voltage and Power
10.1.6. Snubber Circuit
10.1.3. BA Pin Peripheral Circuit
The FB/OLP pin oscillation stop threshold voltage is
selected by the value of RBA connected to the BA pin (see
Section 9.9 Operation Mode).
The reference value of C4 is from 1000 pF to 2200 pF
for high frequency noise rejection
In case the surge voltage of VDS is large, the circuit
should be added as follows (see Figure 10-1);
● A clamp snubber circuit of a capacitor-resistor- diode
(CRD) combination should be added on the primary
winding P.
● A damper snubber circuit of a capacitor (C) or a
resistor-capacitor (RC) combination should be added
between the D/ST pin and the S/GND pin.
In case the damper snubber circuit is added, this
components should be connected near D/ST pin and
S/OCP pin.
STR6A100xV/xVD-DSJ Rev.3.2
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STR6A100xV/xVD Series
10.1.7. Phase Compensation
A typical phase compensation circuit with a secondary
shunt regulator (U51) is shown in Figure 10-3.
C52 and R53 are for phase compensation. The value of
C52 and R53 are recommended to be around 0.047μF to
0.47μF and 4.7 kΩ to 470 kΩ, respectively. They should
be selected based on actual operation in the application.
L51
VOUT
(+)
D51
PC1
R54
R51
R55
C51
S
In the case of multi-output power supply, the coupling
of the secondary-side stabilized output winding, S1, and
the others (S2, S3…) should be maximized to improve
the line-regulation of those outputs.
Figure 10-4 shows the winding structural examples of
two outputs.
Margin tape
R52
C53
Bobbin
T1
output winding S should be maximized to reduce the
leakage inductance.
● The coupling of the winding D and the winding S
should be maximized.
● The coupling of the winding D and the winding P
should be minimized.
C52 R53
U51
P1 S1 P2 S2 D
R56
Margin tape
(-)
Winding Structural Example (a)
Peripheral Circuit Around Secondary
Shunt Regulator (U51)
10.1.8. Transformer
Apply proper design margin to core temperature rise
by core loss and copper loss.
Because the switching currents contain high frequency
currents, the skin effect may become a consideration.
Choose a suitable wire gauge in consideration of the
RMS current and a current density of 4 to 6 A/mm2.
If measures to further reduce temperature are still
necessary, the following should be considered to increase
the total surface area of the wiring:
● Increase the number of wires in parallel.
● Use litz wires.
● Thicken the wire gauge.
In the following cases, the surge of VCC pin voltage
becomes high.
● The surge voltage of primary main winding, P, is high
(low output voltage and high output current power
supply designs)
● The winding structure of auxiliary winding, D, is
susceptible to the noise of winding P.
Margin tape
Bobbin
Figure 10-3.
P1 S1 D S2 S1 P2
Margin tape
Winding Structural Example (b)
Figure 10-4.
Winding Structural Examples
● Winding Structural Example (a):
S1 is sandwiched between P1 and P2 to maximize the
coupling of them for surge reduction of P1 and P2.
D is placed far from P1 and P2 to minimize the
coupling to the primary for the surge reduction of D.
● Winding Structural Example (b)
P1 and P2 are placed close to S1 to maximize the
coupling of S1 for surge reduction of P1 and P2.
D and S2 are sandwiched by S1 to maximize the
coupling of D and S1, and that of S1 and S2. This
structure reduces the surge of D, and improves the
line-regulation of outputs.
When the surge voltage of winding D is high, the VCC
pin voltage increases and the Overvoltage Protection
(OVP) may be activated. In transformer design, the
following should be considered;
● The coupling of the winding P and the secondary
STR6A100xV/xVD-DSJ Rev.3.2
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STR6A100xV/xVD Series
such as film capacitor Cf (about 0.1 μF to 1.0 μF)
close to the VCC pin and the GND pin is
recommended.
(4) ROCP Trace Layout
ROCP should be placed as close as possible to the
S/OCP pin. The connection between the power
ground of the main trace and the IC ground should be
at a single point ground (point A in Figure 10-5)
which is close to the base of ROCP.
(5) Peripheral components of the IC
The components for control connected to the IC
should be placed as close as possible to the IC, and
should be connected as short as possible to the each
pin.
(6) Secondary Rectifier Smoothing Circuit Trace Layout:
This is the trace of the rectifier smoothing loop,
carrying the switching current, and thus it should be
as wide trace and small loop as possible. If this trace
is thin and long, inductance resulting from the loop
may increase surge voltage at turning off the power
MOSFET. Proper rectifier smoothing trace layout
helps to increase margin against the power MOSFET
breakdown voltage, and reduces stress on the clamp
snubber circuit and losses in it.
(7) Thermal Considerations
Because the power MOSFET has a positive thermal
coefficient of RDS(ON), consider it in thermal design.
Since the copper area under the IC and the D/ST pin
trace act as a heatsink, its traces should be as wide as
possible.
10.2. PCB Trace Layout and Component
Placement
Since the PCB circuit trace design and the component
layout significantly affects operation, EMI noise, and
power dissipation, the high frequency PCB trace should be
low impedance with small loop and wide trace.
In addition, the ground traces affect radiated EMI noise,
and wide, short traces should be taken into account.
Figure 10-5 shows the circuit design example.
(1) Main Circuit Trace Layout
This is the main trace containing switching currents,
and thus it should be as wide trace and small loop as
possible.
If C1 and the IC are distant from each other, placing
a capacitor such as film capacitor (about 0.1 μF and
with proper voltage rating) close to the transformer or
the IC is recommended to reduce impedance of the
high frequency current loop.
(2) Control Ground Trace Layout
Since the operation of IC may be affected from the
large current of the main trace that flows in control
ground trace, the control ground trace should be
separated from main trace and connected at a single
point grounding of point A in Figure 10-5 as close to
the ROCP pin as possible.
(3) VCC Trace Layout:
This is the trace for supplying power to the IC, and
thus it should be as small loop as possible. If C2 and
the IC are distant from each other, placing a capacitor
(1) Main trace should be wide
trace and small loop
(4)ROCP should be as close to S/OCP pin
as possible.
(6) Main trace of secondary side should
be wide trace and small loop
T1
(7)Trace of D/ST pin should be
wide for heat release
C1
D51
R1
C6
P
C5
A
ROCP
RBA C4
1
S/OCP
D/ST
2
BA
D/ST
7
5
4
FB/OLP
PC1 C3
R2
NC
(5)The components
connected to the IC
should be as close to
the IC as possible, and
should be connected as
short as possible
GND
S
8
D2
3
(2) Control GND trace
should be connected at
a single point as close
to the ROCP as possible
C51
D1
U1
VCC
C2
D
CY
(3) Loop of the power supply should be small
Figure 10-5.
Peripheral Circuit Example Around the IC
STR6A100xV/xVD-DSJ Rev.3.2
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Sep. 07, 2022
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STR6A100xV/xVD Series
11. Pattern Layout Example
The following show the PCB pattern layout example and the schematic of circuit using STR6A100xV/xVD series.
The PCB pattern layout example is made usable to other ICs in common. The parts in Figure 11-2 are only used.
Figure 11-1 PCB Circuit Trace Layout Example
T1
L52
D52
CN51
1
OUT2(+)
2
OUT2(-)
3
OUT1(+)
4
OUT1(-)
R59
C57
R58
C55
R61
C56
R60
CN1
1
F1
L1
JW51
JW52
JW54
JW6
C1
D1
C12
C2
D4
C13
L51
L2
D2 TH1
D51
D3
C3
C4
P1
C5
R1
3
R55
R52
PC1
R2
S1
R54
R51
C54
C51
C53
D7
C52
U51
U1
8
7
D/ST
D/ST
NC
JW4
D8
R3
JW31
D1
C8
STR6A100×V
C31
C32
BA
GND FB/OLP
C11
1
2
3
JW3
JW7
C6
C7
2
OUT4(-)
JW21
JW8
U21
D21
1 IN
R4
OUT4(+)
JW53
4
JW11
R5
1
R31
C10
S/OCP
CN31
D31
VCC
C9
R56
D2
JW10
5
R57
R53
CP1
JW9
C21
CN21
3
OUT
GND
2
C22
1
OUT3(+)
2
OUT3(-)
R21
Figure 11-2 Circuit Schematic for PCB Circuit Trace Layout
STR6A100xV/xVD-DSJ Rev.3.2
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25
STR6A100xV/xVD Series
12. Reference Design of Power Supply
As an example, the following show the power supply specification, the circuit schematic, the bill of materials, and the
transformer specification.
12.1. Circuit Specifications
IC
Input voltage
Maximum output power
Output voltage
Output current
STR6A163HVD
AC85V to AC265V
21 W
14 V
1.5 A (max.)
12.2. Circuit Schematic
The circuit symbols correspond to these of Figure 11-1
1
F1
L1
C1
D1
D2 TH1
D4
D3
T1
L2
L51
D51
C2
C3
C4
R1
C5
P1
3
CN1
R52
PC1
R2
S1
D7
C53
C51
C52
U51
U1
5
8
7
D/ST
D/ST
NC
D8
JW4
VCC
C9
C8
OUT1(+)
4
OUT1(-)
R55
P2
JW10
3
R54
R51
C54
R57
R53
R56
R3
D1
STR6A100×V
C10
S/OCP
BA
1
2
GND FB/OLP
C11
3
4
JW53
JW11
JW3
R5
R4
C6
CP1
C7
12.3. Transformer Specification
Table 12-1. Transformer Specification
Primary Inductance, LP
Core Size
Al-value
Winding Specification
Winding Structure
700 μH
EI-22
231 nH/N2 (center gap is 0.23 mm)
See Table 12-2
See Figure 12-1
Table 12-2. Winding Specification
Winding
Primary Winding 1
Primary Winding 2
Auxiliary Winding
Output Winding 1
Output Winding 2
Symbol
P1
P2
D
S1
S2
Number of Turns (T)
30
25
10
9
9
Wire Diameter (mm)
2UEW-φ0.23
2UEW-φ0.23
2UEW-φ0.23
TEX-φ0.26 × 2
TEX-φ0.26 × 2
STR6A100xV/xVD-DSJ Rev.3.2
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Sep. 07, 2022
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© SANKEN ELECTRIC CO., LTD. 2014
Construction
Single-layer, solenoid winding
Single-layer, solenoid winding
Space winding
Single-layer, solenoid winding
Single-layer, solenoid winding
26
STR6A100xV/xVD Series
VDC
(+) 14V
P1
P1
S2
D
S1
P2
(-)
D/ST
VCC
S1
P2
Bobbin
VOUT
S2
D
GND
● Start at this pin
Cross-section view
Figure 12-1.
Winding Structure
12.4. Bill of Materials
Symbol
C1
(2)
Part Type
Film, X2
Ratings(1)
Recommended
Sanken Parts
0.033 μF, 275 V
Symbol
Part Type
Ratings(1)
L2
(2)
Inductor
Short
(2)
Inductor
Short
C2
Electrolytic
Open
L51
C3
Electrolytic
82 μF, 400 V
PC1
Photo-coupler
PC123 or equiv
C4
Electrolytic
Open
R1
(3)
Metal oxide
470 kΩ, 1 W
(2)
General
Short
C5
Ceramic
1000 pF, 630 V
R2
Ceramic
1000 pF
R3
General
4.7 Ω
C7
(2)
Ceramic
0.01 μF
R4
General
1 Ω, 1 W
C8
(2)
Electrolytic
22 μF, 50 V
R5
General
330 kΩ
C9
(2)
Ceramic
Open
R51
General
2.2 kΩ
C10
(2)
General
1.5 kΩ
General
10 kΩ
C6
Ceramic
Open
R52
C11
Ceramic, Y1
2200 pF, 250 V
R53
C51
Electrolytic
1000 μF, 25V
R54
General
6.8 kΩ
C52
Ceramic
0.22 μF, 50V
R55
General, 1%
39 kΩ
C53
Electrolytic
Open
R56
General, 1%
10 kΩ
C54
Ceramic
Open
R57
General
D1
General
600 V, 1 A
EM01A
T1
Transformer
D2
General
600 V, 1 A
EM01A
TH1
Open
See the
specification
Short
D3
General
600 V, 1 A
EM01A
U1
IC
D4
General
600 V, 1 A
EM01A
U51
Shunt regulator
D7
Fast recovery
1000V, 0.5A
EG01C
JW3
Short
D8
Fast recovery
200 V, 1 A
AL01Z
JW4
Short
D51
Schottky
100 V, 10 A
FMEN-210A
JW10
Short
F1
Fuse
AC250V, 2 A
JW11
Short
(2)
(2)
NTC thermistor
-
VREF=2.5V
TL431or equiv
Recommended
Sanken Parts
STR6A163HVD
(2)
L1
CM inductor
3.3 mH
JW53
Short
(1) Unless otherwise specified, the voltage rating of capacitor is 50 V or less and the power rating of resistor is 1/8 W or less.
(2) It is necessary to be adjusted based on actual operation in the application.
(3) Resistors applied high DC voltage and of high resistance are recommended to select resistors designed against electromigration
or use combinations of resistors in series for that to reduce each applied voltage, according to the requirement of the application.
STR6A100xV/xVD-DSJ Rev.3.2
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STR6A100xV/xVD Series
Important Notes
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DSGN-CEZ-16003
STR6A100xV/xVD-DSJ Rev.3.2
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