SX68003MH

250 V / 500 V High Voltage 3-phase Motor Drivers SX68000MH Series Data Sheet Description Package The SX68000MH series are high voltage 3-phase motor drivers in which transistors, a pre-drive circuit, and bootstrap circuits (diodes and resistors) are highly integrated. These products can optimally control the inverter systems of low- to medium-capacity motors that require universal input standards. SOP36 36 1 Features ● Built-in Bootstrap Diodes with Current Limiting Resistors (60 Ω) ● CMOS-compatible Input (3.3 V or 5 V) ● Pb-free (RoHS Compliant) ● Fault Signal Output at Protection Activation (FO Pin) ● High-side Shutdown Signal Input (SD Pin) ● Protections Include: Overcurrent Limit (OCL): Auto-restart Overcurrent Protection (OCP): Auto-restart Undervoltage Lockout for Power Supply High-side (UVLO_VB): Auto-restart Low-side (UVLO_VCC): Auto-restart Thermal Shutdown (TSD): Auto-restart VB32 VCC1 4 Not to scale Selection Guide VDSS IO Part Number 250 V 2.0 A SX68001MH 500 V 2.5 A SX68003MH Applications ● Fan Motor for Air Conditioner ● Fan Motor for Air Purifier and Electric Fan Typical Application VCC 19 18 36 32 VB31 CBOOT3 1 VB2 CBOOT2 24 VB1 COM1 HIN3 HIN2 HIN1 SD HIN3 HIN2 HIN1 OCL 10 LIN3 11 LIN2 12 LIN1 13 REG 14 COM2 15 VCC2 16 FO 17 LIN3 LIN2 LIN1 REG Controller CBOOT1 5 6 7 8 9 5V RFO VDC VBB1 27 34 VBB2 23 U 2 V MIC 29 V1 21 V2 M W1 31 19 W2 CS CDC Fault CFO RO LS A/D 18 RS CO GND SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 1 SX68000MH Series Contents Description ------------------------------------------------------------------------------------------------------ 1 Contents --------------------------------------------------------------------------------------------------------- 2 1. Absolute Maximum Ratings ----------------------------------------------------------------------------- 4 2. Recommended Operating Conditions ----------------------------------------------------------------- 5 3. Electrical Characteristics -------------------------------------------------------------------------------- 6 3.1 Characteristics of Control Parts------------------------------------------------------------------ 6 3.2 Bootstrap Diode Characteristics ----------------------------------------------------------------- 7 3.3 Thermal Resistance Characteristics ------------------------------------------------------------- 7 3.4 Transistor Characteristics ------------------------------------------------------------------------- 8 3.4.1 SX68001MH ------------------------------------------------------------------------------------ 8 3.4.2 SX68003MH ------------------------------------------------------------------------------------ 9 4. Mechanical Characteristics ----------------------------------------------------------------------------- 9 5. Truth Table ----------------------------------------------------------------------------------------------- 10 6. Block Diagram ------------------------------------------------------------------------------------------- 11 7. Pin Configuration Definitions ------------------------------------------------------------------------- 12 8. Typical Application ------------------------------------------------------------------------------------- 13 9. Physical Dimensions ------------------------------------------------------------------------------------ 14 10. Marking Diagram --------------------------------------------------------------------------------------- 15 11. Functional Descriptions -------------------------------------------------------------------------------- 16 11.1 Turning On and Off the IC ---------------------------------------------------------------------- 16 11.2 Pin Descriptions ----------------------------------------------------------------------------------- 16 11.2.1 U, V, V1, V2, W1, and W2 ----------------------------------------------------------------- 16 11.2.2 VB1, VB2, VB31, and VB32 --------------------------------------------------------------- 16 11.2.3 VCC1 and VCC2 ---------------------------------------------------------------------------- 17 11.2.4 COM1 and COM2--------------------------------------------------------------------------- 17 11.2.5 REG -------------------------------------------------------------------------------------------- 18 11.2.6 HIN1, HIN2, and HIN3; LIN1, LIN2, and LIN3 -------------------------------------- 18 11.2.7 VBB1 and VBB2 ----------------------------------------------------------------------------- 18 11.2.8 LS ----------------------------------------------------------------------------------------------- 19 11.2.9 OCL -------------------------------------------------------------------------------------------- 19 11.2.10 SD----------------------------------------------------------------------------------------------- 19 11.2.11 FO ---------------------------------------------------------------------------------------------- 19 11.3 Protections ------------------------------------------------------------------------------------------ 19 11.3.1 Fault Signal Output ------------------------------------------------------------------------- 20 11.3.2 Shutdown Signal Input --------------------------------------------------------------------- 20 11.3.3 Undervoltage Lockout for Power Supply (UVLO) ----------------------------------- 20 11.3.4 Overcurrent Limit (OCL) ----------------------------------------------------------------- 21 11.3.5 Overcurrent Protection (OCP) ----------------------------------------------------------- 22 11.3.6 Thermal Shutdown (TSD) ----------------------------------------------------------------- 22 12. Design Notes ---------------------------------------------------------------------------------------------- 23 12.1 PCB Pattern Layout ------------------------------------------------------------------------------ 23 12.2 Considerations in IC Characteristics Measurement --------------------------------------- 23 13. Calculating Power Losses and Estimating Junction Temperature ---------------------------- 24 13.1 Power MOSFET ----------------------------------------------------------------------------------- 24 13.1.1 Power MOSFET Steady-state Loss, PRON----------------------------------------------- 24 13.1.2 Power MOSFET Switching Loss, PSW --------------------------------------------------- 25 13.1.3 Body Diode Steady-state Loss, PSD ------------------------------------------------------- 25 13.1.4 Estimating Junction Temperature of Power MOSFET ------------------------------ 25 14. Performance Curves ------------------------------------------------------------------------------------ 26 SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 2 SX68000MH Series 14.1 Transient Thermal Resistance Curves -------------------------------------------------------- 26 14.2 Performance Curves of Control Parts--------------------------------------------------------- 27 14.3 Performance Curves of Output Parts --------------------------------------------------------- 33 14.3.1 Output Transistor Performance Curves ------------------------------------------------ 33 14.3.2 Switching Loss Curves --------------------------------------------------------------------- 34 14.4 Allowable Effective Current Curves ----------------------------------------------------------- 35 14.4.1 SX68001MH ---------------------------------------------------------------------------------- 35 14.4.2 SX68003MH ---------------------------------------------------------------------------------- 36 15. Pattern Layout Example ------------------------------------------------------------------------------- 37 16. Typical Motor Driver Application ------------------------------------------------------------------- 39 Important Notes ---------------------------------------------------------------------------------------------- 40 SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 3 SX68000MH Series 1. Absolute Maximum Ratings Current polarities are defined as follows: current going into the IC (sinking) is positive current (+); current coming out of the IC (sourcing) is negative current (−). Unless specifically noted, TA = 25 °C, COM1 = COM2 = COM. Parameter Symbol Conditions Rating Unit Remarks Power MOSFET Breakdown Voltage VDSS VCC Logic Supply Voltage VBS 500 VCC1–COM1, VCC2–COM2 VB1–U; VB2–V, VB2–V1; VB31–W1, VB32–W1 Output Current (DC) (1) IO TC = 25 °C, TJ < 150 ℃ Output Current (Pulse) IOP TC = 25 °C, TJ < 150 ℃, PW ≤ 100 μs Regulator Output Current IREG Input Voltage Allowable Power Dissipation Operating Case Temperature(2) Junction Temperature(3) VIN HINx, LINx, FO, SD PD TC = 25 °C Storage Temperature 250 VCC = 15 V, ID = 100 µA, VIN = 0 V V SX68001MH SX68003MH 20 V 20 2 2.5 3 3.75 A A 35 mA − 0.5 to 7 V 3 W TC(OP) −20 to 100 °C TJ 150 °C TSTG −40 to 150 °C SX68001MH SX68003MH SX68001MH SX68003MH (1) Should be derated depending on an actual case temperature. See Section 14.4. Refers to a case temperature measured during IC operation. (3) Refers to the junction temperature of each chip built in the IC, including the control IC, transistors, and fast recovery diodes. (2) SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 4 SX68000MH Series 2. Recommended Operating Conditions Unless specifically noted, COM1 = COM2 = COM. Parameter Symbol Conditions Min. Typ. Max. VBBx–LS — 140 200 VBBx–LS VCC1–COM1, VCC2–COM2 VB1–U; VB2–V, VB2–V1; VB31–W1, VB32–W1 — 300 400 13.5 — 16.5 V 13.5 — 16.5 V VIN 0 — 5.5 V tIN(MIN)ON 0.5 — — μs tIN(MIN)OFF 0.5 — — μs Dead Time of Input Signal tDEAD 1.5 — — μs FO Pin Pull-up Resistor RFO 3.3 — 10 kΩ FO Pin Pull-up Voltage FO Pin Noise Filter Capacitor Bootstrap Capacitor VFO 3.0 — 5.5 V CFO 0.001 — 0.01 μF CBOOT 1 — — μF IP ≤ 3 A 0.37 — — IP ≤ 3.75 A 0.3 — — Main Supply Voltage VDC VCC Logic Supply Voltage VBS Input Voltage (HINx, LINx, SD, FO) Minimum Input Pulse Width Unit V Ω Shunt Resistor RS RC Filter Resistor RO — — 100 Ω RC Filter Capacitor CO 1000 — 10000 pF PWM Carrier Frequency Operating Case Temperature fC — — 20 kHz TC(OP) — — 100 °C SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 Remarks SX68001MH SX68003MH SX68001MH SX68003MH 5 SX68000MH Series 3. Electrical Characteristics Current polarities are defined as follows: current going into the IC (sinking) is positive current (+); current coming out of the IC (sourcing) is negative current (−). Unless specifically noted, TA = 25 °C, VCC = 15 V, COM1 = COM2 = COM. 3.1 Characteristics of Control Parts Parameter Symbol Conditions Min. Typ. Max. Unit 10.5 11.5 12.5 V 9.5 10.5 11.5 V 10.0 11.0 12.0 V 9.0 10.0 11.0 V — 4.6 8.5 mA — 140 400 μA Remarks Power Supply Operation VCC(ON) Logic Operation Start Voltage VBS(ON) VCC(OFF) Logic Operation Stop Voltage VBS(OFF) ICC Logic Supply Current Input Signal High Level Input Threshold Voltage (HINx, LINx, SD) Low Level Input Threshold Voltage (HINx, LINx, SD) FO Pin High Level Input Threshold Voltage FO Pin Low Level Input Threshold Voltage High Level Input Current (HINx, LINx) Low Level Input Current (HINx, LINx) Fault Signal Output FO Pin Voltage at Fault Signal Output FO Pin Voltage in Normal Operation Protection OCL Pin Output Voltage (L) OCL Pin Output Voltage (H) Current Limit Reference Voltage OCP Threshold Voltage OCP Hold Time IBS VCC1–COM1, VCC2–COM2 VB1–U; VB2–V, VB2–V1; VB31–W1, VB32–W1 VCC1–COM1, VCC2–COM2 VB1–U; VB2–V, VB2–V1; VB31–W1, VB32–W1 IREG = 0 A HINx = 5 V; VBx pin current in 1-phase operation VIH Output ON — 2.0 2.5 V VIL Output OFF 1.0 1.5 — V VIH(FO) Output ON — 2.0 2.5 V VIL(FO) Output OFF 1.0 1.5 — V IIH VIN = 5 V — 230 500 μA IIL VIN = 0 V — — 2 μA VFOL VFO = 5 V, RFO = 10 kΩ 0 — 0.5 V VFOH VFO = 5 V, RFO = 10 kΩ 4.8 — — V VOCL(L) 0 — 0.5 V VOCL(H) 4.5 — 5.5 V VLIM 0.6175 0.6500 0.6825 V VTRIP 0.9 1.0 1.1 V tP 20 25 — μs SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 6 SX68000MH Series Parameter Symbol OCP Blanking Time Current Limit Blanking Time TSD Operating Temperature TSD Releasing Temperature Regulator Output Voltage 3.2 Unit tBK(OCP) — 2 3.5 μs tBK(OCL) — 2 3.5 μs 135 150 165 °C 105 120 135 °C 6.75 7.5 8.25 V Min. — — Typ. — — Max. 10 10 Unit — 1.0 1.3 V 48 60 72 Ω Min. Typ. Max. Unit — — 10 °C/W — — 35 °C/W IREG = 0 mA; without heatsink IREG = 0 mA; without heatsink IREG = 0 mA to 35 mA Remarks Bootstrap Diode Characteristics Symbol ILBD VFB Conditions VR = 250 V VR = 500 V IFB = 0.15 A RBOOT μA Remarks SX68001MH SX68003MH Thermal Resistance Characteristics Parameter Junction-to-Case Thermal Resistance(1) Junction-to-Ambient Thermal Resistance (2) Max. VREG Bootstrap Diode Leakage Current Bootstrap Diode Forward Voltage Bootstrap Diode Series Resistor (1) Typ. TDL Parameter 3.3 Min. TDH Conditions Symbol RJ-C RJ-A Conditions All power MOSFETs operating(2) All power MOSFETs operating(2) Remarks Refers to a case temperature at the measurement point described in Figure 3-1. Mounted on a CEM-3 glass (1.6 mm in thickness, 35 μm in copper foil thickness), and measured under natural air cooling without silicone potting. 7.66 mm Measurement point 36 19 1 18 4 mm Figure 3-1. Case Temperature Measurement Point SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 7 SX68000MH Series 3.4 Transistor Characteristics Figure 3-2 provides the definitions of switching characteristics described in this and the following sections. HINx/ LINx 0 trr ton td(on) tr ID toff td(off) tf 90% 10% 0 VDS 0 Figure 3-2. 3.4.1 Switching Characteristics Definitions SX68001MH Parameter Symbol Conditions Min. Typ. Max. Unit VDS = 250 V, VIN = 0 V — — 100 µA Drain-to-Source Leakage Current IDSS Drain-to-Source On-resistance Source-to-Drain Diode Forward Voltage High-side Switching Source-to-Drain Diode Reverse Recovery Time Turn-on Delay Time RDS(ON) ID = 1.0 A, VIN = 5 V — 1.25 1.5 Ω VSD ISD =1.0 A, VIN = 0 V — 1.1 1.5 V — 75 — ns — 800 — ns — 45 — ns — 720 — ns — 40 — ns — 70 — ns — 750 — ns — 50 — ns — 660 — ns — 20 — ns Rise Time Turn-off Delay Time trr td(on) tr td(off) Fall Time tf Low-side Switching Source-to-Drain Diode Reverse Recovery Time Turn-on Delay Time trr Rise Time Turn-off Delay Time Fall Time td(on) tr td(off) tf VDC = 150 V, VCC = 15 V, ID = 1.0 A, VIN = 0→5 V or 5→0 V, TJ = 25 °C, inductive load VDC = 150 V, VCC = 15 V, ID = 1.0 A, VIN = 0→5 V or 5→0 V, TJ = 25 °C, inductive load SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 8 SX68000MH Series 3.4.2 SX68003MH Parameter Symbol Drain-to-Source Leakage Current Drain-to-Source On-resistance Source-to-Drain Diode Forward Voltage High-side Switching Source-to-Drain Diode Reverse Recovery Time Turn-on Delay Time Max. Unit — — 100 µA RDS(ON) ID = 1.25 A, VIN = 5 V — 2.0 2.4 Ω VSD ISD =1.25 A, VIN = 0 V — 1.0 1.5 V — 135 — ns — 940 — ns — 100 — ns — 975 — ns — 45 — ns — 135 — ns — 900 — ns — 105 — ns — 905 — ns — 35 — ns trr td(on) tr td(off) tf Low-side Switching Source-to-Drain Diode Reverse Recovery Time Turn-on Delay Time trr td(on) Rise Time tr td(off) Fall Time 4. Typ. VDS = 500 V, VIN = 0 V Fall Time Turn-off Delay Time Min. IDSS Rise Time Turn-off Delay Time Conditions VDC = 300 V, VCC = 15 V, ID = 1.25 A, VIN = 0→5 V or 5→0 V, TJ = 25 °C, inductive load VDC = 300 V, VCC = 15 V, ID = 1.25 A, VIN = 0→5 V or 5→0 V, TJ = 25 °C, inductive load tf Mechanical Characteristics Parameter Package Weight Conditions Min. Typ. Max. Unit — 1.4 — g SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 Remarks 9 SX68000MH Series 5. Truth Table Table 5-1 is a truth table that provides the logic level definitions of operation modes. In the case where HINx and LINx signals in each phase are high at the same time, both the high- and low-side transistors become on (simultaneous on-state). Therefore, HINx and LINx signals, the input signals for the HINx and LINx pins, require dead time setting so that such a simultaneous on-state event can be avoided. After the IC recovers from a UVLO_VCC condition, the low-side transistors resume switching in accordance with the input logic levels of the LINx signals (level-triggered), whereas the high-side transistors resume switching at the next rising edge of an HINx signal (edge-triggered). After the IC recovers from a UVLO_VB condition, the high-side transistors resume switching at the next rising edge of an HINx signal (edge-triggered). Table 5-1. Truth Table for Operation Modes Mode Normal Operation Shutdown Signal Input FO = “L” Undervoltage Lockout for Highside Power Supply (UVLO_VB) Undervoltage Lockout for Lowside Power Supply (UVLO_VCC) Overcurrent Protection (OCP) Overcurrent Limit (OCL) (OCL = SD) Thermal Shutdown (TSD) HINx L H L H L H L H L H L H L H L H L H L H L H L H L H L H LINx L L H H L L H H L L H H L L H H L L H H L L H H L L H H High-side Transistor OFF ON OFF ON OFF ON OFF ON OFF OFF OFF OFF OFF OFF OFF OFF OFF ON OFF ON OFF OFF OFF OFF OFF ON OFF ON SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 Low-side Transistor OFF OFF ON ON OFF OFF OFF OFF OFF OFF ON ON OFF OFF OFF OFF OFF OFF OFF OFF OFF OFF ON ON OFF OFF OFF OFF 10 SX68000MH Series 6. Block Diagram 36 VB32 32 VB31 1 VB2 24 VB1 VCC1 4 UVLO UVLO UVLO UVLO 27 VBB1 34 VBB2 HIN3 HIN2 HIN1 SD COM1 6 7 8 9 5 VCC2 16 REG 14 LIN3 11 LIN2 12 LIN1 13 Input Logic High-side Level Shift Driver UVLO REG Input Logic (OCP Reset) FO 17 W1 V V1 U V2 W2 Lowside Driver COM2 15 Thermal Shutdown 31 2 29 23 21 19 OCP OCP and OCL 18 LS OCL 10 Figure 6-1. SX68000MH Block Diagram SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 11 SX68000MH Series 7. Pin Configuration Definitions 1 VB2 2 V VB32 35 VBB2 3 36 34 4 VCC1 5 COM1 6 HIN3 7 HIN2 8 HIN1 9 SD 10 OCL 11 LIN3 26 12 LIN2 25 13 LIN1 VB1 24 14 REG U 23 15 COM2 16 VCC2 17 FO 18 LS 33 VB31 32 W1 31 30 V1 29 28 VBB1 27 22 V2 21 20 W2 19 Pin Number Pin Name 1 VB2 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 V — VCC1 COM1 HIN3 HIN2 HIN1 SD OCL LIN3 LIN2 LIN1 REG COM2 VCC2 FO LS W2 — V2 — U 24 VB1 25 26 — — 27 VBB1 28 29 30 31 — V1 — W1 32 VB31 33 — 34 VBB2 35 — 36 VB32 Description V-phase high-side floating supply voltage input V-phase bootstrap capacitor connection Pin removed High-side logic supply voltage input High-side logic ground Logic input for W-phase high-side gate driver Logic input for V-phase high-side gate driver Logic input for U-phase high-side gate driver High-side shutdown signal input Overcurrent limit signal input Logic input for W-phase low-side gate driver Logic input for V-phase low-side gate driver Logic input for U-phase low-side gate driver Regulator output Low-side logic ground Low-side logic supply voltage input Fault signal output and shutdown signal input Power MOSFET source W-phase output (connected to W1 externally) Pin removed V-phase output (connected to V1 externally) Pin removed U-phase output U-phase high-side floating supply voltage input Pin removed Pin removed Positive DC bus supply voltage (connected to VBB2 externally) Pin removed V-phase output (connected to V2 externally) Pin removed W-phase output (connected to W2 externally) W-phase high-side floating supply voltage input Pin removed Positive DC bus supply voltage (connected to VBB1 externally) Pin removed W-phase high-side floating supply voltage input SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 12 SX68000MH Series 8. Typical Application CR filters and Zener diodes should be added to your application as needed. This is to protect each pin against surge voltages causing malfunctions, and to avoid the IC being used under the conditions exceeding the absolute maximum ratings where critical damage is inevitable. Then, check all the pins thoroughly under actual operating conditions to ensure that your application works flawlessly. VB2 1 V 2 CBOOT2 36 VB32 VCC VCC1 4 COM1 GND HIN3 HIN2 HIN1 SD OCL LIN3 LIN2 LIN1 HIN3 HIN2 Controller　　　　　　　　 HIN1 LIN3 LIN2 LIN1 REG REG 5V COM2 VCC2 FO RFO 34 VBB2 5 6 7 8 9 32 10 11 12 13 14 15 16 17 27 31 29 VB31 CBOOT3 W1 V1 VDC VBB1 CBOOT1 MIC 24 23 21 19 VB1 U M V2 W2 CS CDC Fault CFO RO A/D LS 18 A/D CO RS GND Figure 8-1. SX68000MH Typical Application SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 13 SX68000MH Series 9. Physical Dimensions ● SOP36 Package 22 ±0.2 (Includes mold flash) +0.15 1 18 P=1.2 ±0.2 A 2.1 ±0.2 1.05 ±0.2 14.1 ±0.3 19 11.4 ±0.2 36 (Excludes mold flash) 0.25 -0.05 +0.15 0.4 -0.05 0 to 8° 0 to 0.2 0.7 ±0.3 (R-end) 0.8 ±0.2 (From backside to root of pin) Enlarged view of A (S = 20/1) NOTES: ● Dimensions in millimeters ● Pb-free (RoHS compliant) ● Reflow (MSL3) Preheat: 180 °C / 90 ± 30 s Solder heating: 250 °C / 10 ± 1 s (260 °C peak, 2 times) SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 14 SX68000MH Series Pin 19 0.8 1.6 0.4 10.2 5.4 7.8 4.2 5.4 0.6 1.8 4.2 5.4 4.2 1.6 Pin 18 Pin 1 6.15 17.2 6.15 7.8 10.2 2.45 Pin 36 ● Land Pattern Example 10.2 9.0 7.8 6.6 3.0 1.8 0.6 0 0.6 1.8 3.0 4.2 5.4 6.6 9.0 10.2 2.45 0.4 Unit: mm 10. Marking Diagram 36 19 SX6800xMH Part Number YMDDX 1 18 Lot Number: Y is the last digit of the year of manufacture (0 to 9) M is the month of the year (1 to 9, O, N, or D) DD is the day of the month (01 to 31) X is the control number SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 15 SX68000MH Series 11. Functional Descriptions 11.2.2 Unless specifically noted, this section uses the following definitions: These pins are connected to bootstrap capacitors for the high-side floating supply. In actual applications, use either of the VB31 or VB32 pin because they are internally connected. Voltages across the VBx and these output pins should be maintained within the recommended range (i.e., the Logic Supply Voltage, VBS) given in Section 2. A bootstrap capacitor, CBOOTx, should be connected in each of the traces between the VB1 and U pins, the VB2 and V pins, the VB31 (VB32) and W1 pins. For proper startup, turn on the low-side transistor first, then fully charge the bootstrap capacitor, CBOOTx. For the capacitance of the bootstrap capacitors, CBOOTx, choose the values that satisfy Equations (1) and (2). Note that capacitance tolerance and DC bias characteristics must be taken into account when you choose appropriate values for CBOOTx. ● All the characteristic values given in this section are typical values. ● For pin and peripheral component descriptions, this section employs a notation system that denotes a pin name with the arbitrary letter “x”, depending on context. Thus, “the VCCx pin” is used when referring to either or both of the VCC1 and VCC2 pins. ● The COM1 pin is always connected to the COM2 pin. 11.1 Turning On and Off the IC The procedures listed below provide recommended startup and shutdown sequences. To turn on the IC properly, do not apply any voltage on the VBBx, HINx, and LINx pins until the VCCx pin voltage has reached a stable state (VCC(ON) ≥ 12.5 V). It is required to fully charge bootstrap capacitors, CBOOTx, at startup (see Section 11.2.2). To turn off the IC, set the HINx and LINx pins to logic low (or “L”), and then decrease the VCCx pin voltage. 11.2 Pin Descriptions 11.2.1 U, V, V1, V2, W1, and W2 These pins are the outputs of the three phases, and serve as the connection terminals to the 3-phase motor. Do not connect the 3-phase motor to the V pin. The V1 and W1 pins must be connected to the V2 and W2 pins on a PCB, respectively. The U, V (V1), and W1 pins are the grounds for the VB1, VB2, and VB31 (VB32) pins. The U, V, and W1 pins are connected to the negative nodes of bootstrap capacitors, CBOOTx. The V pin is internally connected to the V1 pin. Since high voltages are applied to these output pins (U, V, V1, V2, W1, and W2), it is required to take measures for insulating as follows: ● Keep enough distance between the output pins and low-voltage traces. ● Coat the output pins with insulating resin. VB1, VB2, VB31, and VB32 CBOOTx (μF) > 800 × t L(OFF) (1) 1 μF ≤ CBOOTx ≤ 220 μF (2) In Equation (1), let tL(OFF) be the maximum off-time of the low-side transistor (i.e., the non-charging time of CBOOTx), measured in seconds. Even while the high-side transistor is off, voltage across the bootstrap capacitor keeps decreasing due to power dissipation in the IC. When the VBx pin voltage decreases to VBS(OFF) or less, the high-side undervoltage lockout (UVLO_VB) starts operating (see Section 11.3.3.1). Therefore, actual board checking should be done thoroughly to validate that voltage across the VBx pin maintains over 11.0 V (VBS > VBS(OFF)) during a lowfrequency operation such as a startup period. As Figure 11-1 shows, a bootstrap diode, DBOOTx, and a current-limiting resistor, RBOOTx, are internally placed in series between the VCC1 and VBx pins. Time constant for the charging time of CBOOTx, τ, can be computed by Equation (3): τ = CBOOTx × R BOOTx , (3) where CBOOTx is the optimized capacitance of the bootstrap capacitor, and RBOOTx is the resistance of the current-limiting resistor (60 Ω ± 20%). SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 16 SX68000MH Series DBOOT1 RBOOT1 VB1 VB2 VB31 1 0 Set 32 0 VBB1 27 34 VBB2 4 16 VCC2 HINx CBOOT2 DBOOT3 RBOOT3 VCC1 24 CBOOT1 DBOOT2 RBOOT2 HO3 HO2 HO1 VCC U MIC V Reset VDC 0 23 VBx–HSx 2 29 V1 5 COM1 15 COM2 CBOOT3 St ays l ogic hi gh Q W2 31 W1 0 Bootstrap Circuit Figure 11-3. Figure 11-2 shows an internal level-shifting circuit. A high-side output signal, HOx, is generated according to an input signal on the HINx pin. When an input signal on the HINx pin transits from low to high (rising edge), a “Set” signal is generated. When the HINx input signal transits from high to low (falling edge), a “Reset” signal is generated. These two signals are then transmitted to the high-side by the level-shifting circuit and are input to the SR flip-flop circuit. Finally, the SR flip-flop circuit feeds an output signal, Q (i.e., HOx). Figure 11-3 is a timing diagram describing how noise or other detrimental effects will improperly influence the level-shifting process. When a noise-induced rapid voltage drop between the VBx and output pins (U, V/V1, or W1; hereafter “VBx–HSx”) occurs after the Set signal generation, the next Reset signal cannot be sent to the SR flip-flop circuit. And the state of an HOx signal stays logic high (or “H”) because the SR flip-flop does not respond. With the HOx state being held high (i.e., the high-side transistor is in an on-state), the next LINx signal turns on the low-side transistor and causes a simultaneously-on condition, which may result in critical damage to the IC. To protect the VBx pin against such a noise effect, add a bootstrap capacitor, CBOOTx, in each phase. CBOOTx must be placed near the IC and be connected between the VBx and HSx pins with a minimal length of traces. To use an electrolytic capacitor, add a 0.01 μF to 0.1 μF bypass capacitor, CPx, in parallel near these pins used for the same phase. U1 VBx S Set Input logic HINx Q HOx R Pulse generator Reset COM1 5 Figure 11-2. VBS(OFF) 0 19 Figure 11-1. VBS(ON) M Internal Level-shifting Circuit HSx 11.2.3 Waveforms at VBx-HSx Voltage Drop VCC1 and VCC2 These are the logic power supply pins for the built-in control MIC. The VCC1 and VCC2 pins must be externally connected on a PCB because they are not internally connected. To prevent malfunction induced by supply ripples or other factors, put a 0.01 μF to 0.1 μF ceramic capacitor, CVCC, near these pins. To prevent damage caused by surge voltages, put an 18 V to 20 V Zener diode, DZ, between the VCCx and COMx pins. Voltages to be applied between the VCCx and COMx pins should be regulated within the recommended operational range of VCC, given in Section 2. 4 VCC1 16 VCC2 VCC MIC CVCC DZ Figure 11-4. 11.2.4 5 COM1 15 COM2 VCCx Pin Peripheral Circuit COM1 and COM2 These are the logic ground pins for the built-in control MIC. The COM1 and COM2 pins should be connected externally on a PCB because they are not internally connected. Varying electric potential of the logic ground can be a cause of improper operations. Therefore, connect the logic ground as close and short as possible to shunt resistors, RS, at a single-point ground (or star ground) which is separated from the power ground (see Figure 11-5). SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 17 SX68000MH Series U1 VDC VBB2 34 VBB1 27 CS CDC Here are filter circuit constants for reference: RIN1x: 33 Ω to 100 Ω RIN2x: 1 kΩ to 10 kΩ CINx: 100 pF to 1000 pF 5 COM1 LS 18 15 COM2 Logic ground Connect the COM1 and COM2 pins on a PCB. Figure 11-5. 11.2.5 RS Create a single-point ground (a star ground) near R S, but keep it separated from the power ground. Connections to Logic Ground REG This is the 7.5 V regulator output pin, which can be used for a power supply of an external logic IC (e.g., Hall IC). A maximum output current of the REG pin is 35 mA. To stabilize the REG pin output, connect the pin to a capacitor of about 0.1 μF. 11.2.6 HIN1, HIN2, and HIN3; LIN1, LIN2, and LIN3 These are the input pins of the internal motor drivers for each phase. The HINx pin acts as a high-side controller; the LINx pin acts as a low-side controller. Figure 11-6 shows an internal circuit diagram of the HINx or LINx pin. This is a CMOS Schmitt trigger circuit with a built-in 20 kΩ pull-down resistor, and its input logic is active high. Input signals applied across the HINx–COMx and the LINx–COMx pins in each phase should be set within the ranges provided in Table 11-1, below. Note that dead time setting must be done for HINx and LINx signals because the IC does not have a dead time generator. The higher PWM carrier frequency rises, the more switching loss increases. Hence, the PWM carrier frequency must be set so that operational case temperatures and junction temperatures have sufficient margins against the absolute maximum ranges, specified in Section 1. If the signals from the microcontroller become unstable, the IC may result in malfunctions. To avoid this event, the outputs from the microcontroller output line should not be high impedance. Also, if the traces from the microcontroller to the HINx or LINx pin (or both) are too long, the traces may be interfered by noise. Therefore, it is recommended to add an additional filter or a pull-down resistor near the HINx or LINx pin as needed (see Figure 11-7). Care should be taken when adding RIN1x and RIN2x to the traces. When they are connected to each other, the input voltage of the HINx and LINx pins becomes slightly lower than the output voltage of the microcontroller. Table 11-1. Input Signals for HINx and LINx Pins Parameter Input Voltage Input Pulse Width PWM Carrier Frequency Dead Time High Level Signal Low Level Signal 3 V < VIN < 5.5 V 0 V < VIN < 0.5 V ≥0.5 μs ≥0.5 μs ≤20 kHz ≥1.5 μs U1 HINx (LINx) 5V 2 kΩ 2 kΩ 20 kΩ COM1 (COM2) Figure 11-6. Internal Circuit Diagram of HINx or LINx Pin U1 RIN1x Input signal HINx/ LINx RIN2x SX6800xMH Controller Figure 11-7. 11.2.7 CINx Filter Circuit for HINx or LINx Pin VBB1 and VBB2 These are the input pins for the main supply voltage, i.e., the positive DC bus. All of the power MOSFET drains of the high-side are connected to these pins. Voltages between the VBBx and COM2 pins should be set within the recommended range of the main supply voltage, VDC, given in Section 2. The VBB1 and VBB2 pins should be connected externally on a PCB. To suppress surge voltages, put a SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 18 SX68000MH Series 0.01 μF to 0.1 μF bypass capacitor, CS, near the VBBx pin and an electrolytic capacitor, CDC, with a minimal length of PCB traces to the VBBx pin. 11.2.8 at OCL or OCP activation. Also, inputting the inverted signal of the FO pin to the SD pin permits all the highand low-side transistors to turn off, when the IC detects an abnormal condition (i.e., some or all of the protections such as TSD, OCP, and UVLO are activated). LS This pin is internally connected to the power MOSFET source in each phase and the overcurrent protection (OCP) circuit. For current detection, the LS pin should be connected externally on a PCB via a shunt resistor, RS, to the COMx pin. For more details on the OCP, see Section 11.3.5. When connecting the shunt resistor, place it as near as possible to the IC with a minimum length of traces to the LS and COMx pins. Otherwise, malfunction may occur because a longer circuit trace increases its inductance and thus increases its susceptibility to improper operations. In applications where long PCB traces are required, add a fast recovery diode, DRS, between the LS and COMx pins in order to prevent the IC from malfunctioning. 11.2.11 FO This pin operates as the fault signal output and the low-side shutdown signal input. Sections 11.3.1 and 11.3.2 explain the two functions in detail, respectively. Figure 11-9 illustrates an internal circuit diagram of the FO pin and its peripheral circuit. VFO U1 5V RFO FO 2 kΩ INT 1 MΩ 3.0 µs (typ.) Blanking filter 50 Ω CFO QFO Output SW turn-off and QFO turn-on COM VBB2 34 VBB1 27 U1 VDC CS CDC 5 COM1 DRS Add a fast recovery diode to a long trace. Figure 11-8. 11.2.9 Internal Circuit Diagram of FO Pin and Its Peripheral Circuit RS LS 18 15 COM2 Figure 11-9. Put a shunt resistor near the IC with a minimum length to the LS pin. Connections to LS Pin OCL The OCL pin serves as the output of the overcurrent protections which monitor the currents going through the output transistors. In normal operation, the OCL pin logic level is low. If the OCL pin is connected to the SD pin so that the SD pin will respond to an OCL output signal, the high-side transistors can be turned off when the protections (OCP and OCL) are activated. 11.2.10 SD When a 5 V or 3.3 V signal is input to the SD pin, the high-side transistors turn off independently of any HINx signals. This is because the SD pin does not respond to a pulse shorter than an internal filter of 3.3 μs (typ.). The SD–OCL pin connection, as described in Section 11.2.9, allows the IC to turn off the high-side transistors Because of its open-collector nature, the FO pin should be tied by a pull-up resistor, RFO, to the external power supply. The external power supply voltage (i.e., the FO Pin Pull-up Voltage, VFO) should range from 3.0 V to 5.5 V. When the pull-up resistor, RFO, has a too small resistance, the FO pin voltage at fault signal output becomes high due to the saturation voltage drop of a built-in transistor, QFO. Therefore, it is recommended to use a 3.3 kΩ to 10 kΩ pull-up resistor. To suppress noise, add a filter capacitor, CFO, near the IC with minimizing a trace length between the FO and COMx pins. To avoid the repetition of OCP activations, the external microcontroller must shut off any input signals to the IC within an OCP hold time, tP, which occurs after the internal MOSFET (QFO) turn-on. tP is 20 μs where minimum values of thermal characteristics are taken into account. (For more details, see Section 11.3.5.) Our recommendation is to use a 0.001 μF to 0.01 μF filter capacitor. 11.3 Protections This section describes the various protection circuits provided in the SX68000MH series. The protection circuits include the undervoltage lockout for power supplies (UVLO), the overcurrent protection (OCP), and the thermal shutdown (TSD). SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 19 SX68000MH Series In case one or more of these protection circuits are activated, the FO pin outputs a fault signal; as a result, the external microcontroller can stop the operations of the three phases by receiving the fault signal. The external microcontroller can also shut down IC operations by inputting a fault signal to the FO pin. In the following functional descriptions, “HOx” denotes a gate input signal on the high-side transistor, whereas “LOx” denotes a gate input signal on the lowside transistor. “ VBx–HSx” refers to the voltages between the VBx pin and output pins (U, V/V1, and W1). 11.3.3 Undervoltage Lockout for Power Supply (UVLO) In case the gate-driving voltages of the output transistors decrease, their steady-state power dissipations increase. This overheating condition may cause permanent damage to the IC in the worst case. To prevent this event, the SX68000MH series has the undervoltage lockout (UVLO) circuits for both of the high- and low-side power supplies. 11.3.3.1. Undervoltage Lockout for Highside Power Supply (UVLO_VB) 11.3.1 Fault Signal Output In case one or more of the following protections are actuated, an internal transistor, QFO, turns on, then the FO pin becomes logic low (≤0.5 V). ● Low-side undervoltage lockout (UVLO_VCC) ● Overcurrent protection (OCP) ● Thermal shutdown (TSD) While the FO pin is in the low state, all the low-side transistors turn off. In normal operation, the FO pin outputs a high signal of 5 V. OCP The fault signal output time of the FO pin at OCP activation is the OCP hold time (tP) of 25 μs (typ.), fixed by a built-in feature of the IC itself (see Section 11.3.5). The external microcontroller receives the fault signals with its interrupt pin (INT), and must be programmed to put the HINx and LINx pins to logic low within the predetermined OCP hold time, tP. 11.3.2 Figure 11-10 shows operational waveforms of the undervoltage lockout for high-side power supply (i.e., UVLO_VB). When the voltage between the VBx and output pins (VBx–HSx) decreases to the Logic Operation Stop Voltage (VBS(OFF) = 10.0 V) or less, the UVLO_VB circuit in the corresponding phase gets activated and sets an HOx signal to logic low. When the voltage between the VBx and HSx pins increases to the Logic Operation Start Voltage (VBS(ON) = 10.5 V) or more, the IC releases the UVLO_VB operation. Then, the HOx signal becomes logic high at the rising edge of the first input command after the UVLO_VB release. Any fault signals are not output from the FO pin during the UVLO_VB operation. In addition, the VBx pin has an internal UVLO_VB filter of about 3 μs, in order to prevent noise-induced malfunctions. HINx Shutdown Signal Input The FO pin also acts as the input pin of shutdown signals. When the FO pin becomes logic low, all the low-side transistors turn off. The voltages and pulse widths of the shutdown signals to be applied between the FO and COMx pins are listed in Table 11-2. 0 LINx 0 UVLO_VB operation VBx-HSx VBS(OFF) Table 11-2. Shutdown Signals VBS(ON) UVLO release 0 Parameter Input Voltage Input Pulse Width High Level Signal Low Level Signal 3 V < VIN < 5.5 V 0 V < VIN < 0.5 V — ≥6 μs HOx About 3 µs HOx restarts at positive edge after UVLO_VB release. 0 LOx 0 FO No FO output at UVLO_VB. 0 Figure 11-10. SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 UVLO_VB Operational Waveforms 20 SX68000MH Series 11.3.3.2. Undervoltage Lockout for Lowside Power Supply (UVLO_VCC) Figure 11-11 shows operational waveforms of the undervoltage lockout for low-side power supply (i.e., UVLO_VCC). When the VCC2 pin voltage decreases to the Logic Operation Stop Voltage (VCC(OFF) = 11.0 V) or less, the UVLO_VCC circuit in the corresponding phase gets activated and sets both of HOx and LOx signals to logic low. When the VCC2 pin voltage increases to the Logic Operation Start Voltage (VCC(ON) = 11.5 V) or more, the IC releases the UVLO_VCC operation. Then, the IC resumes the following transmissions: an LOx signal according to an LINx pin input command; an HOx signal according to the rising edge of the first HINx pin input command after the UVLO_VCC release. During the UVLO_VCC operation, the FO pin becomes logic low and sends fault signals. In addition, the VCC2 pin has an internal UVLO_VCC filter of about 3 μs, in order to prevent noise-induced malfunctions. OCL circuit is activated. Then, the OCL pin goes logic high. During the OCL operation, the gate logic levels of the low-side transistors respond to an input command on the LINx pin. To turn off the high-side transistors during the OCL operation, connect the OCL and SD pins on a PCB. The SD pin has an internal filter of about 3.3 μs (typ.). When the LS pin voltage falls below VLIM (0.6500 V), the OCL pin logic level becomes low. After the OCL pin logic has become low, the highside transistors remain turned off until the first low-tohigh transition on an HINx input signal occurs (i.e., edge-triggered). U1 0.65 V 18 2 kΩ 10 OCL Filter 2 kΩ LS 200 kΩ 200 kΩ 15 COM2 HINx Figure 11-12. 0 Internal Circuit Diagram of OCL Pin LINx HINx 0 UVLO_VCC operation VCC2 VCC(OFF) 0 VCC(ON) LINx 0 0 LS HOx VLIM 0 About 3 µs LOx responds to input signal. 0 LOx tBK(OCP) OCL (SD) 0 0 FO 0 3.3 µs (typ.) HOx restarts at positive edge after OCL release. HOx Figure 11-11. UVLO_VCC Operational Waveforms 0 LOx 11.3.4 Overcurrent Limit (OCL) The overcurrent limit (OCL) is a protection against relatively low overcurrent conditions. Figure 11-12 shows an internal circuit of the OCL pin; Figure 11-13 shows OCL operational waveforms. When the LS pin voltage increases to the Current Limit Reference Voltage (VLIM = 0.6500 V) or more, and remains in this condition for a period of the Current Limit Blanking Time (tBK(OCP) = 2 μs) or longer, the 0 Figure 11-13. SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 OCL Operational Waveforms (OCL = SD) 21 SX68000MH Series 11.3.5 Overcurrent Protection (OCP) The overcurrent protection (OCP) is a protection against large inrush currents (i.e., high di/dt). Figure 11-14 is an internal circuit diagram describing the LS pin and its peripheral circuit. The OCP circuit, which is connected to the LS pin, detects overcurrents with voltage across an external shunt resistor, R S. Because the LS pin is internally pulled down, the LS pin voltage increases proportionally to a rise in the current running through the shunt resistor, RS. U1 VBB1 ● Keep the current through the output transistors below the rated output current (pulse), IOP (see Section 1). It is required to use a resistor with low internal inductance because high-frequency switching current will flow through the shunt resistor, R S. In addition, choose a resistor with allowable power dissipation according to your application. Note that overcurrents are undetectable when one or more of the U, V/V1/V2, and W1/W2 pins or their traces are shorted to ground (ground fault). In case any of these pins falls into a state of ground fault, the output transistors may be destroyed. 27 VTRIP HINx - 2 kΩ + 200 kΩ Output SW turn-off and QFO turn-on Blanking filter 1.65 µs (typ.) 0 LINx 0 LS 15 COM2 DRS 18 LS VTRIP RS 0 tBK HOx responds to input signal. HOx COM Figure 11-14. tBK tBK Internal Circuit Diagram of LS Pin and Its Peripheral Circuit 0 LOx 0 Figure 11-15 is a timing chart that represents operation waveforms during OCP operation. When the LS pin voltage increases to the OCP Threshold Voltage (VTRIP = 1.0 V) or more, and remains in this condition for a period of the OCP Blanking Time (tBK = 2 μs) or longer, the OCP circuit is activated. The enabled OCP circuit shuts off the low-side transistors, and puts the FO pin into a low state. Then, output current decreases as a result of the output transistors turn-off. Even if the OCP pin voltage falls below VTRIP, the IC holds the FO pin in the low state for a fixed OCP hold time (tP) of 25 μs (typ.). Then, the output transistors operate according to input signals. The OCP is used for detecting abnormal conditions, such as an output transistor shorted. In case short-circuit conditions occur repeatedly, the output transistors can be destroyed. To prevent such event, motor operation must be controlled by the external microcontroller so that it can immediately stop the motor when fault signals are detected. To resume IC operations thereafter, set the IC to be resumed after a lapse of ≥2 seconds. For proper shunt resistor setting, your application must meet the following: ● Use the shunt resistor that has a recommended resistance, RS (see Section 2). ● Set the LS pin input voltage to vary within the rated LS pin voltages, VLS (see Section 1). FO restarts automatically after tP. FO tP 0 Figure 11-15. 11.3.6 OCP Operational Waveforms Thermal Shutdown (TSD) The SX68000MH series incorporates the thermal shutdown (TSD) circuit. Figure 11-16 shows TSD operational waveforms. In case of overheating (e.g., increased power dissipation due to overload, or elevated ambient temperature at the device), the IC shuts down the low-side output transistors. The TSD circuit in the MIC monitors temperatures (see Section 6). When the temperature of the MIC exceeds the TSD Operating Temperature (T DH = 150 °C), the TSD circuit is activated. When the temperature of the MIC decreases to the TSD Releasing Temperature (TDL = 120 °C) or less, the shutdown operation is released. The transistors then resume operating according to input signals. During the TSD operation, the FO pin becomes logic low and transmits fault signals. Note that junction temperatures of the output transistors themselves are not monitored; therefore, do not use the TSD function as an overtemperature prevention for the output transistors. SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 22 SX68000MH Series 12.2 Considerations in IC Characteristics Measurement HINx 0 When measuring the breakdown voltage or leakage current of the transistors incorporated in the IC, note that the gate and emitter (source) of each transistor should have the same potential. Moreover, care should be taken during the measurement because each transistor is connected as follows: LINx 0 TSD operation Tj(MIC) TDH TDL 0 HOx 0 LOx responds to input signal. LOx 0 FO 0 Figure 11-16. TSD Operational Waveforms 12. Design Notes 12.1 PCB Pattern Layout Figure 12-1 shows a schematic diagram of a motor drive circuit. The circuit consists of current paths having high frequencies and high voltages, which also bring about negative influences on IC operation, noise interference, and power dissipation. Therefore, PCB trace layouts and component placements play an important role in circuit designing. Current loops, which have high frequencies and high voltages, should be as small and wide as possible, in order to maintain a low-impedance state. In addition, ground traces should be as wide and short as possible so that radiated EMI levels can be reduced. 34 27 ● All the high-side transistors (drains) are internally connected to the VBBx pin. ● In the U-phase, the high-side transistor (source) and the low-side toransistor (drain) are internally connected, and are also connected to the U pin. (In the V- and W-phases, the high- and low-side transistors are unconnected inside the IC.) The gates of the high-side transistors are pulled down to the corresponding output (U, V/V1, and W1) pins; similarly, the gates of the low-side transistors are pulled down to the COM2 pin. When measuring the breakdown voltage or leakage current of the transistors, note that all of the output (U, V/V1/V2, and W1/W2), LS, and COMx pins must be appropriately connected. Otherwise, the switching transistors may result in permanent damage. The following are circuit diagrams representing typical measurement circuits for breakdown voltage: Figure 12-2 shows the high-side transistor (QUH) in the U-phase; Figure 12-3 shows the low-side transistor (QUL) in the U-phase. And all the pins that are not represented in these figures are open. When measuring the high-side transistors, leave all the pins not be measured open. When measuring the low-side transistors, connect the LS pin to be measured to the COMx pin, then leave other unused pins open. QWH VBB1 27 34 VBB2 QVH QUH VBB2 VBB1 V VDC 31 W1 29 V1 23 U COM1 5 MIC 31 MIC V1 29 U 23 V2 21 W2 19 18 Figure 12-1. W1 21 V2 19 W2 Ground traces should be wide and short. QWL QVL QUL M COM2 15 18 LS LS High-frequency, high-voltage current loops should be as small and wide as possible. Figure 12-2. Typical Measurement Circuit for Highside Transistor (QUH) in U-phase High-frequency, High-voltage Current Paths SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 23 SX68000MH Series QWH 13.1.1 27 VBB1 QVH QUH 34 VBB2 31 W1 29 V1 U 23 21 V2 COM1 5 MIC 19 W2 QWL QVL QUL V COM2 15 18 Power MOSFET Steady-state Loss, PRON Steady-state loss in a power MOSFET can be computed by using the RDS(ON) vs. ID curves, listed in Section 14.3.1. As expressed by the curves in Figure 13-1, linear approximations at a range the ID is actually used are obtained by: RDS(ON) = α × ID + β. The values gained by the above calculation are then applied as parameters in Equation (4), below. Hence, the equation to obtain the power MOSFET steady-state loss, PRON, is: LS PRON = Figure 12-3. Typical Measurement Circuit for Lowside Transistor (QUL) in U-phase 13. Calculating Power Losses and Estimating Junction Temperature This section describes the procedures to calculate power losses in switching transistors, and to estimate a junction temperature. Note that the descriptions listed here are applicable to the SX68000MH series, which is controlled by a 3-phase sine-wave PWM driving strategy. For quick and easy references, we offer calculation support tools online. Please visit our website to find out more. ● DT0050: SX68000MH Calculation Tool http://www.semicon.sanken-ele.co.jp/en/calctool/mosfet_caltool_en.html 1 π ∫ I (φ)2 × R DS(ON) (φ) × DT × dφ 2π 0 D 1 3 = 2√2α ( + M × cos θ) IM 3 3π 32 1 1 + 2β ( + M × cos θ) IM 2 . 8 3π (4) Where: ID is the drain current of the power MOSFET (A), RDS(ON) is the drain-to-source on-resistance of the power MOSFET (Ω), DT is the duty cycle, which is given by DT = 1 + M × sin(φ + θ) , 2 M is the modulation index (0 to 1), cosθ is the motor power factor (0 to 1), IM is the effective motor current (A), α is the slope of the linear approximation in the RDS(ON) vs. ID curve, and β is the intercept of the linear approximation in the RDS(ON) vs. ID curve. 13.1 Power MOSFET VCC = 15 V 4.0 3.5 3.0 RDS(ON) (Ω) Total power loss in a power MOSFET can be obtained by taking the sum of the following losses: steady-state loss, PRON; switching loss, PSW; the steadystate loss of a body diode, PSD. In the calculation procedure we offer, the recovery loss of a body diode, PRR, is considered negligibly small compared with the ratios of other losses. The following subsections contain the mathematical procedures to calculate these losses (PRON, PSW, and PSD) and the junction temperature of all power MOSFETs operating. y = 0.29x + 2.14 125°C 2.5 75°C 2.0 1.5 25°C 1.0 0.5 0.0 0.0 0.5 1.0 1.5 2.0 ID (A) Figure 13-1. SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 Linear Approximate Equation of RDS(ON) vs. ID Curve 24 SX68000MH Series 13.1.2 DT is the duty cycle, which is given by Power MOSFET Switching Loss, PSW Switching loss in a power MOSFET can be calculated by Equation (5) or (6), letting IM be the effective current value of the motor. ● SX68001MH PSW = VDC √2 × fC × αE × IM × . π 150 (5) DT = M is the modulation index (0 to 1), cosθ is the motor power factor (0 to 1), IM is the effective motor current (A), α is the slope of the linear approximation in the V SD vs. ISD curve, and β is the intercept of the linear approximation in the V SD vs. ISD curve. ● SX68003MH VDC √2 × fC × αE × IM × . π 300 1.2 1.0 (6) Where: fC is the PWM carrier frequency (Hz), VDC is the main power supply voltage (V), i.e., the VBBx pin input voltage, and αE is the slope on the switching loss curve (see Section 14.3.2). VSD (V) PSW = 1 + M × sin(φ + θ) , 2 25°C 0.8 y = 0.25x + 0.54 0.6 125°C 0.4 75°C 0.2 0.0 0.0 0.5 1.0 1.5 2.0 ISD (A) 13.1.3 Body Diode Steady-state Loss, PSD Steady-state loss in the body diode of a power MOSFET can be computed by using the V SD vs. ISD curves, listed in Section 14.3.1. As expressed by the curves in Figure 13-2, linear approximations at a range the ISD is actually used are obtained by: VSD = α × ISD + β. The values gained by the above calculation are then applied as parameters in Equation (7), below. Hence, the equation to obtain the body diode steady-state loss, PSD, is: PSD = 1 π ∫ V (φ) × ISD (φ) × (1 − DT) × dφ 2π 0 SD 1 1 4 = α( − M × cos θ) IM 2 2 2 3π √2 1 π + β ( − M × cos θ) IM . π 2 8 Figure 13-2. 13.1.4 Linear Approximate Equation of V SD vs. ISD Curve Estimating Junction Temperature of Power MOSFET The junction temperature of all power MOSFETs operating, TJ, can be estimated with Equation (8): TJ = R J−C × {(PRON + PSW + PSD ) × 6} + TC . (8) Where: RJ-C is the junction-to-case thermal resistance (°C/W) of all the power MOSFETs operating, and TC is the case temperature (°C), measured at the point defined in Figure 3-1. (7) Where: VSD is the source-to-drain diode forward voltage of the power MOSFET (V), ISD is the source-to-drain diode forward current of the power MOSFET (A), SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 25 SX68000MH Series 14. Performance Curves 14.1 Transient Thermal Resistance Curves The following graphs represent transient thermal resistance (the ratios of transient thermal resistance), with steadystate thermal resistance = 1. Ratio of Transient Thermal Resistance 1.00 0.10 0.01 0.001 0.01 Ratio of Transient Thermal Resistance Figure 14-1. 0.1 Time (s) 1 10 Transient Thermal Resistance: SX68001MH 1.00 0.10 0.01 0.001 0.01 Figure 14-2. 0.1 Time (s) 1 10 Transient Thermal Resistance: SX68003MH SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 26 SX68000MH Series 14.2 Performance Curves of Control Parts Figure 14-3 to Figure 14-27 provide performance curves of the control parts integrated in the SX68000MH series, including variety-dependent characteristics and thermal characteristics. TJ represents the junction temperature of the control parts. Table 14-1. Typical Characteristics of Control Parts Figure Number Figure 14-3 Figure 14-4 Figure 14-5 Figure 14-6 Figure 14-7 Figure 14-8 Figure 14-9 Figure 14-10 Figure 14-11 Figure 14-12 Figure 14-13 Figure 14-14 Figure 14-15 Figure 14-16 Figure 14-17 Figure 14-18 Figure 14-19 Figure 14-20 Figure 14-21 Figure 14-22 Figure 14-23 Figure 14-24 Figure 14-25 Figure 14-26 Figure 14-27 Figure 14-28 Figure Caption Logic Supply Current, ICC vs. TC (INx = 0 V) Logic Supply Current, ICC vs. TC (INx = 5 V) Logic Supply Current, ICC vs. VCCx Pin Voltage, VCC Logic Supply Current in 1-phase Operation (HINx = 0 V), IBS vs. TC Logic Supply Current in 1-phase Operation (HINx = 5 V), IBS vs. TC VBx Pin Voltage, VB vs. Logic Supply Current, IBS (HINx = 0 V) Logic Operation Start Voltage, VBS(ON) vs. TC Logic Operation Stop Voltage, VBS(OFF) vs. TC Logic Operation Start Voltage, VCC(ON) vs. TC Logic Operation Stop Voltage, VCC(OFF) vs. TC UVLO_VB Filtering Time vs. T C UVLO_VCC Filtering Time vs. T C High Level Input Signal Threshold Voltage, VIH vs. TC Low Level Input Signal Threshold Voltage, V IL vs. TC Input Current at High Level (HINx or LINx), I IN vs. TC High-side Turn-on Propagation Delay vs. TC (from HINx to HOx) Low-side Turn-on Propagation Delay vs. TC (from LINx to LOx) Minimum Transmittable Pulse Width for High-side Switching, tHIN(MIN) vs. TC Minimum Transmittable Pulse Width for Low-side Switching, tLIN(MIN) vs. TC SD Pin Filtering Time vs. TC FO Pin Filtering Time vs. TC Current Limit Reference Voltage, V LIM vs. TC OCP Threshold Voltage, VTRIP vs. TC OCP Hold Time, tP vs. TC OCP Blanking Time, tBK(OCP) vs. TC; Current Limit Blanking Time, tBK(OCL) vs. TC REG Pin Voltage, VREG vs. TC SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 27 VCCx = 15 V, HINx = 0 V, LINx = 0 V 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 Max. Typ. Min. -30 0 30 60 90 120 ICC (mA) ICC (mA) SX68000MH Series VCCx = 15 V, HINx = 5 V, LINx = 5 V 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 Max. Typ. Min. -30 150 0 30 Figure 14-3. Logic Supply Current, ICC vs. TC (INx = 0 V) Figure 14-4. HINx = 0 V, LINx = 0 V 3.8 120 150 VBx = 15 V, HINx = 0 V 200 Max. IBS (µA) 3.4 3.2 125°C 25°C 3.0 −30°C 2.8 150 Typ. Min. 100 50 2.6 0 12 13 14 15 16 17 18 19 20 -30 0 30 60 VCC (V) Figure 14-5. 90 120 150 TC (°C) Logic Supply Current, ICC vs. VCCx Pin Voltage, VCC Figure 14-6. Logic Supply Current in 1-phase Operation (HINx = 0 V), IBS vs. TC VBx = 15 V, HINx = 5 V 300 VBx = 15 V, HINx = 0 V 180 250 Max. 200 Typ. 150 Min. 100 160 140 IBS (µA) IBS (µA) 90 Logic Supply Current, ICC vs. TC (INx = 5 V) 250 3.6 ICC (mA) 60 TC (°C) TC (°C) 120 125°C 100 25°C 80 50 −30°C 60 0 40 -30 0 30 60 90 120 150 12 13 TC (°C) Figure 14-7. Logic Supply Current in 1-phase Operation (HINx = 5 V), IBS vs. TC 14 15 16 17 18 19 20 VB (V) Figure 14-8. SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 VBx Pin Voltage, VB vs. Logic Supply Current, IBS (HINx = 0 V) 28 11.5 11.3 11.1 10.9 10.7 10.5 10.3 10.1 9.9 9.7 9.5 Max. Typ. Min. -30 0 30 60 90 120 VBS(OFF) (V) VBS(ON) (V) SX68000MH Series 11.0 10.8 10.6 10.4 10.2 10.0 9.8 9.6 9.4 9.2 9.0 Max. Typ. Min. -30 150 0 30 TC (°C) Logic Operation Start Voltage, VBS(ON) vs. TC 12.5 12.3 12.1 11.9 11.7 11.5 11.3 11.1 10.9 10.7 10.5 Max. Typ. Min. -30 0 30 60 90 120 Figure 14-10. VCC(OFF) (V) VCC(ON) (V) Figure 14-9. Max. Typ. Min. -30 0 Typ. Min. 60 90 120 150 Figure 14-12. UVLO_VB Filtering Time (µs) UVLO_VB Filtering Time (µs) Max. 30 30 60 90 120 150 Logic Operation Stop Voltage, VCC(OFF) vs. TC 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 Max. Typ. Min. -30 0 TC (°C) Figure 14-13. 150 TC (°C) Logic Operation Start Voltage, VCC(ON) vs. TC 0 120 12.0 11.8 11.6 11.4 11.2 11.0 10.8 10.6 10.4 10.2 10.0 150 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -30 90 Logic Operation Stop Voltage, VBS(OFF) vs. TC TC (°C) Figure 14-11. 60 TC (°C) UVLO_VB Filtering Time vs. TC 30 60 90 120 150 TC (°C) Figure 14-14. SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 UVLO_VCC Filtering Time vs. TC 29 SX68000MH Series 2.6 2.0 2.4 1.8 2.0 Max. 1.8 Typ. 1.6 Min. 1.4 Max. 1.6 VIL (V) VIH (V) 2.2 1.4 Typ. 1.2 Min. 1.0 1.2 1.0 0.8 -30 0 30 60 90 120 150 -30 0 30 TC (°C) Figure 14-15. High Level Input Signal Threshold Voltage, VIH vs. TC Max. 300 250 Typ. 200 Min. 150 100 50 0 30 60 90 120 Max. Typ. 600 Min. 500 400 300 200 100 0 150 -30 0 30 60 90 120 150 TC (°C) Input Current at High Level (HINx or LINx), IIN vs. TC Figure 14-18. High-side Turn-on Propagation Delay vs. TC (from HINx to HOx) 400 700 350 600 Max. 500 Typ. 400 Min. 300 200 100 Max. 300 tHIN(MIN) (ns) Low-side Turn-on Propagation Delay (ns) 150 Low Level Input Signal Threshold Voltage, VIL vs. TC TC (°C) Figure 14-17. 120 700 0 -30 90 800 High-side Turn-on Propagation Delay (ns) 350 IIN (µA) Figure 14-16. INHx/INLx = 5 V 400 60 TC (°C) Typ. 250 Min. 200 150 100 50 0 0 -30 0 30 60 90 120 150 -30 TC (°C) Figure 14-19. Low-side Turn-on Propagation Delay vs. TC (from LINx to LOx) 0 30 60 90 120 150 TC (°C) Figure 14-20. Minimum Transmittable Pulse Width for High-side Switching, tHIN(MIN) vs. TC SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 30 SX68000MH Series 400 6 350 Max. 5 Typ. 4 250 Min. 200 tSD (ns) tLIN(MIN) (ns) 300 Max. 3 Typ. 150 2 Min. 100 1 50 0 0 -30 0 30 60 90 120 150 -30 0 30 60 TC (°C) 90 120 Figure 14-21. Minimum Transmittable Pulse Width for Low-side Switching, tLIN(MIN) vs. TC Figure 14-22. SD Pin Filtering Time vs. TC 0.750 6 0.725 5 4 Max. 3 Typ. 2 VLIM (ns) 0.700 tFO (ns) 150 TC (°C) Min. Max. 0.675 Typ. 0.650 Min. 0.625 0.600 1 0.575 0.550 0 -30 0 30 60 90 120 -30 150 0 30 FO Pin Filtering Time vs. TC 1.10 1.08 1.06 1.04 1.02 1.00 0.98 0.96 0.94 0.92 0.90 Figure 14-24. Max. Typ. Min. tP (µs) VTRIP (ns) Figure 14-23. 0 30 60 120 50 45 40 35 30 25 20 15 10 5 0 150 Max. Typ. Min. 90 120 0 150 OCP Threshold Voltage, VTRIP vs. TC 30 60 90 120 150 TC (°C) TC (°C) Figure 14-25. 90 Current Limit Reference Voltage, VLIM vs. TC -30 -30 60 TC (°C) TC (°C) Figure 14-26. SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 OCP Hold Time, tP vs. TC 31 SX68000MH Series 3.5 tBK (µs) 3.0 2.5 Max. 2.0 Typ. Min. 1.5 1.0 0.5 0.0 -30 0 30 60 90 120 150 10.0 9.5 9.0 8.5 8.0 7.5 7.0 6.5 6.0 5.5 5.0 Max. Typ. VREG (V) 4.0 Min. -30 0 TC (°C) Figure 14-27. OCP Blanking Time, tBK(OCP) vs. TC; Current Limit Blanking Time, tBK(OCL) vs. TC 30 60 90 120 150 TC (°C) Figure 14-28. SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 REG Pin Voltage, VREG vs. TC 32 SX68000MH Series 14.3 Performance Curves of Output Parts 14.3.1 Output Transistor Performance Curves 3.5 1.0 2.5 VSD (V) RDS(ON) (Ω) 1.2 25°C 125°C 3.0 75°C 2.0 1.5 0.8 0.6 75°C 0.4 25°C 1.0 SX68001MH VCCx = 15 V 4.0 SX68001MH 14.3.1.1. SX68001MH 125°C 0.2 0.5 0.0 0.0 0.0 0.5 1.0 1.5 2.0 0.0 0.5 1.0 ID (A) Figure 14-29. 1.5 2.0 ISD (A) Power MOSFET RDS(ON) vs. ID Figure 14-30. Power MOSFET VSD vs. ISD 1.2 25°C 25°C 1.0 125°C 75°C SX68003MH SX68003MH VCCx = 15 V 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 VSD (V) RDS(ON) (Ω) 14.3.1.2. SX68003MH 0.8 0.6 125°C 75°C 0.4 0.2 0.0 0.0 0.5 1.0 1.5 2.0 2.5 0.0 0.5 Figure 14-31. Power MOSFET RDS(ON) vs. ID 1.0 1.5 2.0 2.5 ISD (A) ID (A) Figure 14-32. SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 Power MOSFET VSD vs. ISD 33 SX68000MH Series 14.3.2 Switching Loss Curves Switching Loss, E, is the sum of turn-on loss and turn-off loss. 14.3.2.1. SX68001MH 50 VCC = 15 V 60 50 TJ = 125°C 40 TJ = 125°C E (µJ) E (µJ) 40 30 20 10 SX68001MH VB = 15 V 60 SX68001MH Conditions: VBBx pin voltage = 150 V, half-bridge circuit with inductive load. 30 20 10 TJ = 25°C 0 TJ = 25°C 0 0.0 0.5 1.0 1.5 2.0 0.0 0.5 ID (A) Figure 14-33. 1.0 1.5 2.0 ID (A) High-side Switching Loss Figure 14-34. Low-side Switching Loss 14.3.2.2. SX68003MH 300 VCC = 15 V 350 300 250 TJ = 125°C 200 E (µJ) E (µJ) 250 SX68003MH VB = 15 V 350 SX68003MH Conditions: VBBx pin voltage = 300 V, half-bridge circuit with inductive load. 150 100 TJ = 125°C 200 150 100 TJ = 25°C 50 50 0 TJ = 25°C 0 0.0 0.5 1.0 1.5 2.0 2.5 0.0 0.5 ID (A) Figure 14-35. High-side Switching Loss 1.0 1.5 2.0 2.5 ID (A) Figure 14-36. SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 Low-side Switching Loss 34 SX68000MH Series 14.4 Allowable Effective Current Curves The following curves represent allowable effective currents in 3-phase sine-wave PWM driving with parameters such as typical RDS(ON) or VCE(SAT), and typical switching losses. 14.4.1 SX68001MH Operating conditions: VBBx pin input voltage, VDC = 150 V; VCCx pin input voltage, VCC = 15 V; modulation index, M = 0.9; motor power factor, cosθ = 0.8; junction temperature, T J = 150 °C. fC = 2 kHz Allowable Effective Current (Arms) 2.0 1.5 1.0 0.5 0.0 25 50 75 100 125 150 TC (°C) Figure 14-37. Allowable Effective Current (fC = 2 kHz): SX68001MH fC = 16 kHz Allowable Effective Current (Arms) 2.0 1.5 1.0 0.5 0.0 25 50 75 100 125 150 TC (°C) Figure 14-38. Allowable Effective Current (fC = 16 kHz): SX68001MH SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 35 SX68000MH Series 14.4.2 SX68003MH Operating conditions: VBBx pin input voltage, VDC = 300 V; VCCx pin input voltage, VCC = 15 V; modulation index, M = 0.9; motor power factor, cosθ = 0.8; junction temperature, T J = 150 °C. fC = 2 kHz Allowable Effective Current (Arms) 1.5 1.2 0.9 0.6 0.3 (0.0) 25 50 75 100 125 150 TC (°C) Figure 14-39. Allowable Effective Current (fC = 2 kHz): SX68003MH fC = 16 kHz Allowable Effective Current (Arms) 1.5 1.2 0.9 0.6 0.3 (0.0) 25 50 75 100 125 150 TC (°C) Figure 14-40. Allowable Effective Current (fC = 16 kHz): SX68003MH SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 36 SX68000MH Series 15. Pattern Layout Example This section contains the schematic diagrams of a PCB pattern layout example using an SX68000MH series device. For details on the land pattern example of the IC, see Section 9. Figure 15-1. Pattern Layout Example (Two-layer Board) SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 37 SX68000MH Series IPM1 1 VB2 C2 C6 2 V VB32 36 VBB2 34 VB31 32 C7 4 VCC1 C3 W1 31 C8 5 6 7 8 CN3 10 R1 9 COM1 HIN3 V1 29 HIN2 HIN1 VBB1 27 9 SD CN1 CX1 1 VB1 24 2 C5 8 10 OCL 7 U 23 6 11 LIN3 12 LIN2 13 LIN1 14 REG 15 COM2 5 4 3 2 1 C1 CN2 V2 21 W2 19 3 2 1 C17 CN4 16 VCC2 6 5 17 FO R2 4 R8 18 LS 3 2 1 C10 C4 C9 Figure 15-2. C11 C12 R10 R9 Circuit Diagram of PCB Pattern Layout Example SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 38 SX68000MH Series 16. Typical Motor Driver Application This section contains the information on the typical motor driver application listed in the previous section, including a circuit diagram, specifications, and the bill of the materials used. ● Motor Driver Specifications IC SX68003MH Main Supply Voltage, VDC 300 VDC (typ.) Rated Output Power 50 W ● Circuit Diagram See Figure 15-2. ● Bill of Materials Symbol Part Type Electrolytic C1 Electrolytic C2 Electrolytic C3 Electrolytic C4 Ceramic C5 Ceramic C6 Ceramic C7 Ceramic C8 Ceramic C9 Ceramic C10 Ceramic C11 Ceramic C16 Ceramic C17 Ratings Symbol Part Type Ratings 22 μF, 35 V CX1 Film 0.01 μF, 630 V 22 μF, 35 V R1 R2 R8* R9* R10* IPM1 CN1 CN2 CN3 CN4 General 0 Ω, 1/8 W General 4.7 kΩ, 1/8 W Metal plate 10 kΩ, 1/8 W Metal plate 1 Ω, 2 W General Open IC SX68003MH Pin header Equiv. to B2P3-VH Pin header Equiv. to B2P5-VH Connector Equiv. to MA10-1 Connector Equiv. to MA06-1 22 μF, 35 V 47 μF, 35 V 0.1 μF, 50 V 0.1 μF, 50 V 0.1 μF, 50 V 0.1 μF, 50 V 0.1 μF, 50 V 0.1 μF, 50 V 0.1 μF, 50 V 100 pF, 50 V 0.1 μF, 50 V * Refers to a part that requires adjustment based on operation performance in an actual application. SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 39 SX68000MH Series Important Notes ● All data, illustrations, graphs, tables and any other information included in this document (the “Information”) as to Sanken’s products listed herein (the “Sanken Products”) are current as of the date this document is issued. The Information is subject to any change without notice due to improvement of the Sanken Products, etc. Please make sure to confirm with a Sanken sales representative that the contents set forth in this document reflect the latest revisions before use. ● The Sanken Products are intended for use as components of general purpose electronic equipment or apparatus (such as home appliances, office equipment, telecommunication equipment, measuring equipment, etc.). Prior to use of the Sanken Products, please put your signature, or affix your name and seal, on the specification documents of the Sanken Products and return them to Sanken. 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DSGN-CEZ-16003 SX68000MH-DSE Rev.2.3 SANKEN ELECTRIC CO., LTD. Jun. 16, 2020 http://www.sanken-ele.co.jp/en/ © SANKEN ELECTRIC CO., LTD. 2018 40