LA4809M

Ordering number : ENA1569A LA4809M Overview Monolithic Linear IC Stereo Headphone Amplifier LA4809M is a 2-channels power amplifier to drive the headphone with wide supply voltage range. To minimize the effects of power supply, the regulator circuit for control of the output power is built-in to enable setting of the output power value adequate for the headphone amplifier (2 types of set value available). This product also has the standby function, and is suitable as a driver for wide-ranging headphone. Applications Headphone driver for TV and audio equipment Features • 2-channels power amplifier built-in (maximum output power value changeable according to the setting) Maximum output power A = 55mW Standard (Pin 10 : Open) Maximum output power B = 160mW Standard (Pin 10 : GND) *VCC = 12V, RL = 16Ω, THD = 10% *Change to another power value possible by adding the external parts • Regulator built-in : Limited change of the output power value due to fluctuation of supply voltage High-Ripple rejection ratio • Standby function (also used for voice muting) : Current drain at standby = 0.01μA Standard (VCC = 12V) • Overheat protection circuit built-in • Wide supply voltage range (differing according to the set value of maximum output power) : VCC = 3.6V to 17V Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. O2809 SY 20091023-S00004 / O2109 SY PC No.A1569-1/15 LA4809M Specifications Maximum Ratings at Ta = 25°C Parameter Maximum supply voltage Allowable power dissipation Maximum junction temperature Operating temperature Storage temperature Symbol VCC max Pd max Tj max Topr Tstg Without signal * Mounted on a printed circuit board. Conditions Ratings 18 1.75 150 -30 to +75 -40 to +150 Unit V W °C °C °C * Evaluation board of SANYO Semiconductor : 50mm × 50mm × 0.8mm (Glass epoxy double-side PCB) Operating Conditions at Ta = 25°C Parameter Recommended supply voltage Recommended load resistance Operating supply voltage range Symbol VCC RL VCC op-1 VCC op-2 VCC op-3 mode-B (for PO max = 160mW) mode-A (for PO max = 55mW) * Depending on the output power value when the external part is added Conditions Ratings 12 16 to 32 6.2 to 17 4.2 to 17 3.6 to 17 Unit V Ω V V V * Determine the supply voltage with due consideration of the allowable power dissipation. * Note that the supply voltage range is limited depending on the setting of the maximum output power value. Electrical Characteristics at Ta = 25°C, VCC = 12V, RL = 16Ω, fin = 1kHz, V3 = 2V, Pin 10 : open Parameter Quiescent current drain Standby current drain Maximum output power-A Maximum output power-B Voltage gain Channel balance Total harmonic distortion Output noise voltage Channel separation Mute attenuation level Ripple rejection ratio Pin 2 voltage-A Pin 2 voltage-B STBY control HIGH voltage STBY control LOW voltage Symbol ICCOP ISTBY POMAXA POMAXB VG CHB THD VNOUT CHsep VMT SVRR V2A V2B VSBH VSBL No signal No signal, Standby mode (V3 = 0.3V) THD = 10%, mode-A THD = 10%, mode-B (Pin 10 : gnd) Vin = -20dBV Vin = -20dBV Vin = -20dBV Rg = 620Ω, 20 to 20kHz Vin = -15dBV Vin = -10dBV, Standby mode (V3 = 0.3V) Rg = 620Ω, fr = 100Hz, Vr = -10dBV mode-A mode-B (Pin 10 : gnd) (Circuit power mode) (Circuit standby mode) 2 0 60 -80 70 30 87 10.2 -1.5 Conditions min Ratings typ 3.8 0.01 55 160 11.7 0 0.15 18 72 -88 81 2.1 3.1 9 0.6 13.2 +1.5 0.7 50 max 6.5 5 mA μA mW mW dB dB % μVrms dB dBV dB V V V V Unit * mode-A (Pin 10 = open) : PO max = 55mW Pin 2 voltage : V2 = 2.1V, Internal regulator voltage : Vreg = 2 × V2 = 4.2V, Amp operating reference voltage : Vref = 1 × V2 = 2.1V mode-B (Pin 10 = gnd) : PO max = 160mW Pin 2 voltage : V2 = 3.1V, Internal regulator voltage : Vreg = 2 × V2 = 6.2V, Amp operating reference voltage : Vref = 1 × V2 = 3.1V No.A1569-2/15 LA4809M Package Dimensions unit : mm (typ) 3384 2.0 Pd max -- Ta SANYO evaluation board Mounted on a specified board (evaluation board of SANYO Semiconductor) : 50mm × 50mm × 0.8mm (glass epoxy double-side PCB) TOP VIEW 5.0 SIDE VIEW BOTTOM VIEW (3.4) Maximum power dissipation, Pd max -- W 1.75 1.5 12 0.63 (2.6) 4.4 6.4 1.0 1.05 0.5 0.3 1 2 0.3 0.8 0.15 Independent IC 0.18 (0.5) 1.7 MAX 0 – 30 – 20 0 20 40 60 75 80 100 SIDE VIEW (1.5) Ambient temperature, Ta -- °C 0.05 SANYO : MFP12S(225mil) Evaluation board Copper foil pattern diagram (Dimensions : 50mm × 50mm × 0.8mm) Top Layer (Top view) Bottom Layer (Top view) No.A1569-3/15 LA4809M Block Diagram and Sample Application Circuit Vin2 *Output power limiter setting Pin 10 open PO max = 55mW Pin 10 gnd PO max = 160mW + 12 IN2 11 NC 10 PLS 9 OUT2 8 NC 7 GND + Vref = Vrf + Vrf IN1 1 RF 2 BIAS STBY 3 OUT1 4 NC 5 6 VCC GND V REG VCC + Vin1 from CPU Test Circuit Diagram 620Ω S1 Load resistance 16Ω VOUT2 + 100μF 8 NC 7 GND 1μF S12 0.1μF 12 IN2 11 NC 10 PLS 9 OUT2 IN1 1 0.1μF RF 2 STBY 3 OUT1 4 + NC 5 VCC 6 S11 100μF VOUT1 Load resistance 16Ω VCC 2.2μF SG 620Ω Vstby No.A1569-4/15 LA4809M Pin Functions Pin No. 1 12 Pin Name IN1 IN2 Pin Voltage (V) mode-A 2.1 mode-B 3.1 Amplifier input pin. Description Equivalent Circuit VCC VCC OUT 1 12 45kΩ VREF 2 RF 2.1 3.1 Reference voltage pin. VCC 39μA VCC 2 54kΩ 26kΩ 77kΩ PLS-cnt STBY-cnt ×2 ×1 VREG VREF 3 STBY Applied Applied Standby control pin. (to which the external voltage is applied) VCC VCC 3 35kΩ 45kΩ 4 9 OUT1 OUT2 2.1 3.1 Amplifier output pin. VREG IN + - VCC VCC 4 9 10kΩ VREF 5 8 11 6 7 10 VCC GND PLS Applied GND 0.69 Applied GND GND Power pin. (to which the external voltage is applied) GND pin. Output power selection pin. NC NC pin. VCC VCC 22μA 10 10kΩ No.A1569-5/15 LA4809M Cautions for use 1. Input coupling capacitors (Cin1, Cin2) Cin1 (Cin2) is an input coupling capacitor, which is intended for DC cut. This capacitor forms a high pass filter together with the internal resistance of 45kΩ attenuating the bass frequency signal. Set the capacitance value with due consideration of the cut-off frequency. Note that the cut-off frequency is expressed as follows : 1ch ⇒ fc1 = 1/ (2π × Cin1 × 45000) 2ch ⇒ fc2 = 1/ (2π × Cin2 × 45000) This capacitor also affects the pop noise at a time of falling. Note that setting the higher capacitance value causes delay of the capacitor discharge rate, causing louder pop noise. 2. Output coupling capacitors (Cout1, Cout2) Cout1 (Cout2) is an output coupling capacitor, which is intended for DC cut. This capacitor forms a high pass filter together with the load impedance of RL, attenuating the bass frequency signal. Set the capacitance value with due consideration of the cut-off frequency. Normally, the chemical capacitor is used. When setting the capacitance value, take into account the characteristics of the chemical capacitor, namely, the capacitance value of chemical capacitor tends to decrease at low temperature. Note that the cut-off frequency is expressed as follows : 1ch ⇒ fc3 = 1/ (2π × Cout1 × RL) 2ch ⇒ fc4 = 1/ (2π × Cout2 × RL) This capacitor also affects the pop noise at a time of rising. Note that setting the higher capacitance value causes louder pop noise. 3. Power supply line capacitor (CVCC) CVCC is intended to stabilize the power supply line. Arrange this capacitor as near to IC as possible and always use the ceramic capacitor with superior high frequency characteristics. Increase the capacitance value when the power supply line is relatively unstable. 4. Pin 2 capacitor (Crf) Crf is a capacitor to determine the transient response characteristics of the Pin 2 voltage (reference voltage) : Vrf. At a time of rising, this is charged by the internal constant-current source (about 39μA). At a time of falling, this is discharged by the internal resistance (about 157kΩ). Due attention must be paid because pop noise and the amplifier rise / fall time change depending on the transient response characteristics of Pin 2 voltage. Decreasing the capacitance value to shorten the response time, pop noise becomes louder. Therefore, the use of the value shown below as the capacitance value is recommended. As this capacitor reduces the power supply ripple component, decrease in the capacitance value results in lowering of the ripple removal ratio. Crf recommended values : 1μF to 3.3μF 5. Voltage gain The voltage gain of amplifier is determined by the internal resistance and is fixed at about 11.7dB. When the output level is to be changed, attempt attenuation with the resistor in the forward stage of input as shown in Fig.1. To enhance the degree of attenuation, use two resistors as shown in Fig.2 so as to reduce internal-resistor variation factors. Though attenuation in the backward stage of output as shown in Fig.3 is possible, this may cause decrease in the maximum output power. OUT other IC IN LA4809M OUT other IC IN LA4809M OUT + LA4809M (Low attenuation degree) Fig.1 (High attenuation degree) Fig.2 Fig.3 6. Load capacitance When connecting a capacitor between the output pin and GND for an anti-electric wave radiation measure, this capacitor may cause decrease in the phase margin of power amplifier, resulting in the oscillation phenomenon. When connecting this capacitor, pay attention to its capacitance value. Recommended capacitance value : 560pF or less, or 0.01μF to 0.1μF No.A1569-6/15 LA4809M 7. Selection of the maximum output power value (handling of Pin 10) This IC enables selection of two types of maximum output power value according to the handling method of Pin 10. The regulator circuit for output power control is built in, in which, by changing the voltage of Pin 2, the regulator voltage : Vreg is changed to enable selection of the maximum output power value. Mode-A (PO max = 55mW) : Pin 10 set to the OPEN state Pin 2 voltage : V2 = 2.1V, Internal regulator voltage : Vreg = 4.2V, Amplifier operating reference voltage : Vref = 2.1V Mode-B (PO max = 160mW) : Pin 10 connected to the GND line Pin 2 voltage : V2 = 3.1V, Internal regulator voltage : Vreg = 6.2V, Amplifier operation reference voltage : Vref = 3.1V When the maximum output power value is to be changed under CPU VCC control, use the NPN transistor as shown in Fig.4, so that the Pin 10 22μA PLS voltage approaches the GND potential (0.1V or below) sufficiently. 10 10kΩ from CPU Fig.4 8. Change of the maximum output power value (by handling Pin 2) Pin 2 voltage : V2 is determined from the constant-current source and internal resistance as shown in Fig.5. Operating ⇒ Mode-A : 54kΩ used Mode-B : 80kΩ (54kΩ + 26kΩ) used Not operating (at a time of falling) ⇒ 157kΩ (54kΩ + 26kΩ + 77kΩ) used The internal regulator voltage and amplifier operating reference voltage are generated from this Pin 2 voltage. Regulator voltage : Vreg = V2 × 2 Amplifier operating reference voltage : Vref = V2 × 1 Accordingly, to change the maximum output power value, connect the resistance : Rrf between Pin 2 and GND as shown in Fig.5. This will cause change in the Pin 2 voltage. Note that, in view of circuit operation, the Pin 2 voltage must be set to 1.6V or above. If the discharge constant is not to be changed, Use the NPN transistor to control the Rrf connection as shown in Fig.6. VCC 39μA RF 2 Rrf Crf PLS-cnt 54kΩ 26kΩ 77kΩ STBY-cnt from CPU 3 STBY Crf Rrf 2 RF Fig.5 Fig.6 9. Standby pin (Pin 3) By controlling the standby pin, the mode can be changed over between standby and operation. Though this control is possible directly by the CPU output port, the control may be exposed to adverse affect of digital noise from CPU. It is recommended therefore to insert series resistance (1kΩ or more). Standby mode ⇒ V3 = 0V to 0.6V Operation mode ⇒ V3 = 2V to 9V (for VCC = 9V or above), V3 = 2V to VCC (for VCC = less than 9V) Continued on next page. No.A1569-7/15 LA4809M Continued from preceding page. When the standby function is not to be used, Pin 3 may be interlocked with power supply as shown in Fig.7. However, due care must be taken in this case because such interlock makes the effectiveness of the pop noise reduction circuit null, resulting in extremely large pop noise at a time of rising and falling. There are also methods to reduce the pop noise by using two capacitors as shown in Fig.8. If pop noise is to be suppressed sufficiently, CPU control of the standby pin is recommended. Note that the approximate inrush current; I3 into the standby pin is calculated as follows : Pin 3 inrush current (unit : A) : I3 = (5 × VCC - 4) × 10-5 /Rst 6 VCC 6 VCC Rst VCC 3 STBY VCC + Cst1 Rst + Cst2 3 STBY Fig.7 Fig.8 10. Operating power supply voltage range The applicable power supply voltage range varies depending on the setting conditions of the maximum output power value. Use this range while taking into account the Pin 2 voltage. As a guideline, the supply voltage at the lowest point to be used must be two times the Pin 2 voltage. Note that the minimum operating supply voltage must be 3.6V. mode-B ⇒ VCC op = 6.2V to 17V mode-A ⇒ VCC op = 4.2V to 17V At change of the output power value due to external resistance ⇒ VCC op = 2 × V2 to 17V (V2 ⇒ Pin 2 voltage) 11. Handling of NC pins (Pins 5, 8, and 11) NC pins are not connected to anything internally and may be left in the OPEN state. To enhance the heat sink effect as much as possible, connection of NC pins to the GND line is recommended. In particular, Pin 5 should be connected to the GND line so as to protect Pin 4 (the first output). If the pins 4 and 5 section and the pins 5 and 6 section are bridged with solder simultaneously, the output pin enters the powering (short to power) state, allowing the large current to flow into the output pin, resulting in deterioration or damage of internal elements. Risk of deterioration or damage may be reduced when Pin 5 is connected to GND. When the output pin voltage is about 0.7V or less, drive and power stages of the power amplifier circuit used becomes inoperable. In this context, the protection in case of ground fault is provided. 12. Heat protective circuit The heat protective circuit is incorporated in IC and can reduce the risk of damage/deterioration in case of abnormal heat generation due to certain reasons. This protective circuit is activated when the junction temperature : Ti of the chip in IC increases to about 160°C, shutting OFF current supply to the power amplifier. The signal is not output anymore. When the chip temperature lowers (to about 130°C), the circuit is automatically reset. Note that this circuit is not always capable of preventing damage/deterioration and should be handled with utmost care. In case of abnormal heating, turn OFF power supply immediately and identify the probable causes. 13. Short-circuit between pins Power ON while leaving the pins in the short-circuit state may cause deterioration or damage. When installing IC to the substrate, check if pins are short-circuited with solder before turning power supply ON. 14. Load short-circuit Leaving the loads in the short-circuit state over a long period of time may cause deterioration or damage. Never short-circuit loads. 15. Maximum rating When the product is used near the maximum rating, even the smallest change in the conditions may cause exceeding of the maximum rating, possibly leading to the fracture accident. Take the sufficient fluctuation margin for the supply voltage and always use the product within a range never exceeding the maximum rating. The package used for this IC has the low heat sink effect as a single unit. When the working supply voltage is high, solder the backside heat sink pad to ensure sufficient heat sink performance with copper foil of printed circuit board. No.A1569-8/15 LA4809M 100 7 5 3 2 10 7 5 3 2 1 7 5 3 2 0.1 1 2 3 5 7 10 2 3 5 7 100 THD -- PO Total harmonic distortion, THD -- % Total harmonic distortion, THD -- % mode-A VCC = 12V fin = 1kHz RL =3 2Ω 16 Ω 100 7 5 3 2 10 7 5 3 2 1 7 5 3 2 0.1 1 THD -- PO mode-B VCC = 12V fin = 1kHz RL = 32Ω 2 3 5 7 10 2 3 5 7 100 16Ω 2 3 5 7 1000 Output power, PO -- mW 70 PO -- VCC Output power, PO -- mW 180 PO -- VCC Output power, PO -- mW Output power, PO -- mW 60 mode-A RL = 16Ω fin = 1kHz V3 = 2V THD = 10% 160 mode-B RL = 16Ω fin = 1kHz V3 = 2V THD = 10% 140 50 1% 1% 40 120 100 30 80 20 4 6 8 10 12 14 16 18 60 4 6 8 10 12 14 16 18 Supply voltage, VCC -- V 40 PO -- VCC Supply voltage, VCC -- V 110 100 PO -- VCC Output power, PO -- mW THD = 10% 30 Output power, PO -- mW 35 mode-A RL = 32Ω fin = 1kHz V3 = 2V mode-B RL = 32Ω fin = 1kHz V3 = 2V THD = 10% 90 80 70 60 50 40 1% 25 1% 20 15 4 6 8 10 12 14 16 18 30 4 6 8 10 12 14 16 18 Supply voltage, VCC -- V 0.4 THD -- VCC Supply voltage, VCC -- V PO = 10mW fin = 1kHz RL = 16Ω 0.5 THD -- VCC Total harmonic distortion, THD -- % Total harmonic distortion, THD -- % PO = 1mW fin = 1kHz RL = 16Ω 0.4 0.3 0.3 0.2 0.2 0.1 mode-A mode-B mode-B 0.1 mode-A 0 2 4 6 8 10 12 14 16 18 0 3 4 5 6 7 8 Supply voltage, VCC -- V Supply voltage, VCC -- V No.A1569-9/15 LA4809M 1 THD -- f Output noise voltage, VNO -- μVrms Total harmonic distortion, THD -- % 7 VCC = 12V PO = 10mW RL = 16Ω 18 Rg = 620Ω Din audio filter VNO -- VCC 5 17 RL = 32Ω 16Ω 3 2 16 0.1 10 23 5 7 100 23 e-A mod e-B mod 5 7 1k 23 5 7 10k 23 5 7100k 15 4 6 8 10 12 14 16 18 Frequency, f -- Hz 20 VG -- fin VCC = 12V Vin = -20dBV RL = 16Ω Cout = 100μF Voltage gain, VG -- dB Supply voltage, VCC -- V 13 VG -- VCC Vin = -20dBV fin = 1kHz Cout = 100μF Voltage gain, VG -- dB 15 12.5 10 12 RL = 32Ω 16Ω 5 11.5 0 10 23 5 7 100 23 5 7 1k 23 5 7 10k 23 5 7100k 11 4 6 8 10 12 14 16 18 Input frequency, f in -- Hz 1.6 Pd -- PO fin = 1kHz RL = 16Ω 7V =1 Power dissipation, Pd -- W Supply voltage, VCC -- V 1.0 Pd -- PO fin = 1kHz RL = 32Ω =1 7V V CC Power dissipation, Pd -- W 0.8 1.2 V CC 0.6 0.8 V 12 12 0.4 V 9V 0.4 9V 0.2 7V 0 1 2 3 5 7 10 2 3 5 7 100 2 3 5 7 1000 0 1 2 3 5 7 10 2 3 5 7 100 2 3 5 7 1000 Output power, PO -- mW/ch 1 7 5 ICC -- PO Output power, PO -- mW/ch 0.1 7 5 ICC -- PO VCC = 12V fin = 1kHz RL = 16Ω Current drain, ICC -- A VCC = 12V fin = 1kHz RL = 32Ω Current drain, ICC -- A 3 2 3 2 0.1 7 5 3 2 0.01 7 5 3 2 0.01 1 2 3 5 7 10 2 3 5 7 100 2 3 5 7 1000 0.001 1 2 3 5 7 10 2 3 5 7 100 2 3 5 71000 Output power, PO -- mW/ch Output power, PO -- mW/ch No.A1569-10/15 LA4809M 90 CHsep -- fin Channel separation, CHsep -- dB Channel separation, CHsep -- dB VCC = 12V Vin = -15dBV Rg = 620Ω SEP = Vin-Vout 80 CHsep -- VCC Vin = -15dBV fin = 1kHz Rg = 620Ω RL = 16Ω SEP = Vin-Vout 80 75 RL = 32Ω 16Ω 70 70 RL = Ω 32 Ω 16 60 65 50 10 23 5 7 100 23 5 7 1k 23 5 7 10k 23 5 7100k 60 4 6 8 10 12 14 16 18 Input frequency, fin -- Hz 90 CHsep -- Crf Mute attenuation level, VMT -- dBV Supply voltage, VCC -- V --75 VMT -- fin Channel separation, CHsep -- dB 80 VCC = 12V Vin = -15dBV fin = 1kHz Rg = 620Ω RL = 16Ω SEP = Vin-Vout VCC = 12V Vin = -10dBV RL = 16Ω V3 = 0.3V --80 RL = 32Ω 70 --85 16Ω --90 60 50 0.1 2 3 5 7 Capacitance, Crf -- μF 1 2 3 5 7 10 --95 10 23 5 7 100 23 5 7 1k 23 5 7 10k 23 57 100k Input frequency, fin -- Hz --60 --75 VMT -- VCC Mute attenuation level, VMT -- dBV VMT -- Vin VCC = 12V f = 1kHz V3 = 0.3V Mute attenuation level, VMT -- dBV Vin = -10dBV fin = 1kHz Rg = 620Ω V3 = 0.3V --70 --80 RL = 32Ω --80 RL =3 2Ω --85 16Ω 16Ω --90 --90 --100 --95 4 6 8 10 12 14 16 18 --110 --30 --25 --20 --15 --10 --5 0 Supply voltage, VCC -- V 90 Input voltage, Vin -- dBV 90 SVRR -- fin SVRR -- VCC Vin = -10dBV frin = 100Hz Rg = 620Ω RL = 16Ω Ripple rejection ratio, SVRR -- dB Ripple rejection ratio, SVRR -- dB 85 VCC = 12V Vin = -10dBV Rg = 620Ω RL = 16Ω Din audio filter od eA 80 mode-A B mode- 70 m mo de80 B 60 75 50 70 10 40 23 5 7 100 23 5 7 1k 23 5 7 10k 23 5 7100k 3 5 7 9 11 13 15 17 Input frequency, fin -- Hz Supply voltage, VCC -- V No.A1569-11/15 LA4809M 100 SVRR -- Crf VCC = 12V Vrin = -10dBV fr = 100Hz Rg = 620Ω RL = 16Ω Din audio filter Ripple rejection ratio, SVRR -- dB 10000 7 5 3 2 Rise time -- Crf VCC = 12V RL = 16W rise time ⇒ VRF × 0.7 rise time of RF voltage 90 80 A demo B demo Rise time -- ms 1000 7 5 3 2 100 7 5 3 2 mo 70 B deA demo 60 50 0.1 2 3 5 7 Capacitance, Crf -- μF 1 2 3 5 7 10 10 0.1 2 3 5 7 Capacitance, Crf -- μF 1 2 3 5 7 10 1000 7 5 3 On time -- Crf VCC = 12V RL = 16Ω on time of amplifier 10000 7 5 3 2 Off time -- Crf VCC = 12V RL = 16Ω off time of amplifier Off time -- ms On time -- ms 2 1000 7 5 3 2 100 7 5 3 2 mo de- B A 100 7 5 3 2 mo de- 10 0.1 2 3 5 7 Capacitance, Crf -- μF 1 2 3 5 7 10 10 0.1 2 3 5 7 Capacitance, Crf -- μF 1 2 3 5 7 10 140 PO max -- Rrf Quiescent current drain, ICCOP -- mA Maximum output power, PO max -- mW 120 VCC = 12V RL = 16Ω THD = 10% 7 ICCOP -- VCC V3 = 2V no load no signal 100 mo de -B 6 80 5 60 4 40 mode-A mode-B mode-A 3 20 0 100 2 2 3 5 7 Resistance, Rrf -- kΩ 1000 2 4 6 8 10 12 14 16 18 10 ISTBY -- VCC V3 = 0.3V no load no signal Pin 2 control voltage, V2 -- V Supply voltage, VCC -- V 4 V2 -- V3 VCC = 12V Standby current drain, ISTBY -- nA 8 mode-B 3 6 mode-A 2 4 1 2 0 2 4 6 8 10 12 14 16 18 0.4 0 0.5 1 1.5 2 2.5 3 Supply voltage, VCC -- V Pin 3 control voltage, V3 -- V No.A1569-12/15 LA4809M 1000 PO max -- Ta Total harmonic distortion, THD -- % Maximum output power, PO max -- mW 7 5 3 2 VCC = 12V RL = 16Ω f = 1kHz THD = 10% 1 THD -- Ta VCC = 12V RL = 16W f = 1kHz PO = 10mW 7 5 mode-B 100 7 5 3 2 3 mode-A 2 10 --50 --25 0 25 50 75 100 0.1 --50 --25 0 25 50 75 100 Ambient temperature, Ta -- °C 15 Ambient temperature, Ta -- °C 40 VG -- Ta Output noise voltage, VNO -- μV VNO -- Ta VCC = 12V RL = 16Ω Rg = 620Ω Din audio filter Influence of output capacitors discounted 10 0μ F Voltage gain, VG -- dB 10 30 Co ut = 5 20 0 10 --5 --50 VCC = 12V RL = 16Ω f = 1kHz Vin = -20dBV --25 0 25 50 75 100 0 --50 --25 0 25 50 75 100 Ambient temperature, Ta -- °C 90 Ambient temperature, Ta -- °C --85 CHsep -- Ta Mute attenuation level, VMT -- dBV VMT -- Ta Channel separation, CHsep -- dB VCC = 5V Vin = -15dBV f = 1kHz RL = 16Ω 80 --90 70 --95 60 --50 --25 0 25 50 75 100 --100 --50 VCC = 12V Vin = -10dBV f = 1kHz V3 = 0.3V RL = 16Ω --25 0 25 50 75 100 Ambient temperature, Ta -- °C 100 Ambient temperature, Ta -- °C 5 SVRR -- Ta Quiescent current drain, ICCOP -- mA ICCOP -- Ta VCC = 12V no load no signal mode-A Ripple rejection ratio, SVRR -- dB VCC = 12V Vin = -10dBV frin = 100Hz RL = 16Ω 90 4 80 3 70 --50 --25 0 25 50 75 100 2 --50 --25 0 25 50 75 100 Ambient temperature, Ta -- °C Ambient temperature, Ta -- °C No.A1569-13/15 LA4809M 100 7 5 3 2 10 7 5 3 2 1 7 5 3 2 0.1 --50 --25 0 25 50 75 100 ISTBY -- Ta no load no signal 2 V3cnt -- Ta VCC = 12V Standby current drain, ISTBY -- nA Pin 3 control voltage, V3cnt -- V 1.8 V CC =1 6V 12 V 1.6 1.4 mod e-A mod 1.2 e-B 1 --50 --25 0 25 50 75 100 Ambient temperature, Ta -- °C Ambient temperature, Ta -- °C •Transient response characteristics (Rising characteristics) mode-A (with no signal) 50ms/div mode-A (with signal) 50ms/div Load end : 20mV/div Load end : 20mV/div Output pin : 1V/div Output pin : 1V/div Pin 3 : 5V/div Pin 3 : 5V/div mode-B (with no signal) 50ms/div mode-B (with signal) 50ms/div Load end : 20mV/div Load end : 20mV/div Output pin : 1V/div Output pin : 1V/div Pin 3 : 5V/div Pin 3 : 5V/div No.A1569-14/15 LA4809M •Transient response characteristics (Falling characteristics) mode-A (with no signal) 100ms/div mode-A (with signal) 100ms/div Load end : 20mV/div Load end : 20mV/div Output pin : 1V/div Output pin : 1V/div Pin 3 : 5V/div Pin 3 : 5V/div mode-B (with no signal) 100ms/div mode-B (with signal) 100ms/div Load end : 20mV/div Load end : 20mV/div Output pin : 1V/div Output pin : 1V/div Pin 3 : 5V/div Pin 3 : 5V/div SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of October, 2009. Specifications and information herein are subject to change without notice. PS No.A1569-15/15