LA6242H_09

Ordering number : EN7814D Monolithic Linear IC LA6242H Overview For CD Player 4-channel Bridge (BTL) Driver The LA6242H is a 4-channel motor driver IC for home and car CD players. It provides a pin for switching the channel 1 input. Functions • Four bridge-connected (BTL) power amplifier circuits • IO max: 1A • Built-in level shifter circuits • Muting circuit (on/off control for all outputs) • High output voltage (dynamic range): 6.5V (typical, channel 1 only) • Built-in input operational amplifier (channel 1 only) • Channel 1 input operational amplifier switching function • Built-in regulator that uses an external PNP transistor and is set by the value of an external resistor. • Built-in overheat protection (Thermal shutdown) circuit (Design guarantee) Specifications Parameter Supply voltage Maximum Ratings at Ta = 25°C Symbol VCCS VCCP* Maximum input voltage Maximum output current MUTE pin voltage Allowable power dissipation VINB IO max VMUTE Pd max Independent IC Mounted on the specified board ∗2 Operating temperature Storage temperature Topr Tstg Each output ∗1 VCCP1, VCCP2 ∗1 Conditions Ratings 14 14 13 1 13 0.8 1.8 -40 to +85 -55 to +150 Unit V V V A V W W °C °C *1: All of the power supply pins, VCCS, VCCP1, and VCCP2, must be connected to the power supply system externally to the IC. *2: Specified board: 114.3mm × 76.1mm × 1.6mm, glass epoxy board. Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 21809 MS 20090209-S00004 / 91207 MS 20070828-S00002 / D2506 MS PC 20060623-S00005 / 81004TN (OT) No.7814-1/9 61009 MS 20090522-S00006 / LA6242H Recommended Operating Conditions at Ta = 25°C Parameter Supply voltage Symbol VCC Conditions Ratings 5 to 13 Unit V Electrical Characteristics at Ta = 25°C,VCCS = VCCP1 = VCCP2 = 8 V, VREF = 2.5 V, MUTE = 5 V Parameter Overall Quiescent current 1 Quiescent current 2 Muting function on voltage Muting function off voltage Thermal shutdown ICC-ON ICC-OFF VMUTE-ON VMUTE-OFF TSD All channel outputs on, MUTE pin: high All channel outputs off, MUTE pin: low MUTE ∗1 MUTE ∗1 *4 150 175 2 0.5 200 30 5 45 10 mA mA V V °C Symbol Conditions Ratings min typ max Unit BTL Amplifier (Channel 1) (Output Amplifier Block) Input amplifier offset voltage Output voltage I/O gain Slew rate Input Operational Amplifier Output offset voltage OP-AMP_SINK OP-AMP_SOURCE VOFF1 OP_SINK OP_SOURCE Input operational amplifiers A and B Input operational amplifier sink current Input operational amplifier source current -10 2 300 500 +10 mV mA µA VOFF_OP-AMP VO1 VG1 SR1 Channel 1, input operational amplifiers A and B RL = 8Ω ∗2 ∗3 With the amplifier operating independently, twice the value measured between outputs ∗3,∗4 -50 6.2 5.4 6.5 6 0.5 6.6 +50 mV V Times V/µs Input Operational Amplifier Switching Input amplifier switching voltage 1 Input amplifier switching voltage 2 VIN1-SW VIN1-SW Channel 1, with input operational amplifier B selected ∗5 Channel 1, with input operational amplifier A selected ∗5 BTL Amplifier (Channels 2 to 4) (Output Amplifier Block) Output offset voltage Output voltage I/O gain Slew rate Regulator Voltage VREG output voltage REG-IN sink current Line regulation Load regulation VREG REG-IN-SINK ∆VOLN ∆VOLD ∗6 The base current of the external PNP transistor 6V ≤ VCC ≤ 12V, IO = 200mA 5mA ≤ IO ≤ 200mA 1.21 5 1.26 10 20 50 150 200 1.31 V mA mV mV VOFF2 VO2 VG2 SR2 Amplifier independently, twice the value measured between outputs ∗3,∗4 Between the + and - outputs for each channel RL = 8Ω, between the + and - outputs for each channel ∗2 -50 5 5.4 5.4 6 0.5 6.6 +50 mV V Multip lier V/µs 2 V 0.5 V *1: When the MUTE pin is high, the outputs will be on, and when low, the outputs will be off. (In the amplifier output off state, the outputs are in the high-impedance state.) This operation applies to all channels. *2: The voltage across the load terminals when an 8Ω load is connected across the outputs. With the input either high or low. With the output in the saturated state. *3: The channel 1 input operational amplifier has a 0dB gain, i.e. it is a buffer amplifier. *4: Design guarantee value *5: When VIN1-SW is high, operational amplifier A operates, and when low, operational amplifier B operates. *6: For testing, short the REGOUT to the collector of the external PNP-transistor. No.7814-2/9 LA6242H Package Dimensions unit : mm (typ) 3234B 15.2 (6.2) 28 15 HEAT SPREADER (4.9) 10.5 7.9 1 0.8 (0.8) 2.0 0.3 14 0.25 2.45 max 0.1 2.7 (2.25) SANYO : HSOP28HC(375mil) 2.5 Pd max -- Ta Specified board: 114.3×76.1×1.6mm3 glass epoxy boaard. With specified board Allowable power dissipation, Pd max -- W 2.0 1.8 1.5 1.0 0.8 0.5 0.65 Independent IC 0.94 0.42 0 -40 -20 0 20 40 60 80 100 Ambient temperature, Ta -- °C No.7814-3/9 LA6242H Block Diagram "H" VIN1−A 1 − + VIN1+A 2 VCCP1 3 VO1+ 4 VO1− 5 VO2+ 6 VO2− 7 VIN1-SW "H": OP-AMP_A "L": OP-AMP_B "L" 28 VIN1 27 VIN1−B 26 VIN1+B − + 66KΩ − Level sihifter 22KΩ + − 11KΩ − + 66KΩ 22KΩ 22KΩ 22KΩ 22KΩ 22KΩ 22KΩ 22KΩ 11KΩ Signal GND 25 SGND 66KΩ + − 24 VIN1-SW ON/OFF of all output H: ON MUTE 23 MUTE L: OFF 22 VREFIN 66KΩ + − + FR FR Power GND 66KΩ − + Level sihifter Power GND Signal Power supply FR FR VO3+ 8 VO3− 9 VO4+ 10 VO4− 11 VCCP2 12 VIN4 13 VIN4G 14 − Level sihifter 22KΩ 22KΩ 22KΩ 22KΩ 22KΩ 22KΩ 22KΩ − + 66KΩ + − 21 VCCS (VCC) − + REGIN 66KΩ + − 20 REGOUT Level sihifter REGOUT 66KΩ + 19 REGIN 22KΩ 18 VIN2G 11KΩ − 11KΩ + 17 VIN2 16 VIN3G 11KΩ − + 11KΩ 11KΩ − + 11KΩ 15 VIN3 No.7814-4/9 LA6242H Pin Functions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Pin name VIN1−A VIN1+A VCCP1 VO1+ VO1− VO2+ VO2− VO3+ VO3− VO4+ VO4− VCCP2 VIN4 VIN4G VIN3 VIN3G VIN2 VIN2G REGIN REGOUT VCCS VREFIN MUTE VIN1-SW SGND VIN1+B VIN1−B VIN1 potential in the system. • The VCCS (signal system power supply), VCCP1, and VCCP2 (output stage power supplies) must be shorted together externally. Channel 1 input amplifier A inverting input Channel 1 input amplifier A non-inverting input Channels 1 and 2: power stage power supply Channel 1 output (+) Channel 1 output (−) Channel 2 output (+) Channel 2 output (−) Channel 3 output (+) Channel 3 output (−) Channel 4 output (+) Channel 4 output (−) Channels 3 and 4: power stage power supply Channel 4 input Channel 4 input (gain adjustment) Channel 3 input Channel 3 input (gain adjustment) Channel 2 input Channel 2 input (gain adjustment) Base connection of external PNP transistor Regulator error amplifier input (+) Signal system power supply Reference voltage input Output on/off control Channel 1 input operational amplifier switching Signal system ground Channel 1 amplifier B non-inverting input Channel 1 amplifier B inverting input Channel 1 input and input operational amplifier output Pin description Note: • The center frame (FR) is used as the power system ground (P-GND). Along with the signal system ground (SGND), this level must be the lowest No.7814-5/9 LA6242H Pin Description Pin No. 1 2 26 27 28 Pin name VIN1−A VIN1+A VIN1+B VIN1−B VIN1 Function Input (channel 1) Inputs The total gain is set by setting the gain of the input amplifier. Description Equivalent circuit VIN1-* VCCS VIN1 VIN1+* 300Ω 300Ω SGND 4 5 VO1+ VO1− Output (channel 1) Channel 1 output VCCS VCCP VO1 SGND 6 7 8 9 10 11 VO2+ VO2− VO3+ VO3− VO4+ VO4− Output (channels 2 to 4) Channel 2 to 4 outputs VCCS VCCP VO SGND 23 MUTE MUTE Controls the on/off states of the corresponding channel output. MUTE = high: Output on MUTE = low: Output off ∗: When the MUTE pin is open, the outputs will be off. (The same as when the MUTE pin is low.) VCCS MUTE 100KΩ 100KΩ SGND 24 VIN1-SW Channel 1 input amplifier switching Channel 1 input operational amplifier switching function. Either amplifier A or amplifier B is selected according to the voltage applied to the VIN1-SW pin. High: VIN_A Low: VIN_B VCCS VIN1-SW 2kΩ 2kΩ SGND Continued on next page. No.7814-6/9 LA6242H Continued from preceding page. Pin No. 17 18 15 16 13 14 Pin name VIN2 VIN2G VIN3 VIN3G VIN4 VIN4G Function Input (channels 2 to 4) Inputs Description Equivalent circuit VIN VING VCCS 11kΩ 300Ω Vref SGND 22 VREFIN VREF Reference voltage VCCS VREFIN 300Ω SGND 19 20 REGIN REGOUT REG Regulator block VCCS 100Ω 10kΩ REGIN 300Ω REGOUT SGND No.7814-7/9 LA6242H MUTE, VIN1-SW • Relationship between the MUTE pin and the outputs MUTE H L Outputs CH1 CH2 on off CH3 CH4 Note ∗1: When the outputs are off, they are in the high-impedance state. ∗2: The muting function applies to all channels. • VIN1-SW and the channel 1 input operational amplifier VIN1-SW H L Channel 1 input operational amplifier AMP_A AMP_B OP-AMP B is used OP-AMP A is used OP-AMP A or OP-AMP B is selected by VIN1-SW 0.5V 2V VIN1-SW • Muting MUTE L H Output amplifiers off on Overview of the input/output relationship VIN VIN− VIN+ Level shifter 11kΩ − + − + − + 11kΩ − + 22kΩ 66kΩ − + 66kΩ − + VO1+ 22kΩ VO1− VREFIN Note: Only channel 1 has an added input operational amplifier. No.7814-8/9 LA6242H Application Circuit Example SLED INPUT 1 VIN1−A 2 VIN1+A 3 VCCP1 LOADING/SLED M SPINDLE M 4 VO1+ 5 VO1− 6 VO2+ 7 VO2− VIN1 28 VIN1−B 27 VIN1+B 26 SGND 25 VIN1-SW 24 MUTE 23 VREFIN 22 H:SLED L:LOADING LOADING INPUT FR FR FR FR 8 VO3+ FOCUS 9 VO3− 10 VO4+ TRACKING 11 VO4− 12 VCCP2 13 VIN4 TRACKING INPUT ( ) 14 VIN4G VCCS 21 REGOUT 20 REGIN 19 VIN2G 18 VIN2 17 VIN3G 16 VIN3 15 ) ( ) ( VCC SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. 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SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of June, 2009. Specifications and information herein are subject to change without notice. PS No.7814-9/9