LA6245P

Ordering number : ENA0332 Monolithic Linear IC LA6245P Overview For CD Player 4ch Bridge (BTL) Motor Driver The LA6245P is a 4channel motor driver IC for home and car CD players. It provides a pin for switching the channel 1 input. Functions and Features • Four bridge-connected (BTL) power amplifier circuits. • IO max: 1A. • Built-in level shifter circuits. • Muting circuit (on/off control for all outputs). • Independent operational amplifier. • Variable regulator (uses an external pnp transistor for output). • Regulator includes an on/off switching function. • Thermal shutdown operation monitor pin. Specifications Maximum Ratings at Ta = 25°C Parameter Supply voltage Symbol VCC_S VCCP VCCREG Allowable power dissipation Pd max Independent IC Mounted on the specified PCB Maximum input voltage Maximum output current MUTE pin voltage Operating temperature Storage temperature VINB IO max VMUTE Topr Tstg Channel 1 to 4 output ∗2 VCCP1, VCCP2 Conditions ∗1 ∗1 ∗1 Ratings 14 14 14 0.8 2.0 13 1.0 13 −40 to +85 −55 to +150 Unit V V V W W V A V °C °C Note ∗1: All of the power supply pins, VCC_S, VCCP1, VCCP2, and VCCREG must be connected to the power supply system externally to the IC. Note ∗2: Mounted on the specified PCB 114.3×76.1×1.6mm3, glass epoxy board. Any and all SANYO Semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO Semiconductor representative nearest you before using any SANYO Semiconductor products described or contained herein in such applications. SANYO Semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor products described or contained herein. 92706 / 31006 MS OT 20051226-S00012 No.A0332-1/10 LA6245P Recommended Operating Conditions at Ta = 25°C Parameter Supply voltage Symbol VCC Conditions Ratings 5 to 13 Unit V Electrical Characteristics at Ta = 25°C, VCC_S = VCCP1 = VCCP2 = VCCREG = 8V, VREF = 2.5V, MUTE = 5V Ratings Parameter [Overall] Quiescent current 1 Quiescent current 2 Muting function on voltage Muting function off voltage Switch on voltage Switch off voltage REGSW on voltage REGSW off voltage ICC-ON ICC-OFF MUTE-ON MUTE-OFF SW-ON SW-OFF REG-ON REG-OFF 2.5 0.5 2.5 0.5 All channel outputs on, MUTE pin: high All channel outputs off, MUTE pin: low 2.5 0.5 30 5 45 10 mA mA V V V V V V Symbol Conditions min typ max Unit [BTL Amplifier] (Channel 1 to 4) (Output Amplifier Block) Input amplifier offset voltage Output voltage I/O gain Slew rate [Front End Operational Amplifier] OP-AMP_SINK 1 OP-AMP_SOURCE 1 Input bias current Input voltage range High-level output voltage Low-level output voltage [VREF-IN Amplifier] Input voltage range [Independent Operational Amplifier] Output offset voltage OP-AMP_SINK OP-AMP_SOURCE Input bias current Input voltage range High-level output voltage Low-level output voltage OP_VOFF OP_SINK OP_SOURCE IBOP OP_VIN VOHOP VOLOP 0 7.5 7.8 0.2 0.5 Input operational amplifier sink current Input operational amplifier source current −6 2 300 500 300 VCC −1.5 6 mV mA µA µA V V V VREF_VIN 1.3 4 V OP_SINK OP_SOURCE IBOP VIN VOHOP VOLOP 0.5 7.5 7.8 0.2 0.5 Input operational amplifier sink current Input operational amplifier source current 2 300 500 300 5 mA µA µA V V V VOFF1 VO1 VG1 SR1 With the amplifier operating independently, between outputs RL = 8Ω ∗2 ∗1 ∗2 ∗3 −50 5.7 5.4 6.2 6 2.0 6.6 50 mV V Multiplier V/µs [Power Supply Block] (uses an external pnp transistor: 2SB632K) Power supply output REG-IN sink current Line regulation VOUT REG-IN-SINK ∆VOLN IO = 200mA The base current of the external PNP transistor 6V ≤ VCCREG ≤ 12V, IO = 200mA 1.2 5.0 1.25 10 10 10 50 50 1.3 V mA mV mV Load regulation ∆VOLD 5mA ≤ IO ≤ 200mA Note ∗1: The channel 1 input operational amplifier has a 0dB gain, i.e. it is a buffer amplifier. ∗2: With the output in the saturated state. ∗3: Design guarantee value No.A0332-2/10 LA6245P Package Dimensions unit : mm 3251 17.8 (6.2) 36 19 (4.9) 7.9 10.5 (0.5) 1 0.8 2.0 0.3 18 0.25 (2.25) 2.7 SANYO : HSOP36R(375mil) Pin Assignment 0.1 2.45max 0.65 No.A0332-3/10 LA6245P Pin Functions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Symbol VIN3− VIN3 VREF-IN MUTE TSD SW GNDREG REGSW GNDS REG-IN REG-OUT VCCREG OPOUT OP− OP+ VIN2 VIN2− VCC_S VIN1LD VIN1 VIN1− VCCP1 NC VO1+ VO1− VO2+ VO2− VO3+ VO3− VO4+ VO4− NC NC VCCP2 VIN4− VIN4 Front end amplifier, channel 3 Front end amplifier, channel 3 Reference voltage input Muting control This pin outputs a low level when the thermal shutdown circuit operates. Switches between the loading and sled inputs. Regulator system ground Regulator on/off control Signal system ground Connection for the voltage divider output used to set the regulator voltage Base connection of external PNP transistor Regulator power supply Independent operational amplifier output pin Independent operational amplifier (−) Independent operational amplifier (+) Front end amplifier, channel 2 Front end amplifier, channel 2 Signal system power supply Front end amplifier for the loading system input Front end amplifier, channel 1 Front end amplifier, channel 1 Output Input (−) Output Input (−) Input (−) Output Pin description Power stage power supply for channels 1 and 2 No connection Channel 1 output (+) Channel 1 output (−) Channel 2 output (+) Channel 2 output (−) Channel 3 output (+) Channel 3 output (−) Channel 4 output (+) Channel 4 output (−) No connection No connection Channels 3 and 4 : power stage power supply Front end amplifier, channel 4 Front end amplifier, channel 4 Input (1) Output Note: • The center frame (FR) is used as the power system ground (GNDP). Along with the signal system ground (GNDS), this level must be the lowest potential in the system. • The VCC_S (signal system power supply), VCCP1, and VCCP2 (output stage power supplies) must be shorted together externally. No.A0332-4/10 LA6245P Block Diagram No.A0332-5/10 LA6245P Pin Functions Pin No. 21 20 17 16 1 2 35 36 Symbol VIN1− VIN1 VIN2− VIN2 VIN3− VIN3 VIN4− VIN4 Pin description Channel 1 to 4 inputs Equivalent circuit VCC_S VIN1− VIN1 300Ω 300Ω GNDS 24 25 26 27 28 29 30 31 VO1+ VO1− VO2+ VO2− VO3+ VO3− VO4+ VO4− Channel 1 to 4 outputs VCC_S 5kΩ VCCP1 VO1 FR 4 6 MUTE SW MUTE pin SW pin VCC_S MUTE SW 40kΩ 30kΩ GNDS 3 VREF-IN Reference voltage VCC_S VREF-IN 300Ω 300Ω GNDS Continued on next page. No.A0332-6/10 LA6245P Continued from preceding page. Pin No. 5 Symbol TSD Pin description Thermal shutdown detection During normal operation: the transistor will be in the off state When the thermal shutdown circuit operates: the transistor will be in the on state Equivalent circuit TSD 300Ω 50kΩ GNDS 19 VIN1LD Loading system input VCC_S 10kΩ VIN1LD 20kΩ 300Ω GNDS OP+ OP− OPOUT 15 14 13 Independent operational amplifier Operation is not controlled by the muting function. VCC_S OP+ OP− OPOUT 300Ω 300Ω GNDS 8 12 10 11 7 REGSW VCCREG REG-IN REG-OUT GNDREG Variable regulator Connect the REG-OUT pin to the base of the external pnp transistor. Connect the output of the external voltage divider to REG-IN. VCCREG 10kΩ REGSW 40kΩ 30kΩ GNDREG 100Ω 10kΩ REG-IN REG-OUT No.A0332-7/10 LA6245P Relationship between the MUTE pin and SW MUTE H H L L SW H L H L ch1 LD ON SLED ON LD ON MUTE = ON ch2 to ch4 MUTE = OFF MUTE = OFF MUTE = ON MUTE = ON The MUTE = off state is the operating state (play), and the MUTE = on state is the stopped state. Internal reference voltage are external reference voltage External reference voltage Internal reference voltage (1.3V (TYP)) SLED = ON LD = ON 0.5V 1.5V 2.5V SW Overview of the input/output relationship R2 R1 VIN− − + − + VIN Level shifter 30kΩ 10kΩ − + 30kΩ 10kΩ − + VO1− VO1+ VREF-IN − + The resistors R1 and R2 in the VIN1LD input block are internal to the IC. REGSW Pin Operation REGSW H L REG REG = ON REG = OFF No.A0332-8/10 LA6245P Sample Application Circuit No.A0332-9/10 LA6245P Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. 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Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO Semiconductor believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of March, 2006. Specifications and information herein are subject to change without notice. PS No.A0332-10/10