LA6261_07

Ordering number : EN7815A Monolithic Linear IC LA6261 Overview For Optical Disk Drive 6-Channel Driver (BTL: 4 channels, H bridge: 2 channels) The LA6261 is a 6-channel driver IC that incorporates 4 channels of BTL output and 2 channels of H-bridge output. It is optimal for the actuator driver for CDs, MDs, and other optical disk drives. Features • Six power amplifier channels on a single chip (BTL: 4 channles, H-bridge: 2 channels) • IO max: 700mA (Each channel) • Built-in level shifter circuits (BTL amplifier ) • Built-in thermal protection (thermal shutdown) circuit • Separate power supply for H-bridge (2 channels) • Onchip 3.3V regulator controller (uses an external output transistor) • Adjustment pin for the H-bridge output Specifications Maximum Ratings at Ta = 25°C Parameter Supply voltage Maximum output current Maximum input voltage MUTE pin voltage Allowable power dissipation Symbol VCC max IO max VINB VMUTE Pd max Independent IC Mounted on the specified board * Operating ambient temperature Storage ambient temperature Topr Tstg for each of the channel 1 to 6 Conditions Ratings 14 0.7 13 13 0.8 2 -30 to +85 -55 to +150 Unit V A V V W W °C °C * Mounted on a specified board: 76.1mm×114.1mm×1.6mm, glass epoxy. Recommended Operating Conditions at Ta = 25°C Parameter Supply voltage Symbol VCC Conditions Ratings 5.6 to 13 Unit V Any and all SANYO Semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO Semiconductor representative nearest you before using any SANYO Semiconductor products described or contained herein in such applications. SANYO Semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor products described or contained herein. 11707 MS IM B8-7314 No.7815-1/7 LA6261 Electrical Characteristics at Ta = 25°C, VCC1 = VCC2 = 8V, VREF = 1.65V Parameter All Blocks No-load current drain ON VREF input voltage range BTL AMP Output offset voltage Input voltage range Output voltage VOFF VIN VO VG VMTON VMTOFF SR BTL amplifier, the voltage difference between each channel outputs Applied to pins VIN1 to VIN4 Voltage between VO+ and VO- for each channel when RL=8Ω *2 Closed-circuit voltage gain MUTE ON voltage MUTE OFF voltage Slew rate H-bridge Block Output voltage Input low level Input high level Output setting voltage VO-LOAD VIN-L VIN-H VCONT Voltage between VO+ and VO- for each channel when VCONT=3V and RL=10Ω Voltage between VO+ and VO- for each channel when RL=10Ω 6.2 0 2 2.8 6.7 1 SVCC V V V V The gain from the input to the output *3 *3 For the independent amplifier. Times 2 when between outputs *4 2 0 0.5 4 SVCC 0.5 deg V V V/µs 0 4 5 VCC V V -50 +50 mV ICC-ON VREF-IN All outputs on *1, FWD=REV=0V 0.5 30 50 VCC-1.5 mA V Symbol Conditions min Ratings typ max Unit Regulator Block Output voltage Output load variation Supply voltage variation Vreg ∆VRL ∆VVCC IL=100mA IL=0 to 200mA VCC=6 to 12V, IL=100mA 3.05 -50 -15 3.3 0 21 3.55 10 60 V mV mV *1: The total current dissipation for SVCC, PVCC1, and PVCC2 with no load *2: Output in the saturated state *3: When the MUTE pin is high, the BTL output will be on, and when low, the BTL output will be OFF (HI impedance). *4: Design guarantee value Package Dimensions unit : mm (typ) 3251 3.0 Pd max - Ta Mounted on a Specified board : 76.1mm×114.3mm×1.6mm, glass epoxy Allowable power dissipation, Pd max - W 17.8 (6.2) 36 19 2.5 2.0 Mounted on a specified board (4.9) 7.9 10.5 1.5 (0.5) 0.8 2.0 0.3 0.65 1 18 0.25 1.0 0.8 0.5 Independent IC 1.04 (2.25) 0.42 0 --30 2.45max 0 20 40 60 80 100 ILA06754 2.7 SANYO : HSOP36R(375mil) 0.1 Ambient temperature, Ta - °C No.7815-2/7 LA6261 Block Diagram 1 CH3 2 -+ + -- 36 CH4 35 3 -+ + -- 34 4 -+ Pre Drive 33 5 CH2 6 32 CH5 31 7 -+ 30 8 -+ Pre Drive 29 9 CH1 -+ 28 CH6 VOLTAGE CONTROL AMP + -- 10 11kΩ 11 1kΩ 12 22kΩ -+ BTL 27 26 -+ 25 22kΩ 11kΩ 13 1kΩ 14 22kΩ 11kΩ 15 1kΩ 16 11kΩ 17 1kΩ 18 22kΩ -+ Bandgap TSD -+ SVCC BUFFER AMP for 1 / 2 VCC BUFFER AMP for VREF 24 -+ -+ Mode Select 23 Reference Voltage 22 21 Mode Select 20 19 ILA06744 No.7815-3/7 LA6261 Pin Description Pin No. 1 2 3 4 5 6 7 9 35 36 Pin Name VO3+ VO3VO2+ VO2VO1+ VO1PGND PVCC1 VO4+ VO4Description Channel 3 (BTL) output (+) Channel 3 (BTL) output (-) Channel 2 (BTL) output (+) Channel 2 (BTL) output (-) Channel 1 (BTL) output (+) Channel 1 (BTL) output (-) Power system ground for channels 1 to 4 (BTL) Power system power supply for channels 1 to 4 (BTL) (shorted to SVCC) Channel 4 (BTL) output (+) Channel 4 (BTL) output (-) Pin7 Pin 1 to 6, 35, 36 Pin9 Equivalent Circuit Diagram 8 REGIN Regulator (to the base of the external PNP transistor) 10kΩ PVCC Pin 8 SVCC 100Ω PGND 10 REGOUT Regulator (to the collector of the external PNP transistor) PVCC Pin 10 PGND 11 12 13 14 15 16 17 18 VIN1 VIN1G VIN2 VIN2G VIN3 VIN3G VIN4 VIN4G Channel 1 input Channel 1 input (gain adjustment) Channel 2 input Channel 2 input (gain adjustment) Channel 3 input 300Ω PVCC Pin 11, 13, 15, 17 PGND 11kΩ Channel 3 input (gain adjustment) Channel 4 input Channel 4 input (gain adjustment) PVCC 1kΩ 300Ω Pin 12, 14, 16, 18 PGND SGND 19 20 22 23 FWD5 REV5 FWD6 REV6 Channel 5 output direction switching (FWD), H-bridge logic input Channel 5 output direction switching (REV), H-bridge logic input Channel 6 output direction switching (FWD), H-bridge logic input Channel 6 output direction switching (REV), H-bridge logic input PGND Pin 19, 20, 22, 23 PVCC 50kΩ 50kΩ SGND Continued on next page. No.7815-4/7 LA6261 Continued from preceding page. Pin No. 21 24 Pin Name VCONT5 VCONT6 Description Channel 5 output voltage setting Channel 6 output voltage setting PVCC Pin 21, 24 Equivalent Circuit Diagram PGND PGND 25 VREFIN Reference voltage input PVCC 300Ω Pin 25 PGND SGND 28 30 31 32 33 34 PVCC2 PGND2 VO6+ VO6VO5+ VO5- Power system power supply for for channels 5 and 6 (H-bridge) Power system ground for channels 5 and 6 (H-bridge) Channel 6 (H-bridge) output (+) Channel 6 (H-bridge) output (-) Channel 5 (H-bridge) output (+) Channel 5 (H-bridge) output (-) Pin 31, 32 33, 34 Pin 28 Pin 30 29 MUTE BTL mute signal input PVCC 100kΩ Pin 29 PGND 100kΩ 26 27 SGND SVCC Signal system ground Signal system power supply (shorted to PVCC1) Truth Table INPUT FWD5(6) L L H H *Z: HI-Impedance REV5(6) L H L H VO5(6)+ Z H L L OUTPUT VO5(6)Z L H L 300Ω SGND No.7815-5/7 LA6261 Sample Application Circuit SPINDLE MOTOR TRACKING COIL 1 M VO3+ VO3-VO2+ VO2-VO1+ VO1-PGND1 REGIN PVCC1 VO4-VO4+ VO5-VO5+ VO6-VO6+ PGND2 MUTE PVCC2 36 M 2 3 4 5 6 7 -8 + 9 36 34 M SLED MOTOR LOADING MOTOR 33 32 M FOCUS COIL 31 30 CHANGER MOTOR -29 28 INPUT + 3.3V Regulated Voltage + -10 INPUT 11 12 INPUT 13 14 INPUT 15 16 INPUT 17 18 REGOUT VIN1 VIN1G VIN2 VIN2G VIN3 VIN3G VIN4 VIN4G SVCC SGND VREFIN VCONT6 REV6 FWD6 VCONT5 REV5 FWD5 27 26 25 24 1.65V 23 22 21 20 19 INPUT INPUT INPUT INPUT INPUT + -- ILA06743 No.7815-6/7 LA6261 Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor products (including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Semiconductor Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO Semiconductor believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of January, 2007. Specifications and information herein are subject to change without notice. PS No.7815-7/7