Ordering number : EN7817A
Monolithic Linear IC
LA6565
Overview
For CD and DVD players
5-channel Driver (BTL:4ch,H-bridge:1ch)
The LA6565 is a 4-channel BTL plus 1-channel H-bridge actuator driver developed for use in CD and DVD drives. The BTL driver channels 1 and 2 include built-in operational amplifiers allowing the LA6565 to support a wide range of applications.
Functions
• Five power amplifier channels on a single chip (Bridge connection (BTL): 4-channels, H-bridge: 1-channel) • IO max: 1A • Built-in level shifters (except for the H bridge channel) • Muting circuits (output on/off, two systems) (The muting circuits operate for the BTL amplifiers. They do not apply to the H-bridge or regulator circuits.) • Built-in regulator (Uses an external PNP-transistor and is set with an external resistor.) • Output voltage setting function (loading driver) • Built-in independent operational amplifiers • Thermal shutdown circuit
Specifications
Parameter
Maximum Ratings at Ta = 25°C
Symbol VCC max IO max VINB VMUTE Pd max Independent IC Mounted on a specified board * Operating temperature Storage temperature Topr Tstg Conditions Ratings 14 1 13 13 0.8 2 -40 to +85 -55 to +150 Unit V A V V W W °C °C Maximum supply voltage Maximum output current Maximum input voltage MUTE pin voltage Allowable power dissipation
* Specified board: 114.3mm × 76.1mm × 1.6mm, glass epoxy board.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment.
21809 MS 20090209-S00003 / 52404TN (OT) No.7817-1/8
LA6565
Recommended Operating Conditions at Ta = 25°C
Parameter Supply voltage Symbol VCC Conditions Ratings 5.6 to 13 Unit V
Electrical Characteristics at Ta = 25°C, VCC1 = VCC2 = 8V, VREF = 2.5V
Parameter Overall Quiescent current when o Quiescent current when off Thermal shutdown circuit operating temperature VREF Amplifier VREF amplifier offset voltage VREF input voltage range VREF-OUT output current VREF-OFFSET VREF-IN I-VREF-OUT -10 1 1 +10 VCC-1.5 mV V mA ICC-ON ICC-OFF TSD BTL amplifier output on, loading block off *1 All outputs off *1 *7 150 30 10 175 50 15 200 mA mA °C Symbol Conditions min Ratings typ max Unit
Operational Amplifier (Independent) Input voltage range Output current (sink) Output current (source) Output offset voltage Residual current (sink) VIN(OP) SINK(OP) SOURCE(OP) VOFF(OP) VCE-SINK(OP) IO(sink side) = 1mA 0 2 300 -10 500 +10 0.6 VCC-1.5 V mA µA mV V
BTL Amplifier Block (Channels 1 to 4) Output offset voltage Input voltage range Output voltage Closed circuit voltage gain Slew rate SR Muting on voltage Muting off voltage VOFF VIN VO VG SR VMUTE-ON VMUTE-OFF The voltage difference between each channel outputs *2, *3 Input voltage range of the input operational amplifiers IO = 0.5A, the voltage between VO+ and VO- in each channel The gain from the input to the output with the input amplifier set to 0dB*2, *3 For the independent amplifier. Times 2 when between outputs.*7 The output on voltage, for each mute function *4 The output off voltage, for each mute function *4 2.5 0.5 V V 0.5 V/µs 7.2 8 9 times 0 5.7 6.2 VCC-1.5 V V -50 +50 mV
Input Amplifier Block (Channels 1 and 2) Input voltage range Output current (sink) Output current (source) Output offset voltage VIN-OP SINK-OP SOURCE-OP VOFF-OP *5 0 2 300 -10 500 +10 VCC-1.5 V mA µA mV
Loading Block (Channel 5, H bridge circuit) Output voltage Braking output saturation voltage Low-level input voltage High-level input voltage VIN-L VIN-H 2 1 V V VO-LOAD VCE-BREAK For forward/reverse operation, IO = 0.5A, VCONT = VCC* The output voltage during braking *6 5.7 6.5 0.3 V V
Power Supply Block (Uses an external 2SB632K PNP-transistor) Power supply output REG-IN sink current Line regulation Load regulation VOUT REG-IN-SINK ∆VOLN ∆VOLD IO = 200mA External PNP-transistor base current 6V ≤ VCC ≤ 12V, IO = 200mA 5mA ≤ IO ≤ 200mA 1.260 5 1.285 10 10 10 100 100 1.310 V mA mV mV
*1: The total current dissipation for VCCP1, VCCP2, and VCCS with no load. *2: The input amplifier is a buffer amplifier. *3: The voltage difference between the two sides of the load (12Ω). *4: When the MUTE pin is high, the output will be on, and when low, the output will be off (high-impedance state). *5: The input operational amplifier source is constant current. Since the 11kΩ resistor between this and the next stage functions as the load, the input operational amplifier gain must be set carefully. *6: The braking operation is a short (to ground) braking operation. The sink side output is on at this time. *7: Design guarantee.
No.7817-2/8
LA6565
Package Dimensions
unit : mm (typ) 3251
2.5
Pd max -- Ta
Specified board: 114.3×76.1×1.6mm3 glass epoxy boaard. With specified board
17.8 (6.2) 36 19
Allowable power dissipation, Pd max -- W
2.0
1.5
(4.9) 7.9 10.5
1.0 0.8
0.5
1.04
Independent IC
(0.5)
0.8
2.0
0.3
0.25
0.65
1
18
0.42
(2.25) 2.45max
0 -40
-20
0
20
40
60
80
100
2.7
SANYO : HSOP36R(375mil)
Pin Assignment
FWD 1 REV 2 VCC2 3 VLO− 4 VLO+ 5 VO4+ 6 VO4− 7 VO3+ 8 VO3− 9 36 S_GND 35 VCONT 34 MUTE1 33 MUTE234 32 VIN4− 31 VIN4 30 VREF_IN 29 VREF_OUT 28 REG_OUT
0.1
Ambient temperature, Ta -- °C
FR
FR
VO2+ 10 VO2− 11 VO1− 12 VO1+ 13 VCCP1 14 VCCS 15 VIN1+ 16 VIN1− 17 VIN1 18 Top View
27 REG_IN 26 VIN+OP 25 VIN−OP 24 VO_OP 23 VIN3 22 VIN3− 21 VIN2 20 VIN2− 19 VIN2+
No.7817-3/8
LA6565
Block Diagram
Thermal shutdown circuit Signal system ground
FWD 1
Input
36 S_GND
FWD 2
(LOAD output voltage setting)
35 VCONT
VCCP2 3 VLO− 4 VLO+ 5 VO4+ 6 VO4− 7 VO3+ 8 VO3− 9
VCC
Output control
MUTE CH1 Turms the corresponding channel ON/OFF High: output ON CH2,3,4 Low: output OFF
44kΩ 11kΩ
34 MUTE1
33 MUTE234 32 VIN4−
Level shift
to VREF_OUT
31 VIN4 30 VREF_IN
Level shift
29 VREF_OUT
28 REG_OUT
(VCC) REG_IN
FR
Power system ground
Power system ground
FR
REG_OUT
Level shift
VO2+ 10 VO2− 11 VO1− 12 VO1+ 13 VCCP1 14
27 REG-IN 26 VIN+OP 25 VIN−OP 24 VO_OP 23 VIN3
44kΩ
Level shift
VIN1 15 VIN1+ 16 VIN1− 17 VIN1 18
Signal system power supply
44kΩ 11kΩ 44kΩ
11kΩ
22 VIN3−
to VREF_OUT
21 VIN2 20 VIN2− 19 VIN2+
11kΩ
No.7817-4/8
LA6565
Pin Function
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 Pin name FWD REV VCC2 VLO− VLO+ VO4+ VO4− VO3+ VO3− VO2+ VO2− VO1− VO1+ VCCP1 VCCS VIN1+ VIN1− VIN1 VIN2+ VIN2− VIN2 VIN3− VIN3 VO_OP VIN−OP VIN+OP REG_IN REG_OUT VREF_OUT VREF_IN VIN4 VIN4− MUTE234 MUTE1 VCONT S_GND Pin function Loading output direction switching (FWD). Loading system logic input. Loading output direction switching (REV). Loading system logic input. Channels 3, 4, and loading power stage power supply. Loading output (−) Loading output (+) Channel 4 output (+) Channel 4 output (−) Channel 3 output (+) Channel 3 output (−) Channel 2 output (+) Channel 2 output (−) Channel 1 output (−) Channel 1 output (+) Channels 1 and 2 power stage power supply. Signal system power supply. Channel 1 input. Input operational amplifier + input. Channel 1 input. Input operational amplifier − input. Channel 1 input. Input operational amplifier output. Channel 2 input. Input operational amplifier + input. Channel 2 input. Input operational amplifier − input. Channel 2 input. Input operational amplifier output. Channel 3 input. Input operational amplifier − input. Channel 3 input. Input operational amplifier output. Operational amplifier output. Operational amplifier − input Operational amplifier + input Regulator error amplifier output. Connect this pin to the base of the external PNP-transistor. Regulator error amplifier input (+). VREF amplifier (voltage follower) output. VREF input. Apply the external reference voltage to this pin. Channel 4 input. Input operational amplifier output. Channel 4 input. Input operational amplifier − input. Controls the on/off state of channels 2, 3, and 4. Channel 1 output on/off control Loading block output high-level voltage setting. Signal system ground.
* center frame (FR) becomes GND for the power system, Set this to the minimum potential together with S_GND (signal system ground).
No.7817-5/8
LA6565
Pin Description
Pin No. 16 17 18 19 20 21 22 23 32 31 26 25 24 1 2 Pin name VIN1+ VIN1− VIN1 VIN2+ VIN2− VIN2 VIN3− VIN3 VIN4− VIN4 VIN+OP VIN−OP VO_OP FWD REV Input (H-bridge) Logic inputs. The IC is set to one of four modes, forward, reverse, brake, and free running by the combination of high and low values applied to these pins. Function Input (CH1 to 4) Description Inputs (channels 1 to 4 and the independent operational amplifier) Equivalent circuit
VIN* VCCS
300Ω 300Ω
VIN*+ VIN*−
300Ω
S-GND
FWD
50kΩ 50kΩ 50kΩ 50kΩ
REV
S-GND
12 13 10 11 8 9 6 7 VO1+ VO1− VO2+ VO2− VO3+ VO3− VO4+ VO4− Output (BTL-AMP) Channel 1 to 4 outputs.
VCCP
1kΩ
VO*
1kΩ
FR
4 5 VLO− VLO+ Output (H-bridge) H-bridge (loading) output.
VCCP2
VLO+
VLO−
1kΩ
1kΩ
S_GND
35 33 34 VCONT MUTE234 MUTE1 Input MUTE Loading output setting. BTL amplifier output ON/OFF state setting. High: output ON Low: output OFF
20kΩ 20kΩ
VCONT
VCCS MUTE*
S-GND
10kΩ 20kΩ
40kΩ
No.7817-6/8
LA6565
Truth Table (Loading (H bridge) block)
FWD L REV L H H L H VLO+ OFF H L L VLO− OFF L H L Loading output OFF *1 Forward Reverse Short-circuit braking *2
*1. The output goes to the high-impedance state. *2. In braking mode, the sink side transistor is turned on (for short-circuit braking). The VLO+ and VLO− pins go to a level that is essentially the ground level.
Relationship between the MUTE pins and the power supply systems (VCCP*)
MUTE1 CH1 (BTL) VCCP1 CH2 (BTL) CH3 (BTL) MUTE2 CH4 (BTL) CH5 (H-bridge) VCCP2
Application Circuit Example
MUTE234 MUTE1 LOADING 1 FWD 2 REV 3 VCCP2
0.1µF
S_GND 36 VCONT 35 MUTE1 34 MUTE234 33 VIN4− 32 VIN4 31 VREF_IN 30 VREF_OUT 29 REG_OUT 28
LOADING MOTER
4 VLO− 5 VLO+ 6 VO4+ 7 VO4− 8 VO3+ 9 VO3−
M
2.2Ω 0.1µF
TRACKING COIL
2.2Ω 0.1µF
FOCUS COIL
2.2Ω
FR
LB6565
FR REG
0.1µF
SLED MOTOR
10 VO2+ 11 VO2− 12 VO1+ 13 VO1− 14 VCCP1 15 VCCS 16 VIN1+ 17 VIN1− 18 VIN1
REG_IN 27 VIN+OP 26 VIN−OP 25 VO_OP 24 VIN3 23 VIN3− 22 VIN2 21 VIN2− 20 VIN2+ 19
M
2.2Ω 0.1µF
VCC
SPINDLE MOTOR
M
2.2Ω
VCC
TRACKING FOCUS SLED SPINDLE VREF
No.7817-7/8
LA6565
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above.
This catalog provides information as of February, 2009. Specifications and information herein are subject to change without notice. PS No.7817-8/8