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LA72714VA

LA72714VA

  • 厂商:

    SANYO(三洋)

  • 封装:

  • 描述:

    LA72714VA - Monolithic Linear IC For JPN TV Multi Channel Television Sound Decoder IC - Sanyo Semico...

  • 数据手册
  • 价格&库存
LA72714VA 数据手册
Ordering number : ENA0626 Monolithic Linear IC LA72714VA Overview For JPN TV Multi Channel Television Sound Decoder IC The LA72714VA is a JPN MTS (Multi Channel Television Sound) Decoder IC. Features • With SIF circuit, alignment-free* STEREO channel separation. * In Base Band signal input mode, separation is adjusted by input level. • Three I2C slave-addresses are prepared. • The maximum output level is as large as 4.2dBV. (Frequency = 1kHz, distortion = less than 3%, VCC = 5V, TYP) • The external clock is unnecessary. • A couple of external input terminal is prepared. Functions • Stereo & Bilingual demodulation. • Stereo & Bilingual detection. • JUST CLOCK OUT. Specifications Maximum Ratings at Ta = 25°C Parameter Maximum power supply voltage Allowable power dissipation Operating temperature Storage temperature Symbol VCC max Pd max Topr Tstg Ta ≤ 70°C * Conditions Ratings 7.0 203 -20 to +70 -55 to +150 Unit V mW °C °C ∗ When mounted on a 114.3mm×76.1mm×1.6mm glass epoxy board. Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 21407 MS PC 20070122-S00004 No.A0626-1/14 LA72714VA Operating Ranges at Ta = 25°C Parameter Recommended operating voltage Allowable operating voltage range Symbol VCC VCC op Conditions Ratings 5.0 4.5 to 5.5 Unit V V Electrical Characteristics at Ta = 25°C, VDD = 5V [Condition of input signal at pin 5] BASE BAND input [Output] L-ch : pin 18, R-ch : pin 17 Ratings Parameter Current dissipation MONO output level Symbol ICC1 VOMN1 ΔVOMN1 THDM1 FCM1 SNM1 VOST1 Conditions No signal, Inflow current at Pin 19 fm = 1kHz, 100% Mod, Pre-Emphasis OFF fm = 1kHz, 100% Mod, Pre-Emphasis OFF fm = 1kHz, 100% Mod, Pre-Emphasis OFF fm = 10kHz/1kHz, 100% Mod, 15kHz LPF Pre-Emphasis OFF MONO S/N STEREO output level Non Mod, 15kHz LPF fm = 1kHz, 100% Mod, Cue (Stereo), 15kHz LPF STEREO distortion STEREO S/N Main output level THDS1 SNS1 VOMA1 fm = 1kHz, 100% Mod, Cue (Stereo), 15kHz LPF Sub Carrier (Non Mod), Cue (Stereo), 15kHz LPF fm = 1kHz, 100% Mod, Cue (Bilingual), 15kHz LPF Main distortion Main S/N SUB output level THDMA1 SNMA1 VOSU1 fm = 1kHz, 100% Mod, Cue (Bilingual), 15kHz LPF Sub Carrier (Non Mod), Cue (Bilingual), 15kHz LPF fm = 1kHz, 100% Mod, Cue (Bilingual), 15kHz LPF SUB distortion SUB frequency characteristics SUB Main S/N STEREO separation L → R STERO separation R → L Stay behind carrier level (SUB) Stay behind carrier level (MAIN) Cross-talk MAIN → SUB Cross-talk SUB → MAIN MODE output MONO MODE output STEREO MODE output BILINGUAL Just Clock output High volt Just Clock output Low volt Max Output level THDSU1 FCSU1 SNSU1 SEPR1 SEPL1 CLSU1 CLMA1 CTSUB1 CTMA1 MODMO1 MODST1 MODBI1 JCH1 JCL1 MOL1 fm = 1kHz, 100% Mod, Cue (Bilingual), 15kHz LPF fm = 10kHz/1kHz, 60% Mod, Cue (Bilingual), 15kHz LPF, Pre-Emphasis OFF Sub Carrier (Non Mod), Cue (Bilingual), 15kHz LPF fm = 1kHz (L-only), 60% Mod, Cue (Stereo), 15kHz LPF fm = 1kHz (R-only), 60% Mod, Cue (Stereo), 15kHz LPF Main = 0%, Sub = 0% (Carrier) Cue (Bilingual) Main = 0%, Sub = 0% (Carrier) Cue (Bilingual) Main : fm = 1kHz, 100% modulation, Cue (Bilingual), 15kHz LPF Sub : fm = 1kHz, 100% modulation, Cue (Bilingual), 15kHz LPF Input = Mono Signal Input = Stereo Signal Input = Bilingual Signal f = 400Hz (mono), 25%Mod f = 400Hz (mono), 10%Mod f = 1kHz, distortion = 3% 3.3 1462 EXTERNAL input level EXTIN1 f = 1kHz, (pin 12 & pin 13 input) 4.2 1622 -14.5 188.4 0 1.7 2.7 4 1 1 2 3 1.3 2.3 3.3 V V V V V dBV mVrms dBV mVrms 55 62 dB 55 62 dB -55 -45 dBV -50 -40 dBV 35 43 dB 50 35 60 43 dB dB -18 -14.5 dB 60 -6 501 65 -4.5 595 0.7 -3 708 1.5 dB dBV mVrms % -6 501 -4.5 595 0.2 -3 708 0.5 dBV mVrms % 50 60 dB 60 -6 501 65 -4.5 595 0.5 -3 708 1 dB dBV mVrms % -18 min 18 -6 501 MONO L/R level difference MONO distortion MONO frequency characteristics -1 typ 26 -4.5 595 0 0.2 -13.5 max 34 -3 708 1 0.5 unit mA dBV mVrms dB % dB No.A0626-2/14 LA72714VA [Condition of input signal at pin 5] Deviation of SIF input MONO : (fm = 1kHz) 100%→4.5MHz±25kHz Pre-Emphasis ON [Output] L-ch : pin 18, R-ch : pin 17 Ratings Parameter Current dissipation Input sensitivity level Symbol ICC2 VSIN Conditions No signal, Inflow current at Pin 19 fc = 4.5MHz min 20 70 3.16 MONO output level VOMN2 ΔVOMN2 THDM2 FCM2 SNM2 VOST2 fm = 1kHz, 100% Mod, Pre-Emphasis OFF fm = 1kHz, 100% Mod, Pre-Emphasis OFF fm = 1kHz, 100% Mod, Pre-Emphasis OFF fm = 10kHz/1kHz, 100% Mod, 15kHz LPF Pre-Emphasis OFF MONO S/N STEREO output level Non Mod, 15kHz LPF fm = 1kHz, 100% Mod, Cue (Stereo), 15kHz LPF STEREO distortion STEREO S/N Main output level THDS2 SNS2 VOMA2 fm = 1kHz, 100% Mod, Cue (Stereo), 15kHz LPF Sub Carrier (Non Mod), Cue (Stereo), 15kHz LPF fm = 1kHz, 100% Mod, Cue (Bilingual), 15kHz LPF Main distortion Main S/N SUB output level THDMA2 SNMA2 VOSU2 fm = 1kHz, 100% Mod, Cue (Bilingual), 15kHz LPF Sub Carrier (Non Mod), Cue (Bilingual), 15kHz LPF fm = 1kHz, 100% Mod, Cue (Bilingual), 15kHz LPF SUB distortion SUB frequency characteristics SUB Main S/N STEREO separation L → R STERO separation R → L Stay behind carrier level (SUB) Stay behind carrier level (MAIN) Cross-talk MAIN → SUB Cross-talk SUB → MAIN MODE output MONO MODE output STEREO MODE output BILINGUAL Just Clock output High volt Just Clock output Low volt Max Output level THDSU2 FCSU2 SNSU2 SEPR2 SEPL2 CLSU2 CLMA2 CTSUB2 CTMA2 MODMO2 MODST2 MODBI2 JCH2 JCL2 MOL2 fm = 1kHz, 100% Mod, Cue (Bilingual), 15kHz LPF fm = 10kHz/1kHz, 60% Mod, Cue (Bilingual), 15kHz LPF, Pre-Emphasis OFF Sub Carrier (Non Mod), Cue (Bilingual), 15kHz LPF fm = 1kHz (L-only), 60% Mod, Cue (Stereo), 15kHz LPF fm = 1kHz (R-only), 60% Mod, Cue (Stereo), 15kHz LPF Main = 0%, Sub = 0% (Carrier) Cue (Bilingual) Main = 0%, Sub = 0% (Carrier) Cue (Bilingual) Main : fm = 1kHz, 100% modulation, Cue (Bilingual), 15kHz LPF Sub : fm = 1kHz, 100% modulation, Cue (Bilingual), 15kHz LPF Input = Mono Signal Input = Stereo Signal Input = Bilingual Signal f = 400Hz (mono), 25%Mod f = 400Hz (mono), 10%Mod f = 1kHz, distortion = 3% 3.3 1462 EXTERNAL input level EXTIN2 f = 1kHz, (pin 12 & pin 13 input) 4.2 1622 -14.5 188.4 0 1.7 2.7 4 1 1 2 3 1.3 2.3 3.3 V V V V V dBV mVrms dBV mVrms 55 62 dB 55 62 dB -55 -45 dBV -50 -40 dBV 35 38 dB 50 35 58 38 dB dB -18 -14.5 dB 55 -6 501 60 -4.5 595 0.7 -3 708 1.5 dB dBV mVrms % -6 501 -4.5 595 0.2 -3 708 0.5 dBV mVrms % 50 57 dB 55 -6 501 60 -4.5 595 0.5 -3 708 1 dB dBV mVrms % -18 -6 501 MONO L/R level difference MONO distortion MONO frequency characteristics -1 typ 28 90 31.62 -4.5 595 0 0.2 -13.5 max 36 110 316.2 -3 708 1 0.5 unit mA dBμV mVrms dBV mVrms dB % dB No.A0626-3/14 LA72714VA Package Dimensions unit : mm (typ) 3287 6.5 24 13 4.4 6.4 1 0.5 (0.5) 0.22 12 0.15 SANYO : SSOP24(225mil) 0.1 (1.3) 1.5max 0.5 No.A0626-4/14 MODE I/O VCC 5V OUT(L) 2.2μF or more 1μF + 16 15 14 13 1 μF + + 17 OUT(R) EXT_IN(R) 2.2μF or more + 20 AMP(10dB) MODE REGULATOR SW LCH RCH MATRIX SUB 15KfH LPF SUB DEEM MAIN DEEM 15KfH LPF MAIN 19 18 SLAVE ADD SELECT H:84H OPEN:80H L:A0H N.C. 22 21 N.C. N.C. 2.2μF + 1μF Block Diagram and Application 24 23 CUE DET SUB DET SUB BPF 4.5fH TRAP SUB DEMOD SUB DET COMP 952Hz BPF 3.5fH CLK.G LA72714VA AM DEMOD CUE BPF SIF JUST CLK GND 6 7 VCC 8 1kΩ 100kΩ 9 I2C DECODE 10 1kΩ 11 1 μF 12 + 1 + 4.7μF 0.1μF SIF_IN + 2 3 4 5 0.033μF 1μF Base Band Mode Application controlled by I2C 4 5 + MPX IN N.C 10μF 10kΩ I2C CLOCK TEST1 EXT_IN(R) SLAVE ADDRESS = 1000 000*B(16PIN : OPEN) SLAVE ADDRESS = 1000 010*B(16PIN : H) SLAVE ADDRESS = 1010 000*B(16PIN : L) JUST CLK OUT I2C MUTE (open collector) H:MUTE DATA OPEN/L:NORMAL 4.5MHz BPF From Tuner Match resistance No.A0626-5/14 LA72714VA Pin Functions Pin No. 1 Pin Name AM DETECTOR Function Reference terminal of AM detection. DC voltage AC level DC : 2.3V Equivalent Circuit VCC 10kΩ 1kΩ 10kΩ 1kΩ 2 14 DC FILTER OUT Absorbing the DC offset of signal line by external capacity. 2pin DC : 2.6V 14pin DC : 2.1V 3 15 DC FILTER IN Absorbing the DC offset of signal line by external capacity. DC : 2.4V 2.4V 2kΩ 100kΩ 1kΩ 2kΩ 4 FM FILTER Filter terminal for making stable DC voltage of FM detection output in SIF part. Normally, use a condenser of 4.7μF. Increase the capacity value with concerning frequency characteristics of low level. DC : 2.9V 1kΩ 1kΩ 5 SIF INPUT Input terminal for SIF. The input impedance is about 5kΩ. Be care for about pattern layout of the input circuit, because of causing buzz-beat and buzz by leaking noise signal into the input terminal. (The noise signal depending on sound is particularly video signal and chroma signal and so on. VIF carrier becomes noise signal.) DC : 2.4V 500Ω 500Ω 10kΩ 10kΩ 6 GND Continued on next page No.A0626-6/14 LA72714VA Continued from preceding page. Pin No. 7 Pin Name JUST CLOCK OUT Function Rectangle wave output for JUST CLOCK. (OPEN Collector) 100kΩ Pull-up DC voltage AC level Equivalent Circuit 5V 5kΩ 0V 8 MUTE MUTE control pin. MUTE : 3.0V to DC : 0V 1kΩ 2.4V 100kΩ 70kΩ 9 SDA Serial data input/output pin. High : 2.5V to 5V Low : 0V to 1.5V 30μA 5V 500Ω 0V 10 SCL Serial clock input pin. High : 2.5V to 5V Low : 0V to 1.5V 30μA 5V 500Ω 0V 11 12 TEST1 EXTIN R EXT input Rch not used : OPEN DC : 2.4V -14.5dBV VCC 50kΩ 2.4V 1kΩ 13 EXTIN L EXT input Lch not used : OPEN DC : 2.4V -14.5dBV VCC 50kΩ 2.4V 1kΩ 16 TEST2 Continued on next page No.A0626-7/14 LA72714VA Continued from preceding page. Pin No. 17 18 Pin Name Line Out (R) Line Out (L) Line output pin. Function DC voltage AC level DC : 2.4V AC : -14.5dBV Equivalent Circuit 50kΩ 2.5pF 2.5pF 50kΩ 250Ω 300Ω 19 20 VCC5V MTS MODE OUT Detection output for M.T.S. signal. BILINGUAL :3.0V STEREO MONO :2.0V :1.0V No signal DC : 1.0V 10kΩ 10kΩ 21 REG FILT Filter terminal of reference voltage source DC : 2.4V 500Ω 500Ω 50kΩ 10kΩ 10kΩ 10kΩ 22 23 24 NC No.A0626-8/14 LA72714VA I2C BUS serial interface specification (1) Data Transfer Manual This IC adopts control method(I2C-BUS) with serial data, and controlled by two terminals which called SCL(serial clock) and SDA (serial data).At first, set up*1 the condition of starting data transfer, and after that, input 8 bit data to SDA terminal with synchronized SCL terminal clock. The order of transferring is first, MSB (the Most Scale of Bit), and save the order. The 9th bit takes ACK (Acknowledge) period, during SCL terminal takes ‘H’, this IC pull down the SDA terminal. After transferred the necessary data, two terminals lead to set up and of *2 data transfer stop condition, thus the transfer comes to close. *1 Defined by SCL rise down SDA during ‘H’ period. *2 Defined by SCL rise up SDA during ‘H’ period. (2) Transfer Data Format After transfer start condition, transfers slave address (1000 000*) to SDA terminal, control data, then, stop condition (See figure 1). Slave address is made up of 7bits, 8th bit*3 shows the direction of transferring data, if it is ‘L’ takes write mode (As this IC side, this is input operation mode), and in case of ‘H’ reading mode (As this IC side, this is output operation mode). Data works with all of bit, transfer the stop condition before stop 8bit transfer, and to stop transfer, it will be canceled the transfer dates. *3 It is called R/W bit. Fig.1 DATA STRUCTURE “WRITE” mode START Condition Slave Address R/WL ACK Control data ACK STOP condition Fig.2 DATA STRUCTURE “READ” mode START condition Slave Address R/WH ACK Internal Data * ACK STOP condition ∗ Output data as follows ; bit8 is result of STERO DET bit7 is result of BILINGUAL DET bit6 is Initial Condition ‘H’ bit5 to bit1 are fixed to ‘L’ (3) Initialize (H : STEREO) (H : BILINGUAL) This LSI is initialized for circuit protection. Initial condition is “01h (Main-Mode) ”. No.A0626-9/14 LA72714VA I2C Timing Specifications Parameter LOW level input voltage HIGH level input voltage LOW level output current SCL clock frequency Set-up time for a repeated START condition Hold time START condition. After this period, the first clock pulse is generated LOW period of the SCL clock Rise time of both SDA and SDL signals HIGH period of the SCL clock Fall time of both SDA and SDL signals Data hold time : Data set-up time Set-up time for STOP condition BUS free time between a STOP and START condition Symbol VIL VIH IOL fSCL tSU : STA tHD : STA tLOW tR tHIGH tF tHD : DAT tSU : DAT tSU : STO tBUF 0 4.7 4.0 4.7 0 4.0 0 0 250 4.0 4.7 1.0 1.0 min -0.5 2.5 max 1.5 5.5 3.0 100 unit V V mA kHz μs μs μs μs μs μs μs ns μs μs Definition of timing tR t HI G H tF S CL t HD : S TA t SU : S TA t LO W t HD : D AT A t SU : D AT t SU : S TO t BU F S DA No.A0626-10/14 LA72714VA I2C Control/LA72714VA Group number is OMLY 1 (Normal Use). Grp-1 D8 D7 D6 D5 D4 D3 D2 0 * 0 1 1 * 0 1 * 0 1 * 0 1 * 0 1 * 0 1 * 0 1 *:Initial condition D1 0 1 0 1 Condition Bilingual Main Sub (Prohibit) Normal Forced MONO Normal (MUTE Off) MUTE TV Mode (SW Normal) EXT Mode (SW EXT) JUST CLOCK Off JUST CLOCK On SIF Mode BASE BAND Mode Fix Prohibit (TEST Mode) Read out data D8 D7 D6 D5 0 0 1 0 1 0 1 D4 0 D3 0 D2 0 D1 0 Condition Fixed Normal Stereo det Normal Bilingual det Except an initial condition Initial condition Test mode condition When STOP condition transform at Grp-1 data-end, controlled NORMAL mode. Grp-2 (Only test condition : Normally, this group is hidden group) D8 0 0 0 0 0 0 0 0 0 0 0 D7 0 0 0 0 0 0 0 0 0 0 0 D6 0 0 0 0 0 0 0 0 0 0 0 D5 0 0 0 0 0 0 0 0 0 0 0 D4 0 0 0 0 0 0 0 0 1 1 1 D3 0 0 0 0 1 1 1 1 0 0 0 D2 0 0 1 1 0 0 1 1 0 0 1 D1 0 1 0 1 0 1 0 1 0 1 0 TEST-01 SIF out TEST-02 SUB FIL out TEST-03 CUE FIL out TEST-04 SUD DET out TEST-05 CUE DC1 out TEST-06 SUB DET2 out TEST-07 110K out TEST-08 28K out TEST-09 CUE PLS out TEST-10 FIL ZAP LEVEL Condition/Moniter position SLAVE ADDRESS 80H (16pin : OPEN) SLAVE ADDRESS 84H (16pin : VCC) SLAVE ADDRESS A0H (16pin : GND) No.A0626-11/14 LA72714VA Mode Select (pin & I2C setting) Broadcast signal MUTE PIN setting pin8 Bilingual L or OPEN L or OPEN L or OPEN L or OPEN * H L or OPEN STEREO L or OPEN L or OPEN * H L or OPEN MONO L or OPEN * H L or OPEN *: Don’t care. D5 0 0 0 0 * * 1 0 0 * * 1 0 * * 1 D4 0 0 0 0 1 * 0 0 0 1 * 0 0 1 * 0 D3 0 0 0 1 * * * 0 1 * * * * * * * D2 0 0 1 * * * * * * * * * * * * * D1 0 1 0 * * * * * * * * * * * * * LCH (pin18) MAIN MAIN SUB MAIN MUTE MUTE EXT L L L+R MUTE MUTE EXT L L+R MUTE MUTE EXT L RCH (pin17) SUB MAIN SUB MAIN MUTE MUTE EXT R R L+R MUTE MUTE EXT R L+R MUTE MUTE EXT R MODE BOTH MAIN SUB MONO MUTE MUTE EXT STEREO MONO MUTE MUTE EXT MONO MUTE MUTE EXT I 2C OUTPUT MODE READ MODE OUT D8 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 D7 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 1V 2V MODE I/O Pin20 3V 16pin : Slave address select. 0V to 1.5V : A0H, OPEN : 80H, 3.0V to VCC : 84H Serial Data Specification (I2C bus communication) Data bit MSB D8 TEST D7 SIF or BASE BAND D6 JUST CLK D5 EXT SOURCE SELECT D4 NORMAL OUT MUTE D3 Forced MONO D2 LSB D1 (Bilingual mode select) 0 : OFF 1 : ON 0 : SIF 1 : BASE BAND 0 : OFF 1 : ON 0 : OFF(TV) 1 : EXT 0 : OFF 1 : ON 0 : OFF 1 : ON 00:BILINGUAL 01:MAIN 10:SUB 11:Unusable Note : Underline shows default setting No.A0626-12/14 Test Circuit DC VOLT METER VCC 5V Slave ADD SELECT EXT_IN(L) H:84H OPEN:80H L:A0H 1μF + 16 15 14 13 1μF + AUDIO Analyzer N.C. 22 AMP(10dB) MODE REGULATOR LOGIC CONTROL SUB 15KfH LPF SUB DEEM MAIN DEEM 15KfH LPF MAIN SW LCH RCH MATRIX 21 20 19 18 17 N.C. N.C. 2.2μF + 1μF OUT(L) 10μF + OUT(R) 10μF + 24 23 CUE DET SUB DET SUB BPF 4.5fH TRAP SUB DEMOD COMP 952Hz BPF 3.5fH CLK.G LA72714VA AM DEMOD CUE BPF SIF JUST CLK GND 6 7 VCC 8 1kΩ 100kΩ OSCILLO SCOPE 4.5MHz BPF 330kΩ SG SIF_INPUT 9 I2C DECODE 10 1kΩ 11 1μF 12 + 1 + 4.7μF 0.1μF + 2 3 4 5 0.33μF 1μF Base Band Mode Application controlled by I2C 4 5 MPX_INPUT + N.C 10μF SG 10kΩ I2C DATA H:MUTE OPEN/L:NORMAL MUTE I2C CLOCK TEST1 EXT_IN(R) SLAVE ADDRESS = 1000 000*B(16PIN : OPEN) SLAVE ADDRESS = 1000 010*B(16PIN : H) SLAVE ADDRESS = 1010 000*B(16PIN : L) No.A0626-13/14 LA72714VA 6 4 2 Output frequency characteristics typ (30%MOD SIF IN) 10 De-emphasis characteristics typ (30%MOD SIF IN) Output level – dB 0 –2 –4 –6 Output level – dB ST Rch ST Lch MAIN 5 0 SUB –5 MAIN – 10 –8 – 10 0.01 2 3 5 7 0.1 2 3 571 2 3 5 7 10 – 15 0.01 2 3 5 7 0.1 2 3 571 2 3 5 7 10 SUB Frequency – kHz 2000 Frequency – kHz 4 MAIN modulation level - output level & distortion typ (1kHz SIF IN) Output level 1500 3 Output level – dB 1000 2 Distortion 500 1 0 0 100 200 300 0 360 Main modulation – % SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of February, 2007. Specifications and information herein are subject to change without notice. PS No.A0626-14/14
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