LA72715NV

Ordering number : ENA1770 Monolithic Linear IC LA72715NV Overview Features JPN MTS (Multi Channel Television Sound) Decoder IC JPN MTS (Multi Channel Television Sound) Decoder IC • With SIF circuit, alignment-free* STEREO channel separation. * In base band signal input mode, separation is adjusted by input level. • Three I2C slave-addresses are prepared. • The maximum output level is as large as 4.2dBV. (Frequency = 1kHz, distortion = less than 3%, VCC = 5V, TYP) • The external clock is unnecessary. • A couple of external input terminal is prepared. Functions • Stereo & Bilingual demodulation. • Stereo & Bilingual detection. • Just clock out. Specifications Maximum Ratings at Ta = 25°C Parameter Maximum power supply voltage Allowable power dissipation Operating temperature Storage temperature Symbol VCCH max Pd max Topr Tstg Ta ≤ 80°C, Mounted on a specified board* Conditions Ratings 7.0 203 -20 to +80 -55 to +150 Unit V mW °C °C * Mounted on a specified board: 114.3mm × 76.1mm × 1.6mm glass epoxy board Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 71410 SY 20100707-S00006 No.A1770-1/13 LA72715NV Operating Ranges at Ta = 25°C Parameter Recommended operating voltage Allowable operating voltage Symbol VCCH VCCH op Conditions Ratings 5.0 4.5 to 5.5 Unit V V Electrical Characteristics at Ta = 25°C, VDD = 5V [Condition of input signal at pin 5] BASE BAND input [Output] L-ch: pin 18, R-ch: pin 17 Ratings Parameter Current dissipation MONO output level Symbol ICC1 VOMN1 ΔVOMN1 THDM1 FCM1 SNM1 VOST1 Conditions No signal, Inflow current at pin 19 fm = 1kHz, 100% Mod, Pre-emphasis OFF min 18 -6 501 MONO L/R level difference MONO distortion MONO frequency characteristics MONO S/N STEREO output level fm = 1kHz, 100% Mod, Pre-emphasis OFF fm = 1kHz, 100% Mod, Pre-emphasis OFF fm = 10kHz/1kHz, 100% Mod, 15kHz LPF Pre-emphasis OFF Non Mod, 15kHz LPF fm = 1kHz, 100% Mod, Cue (Stereo), 15kHz LPF STEREO distortion STEREO S/N Main output level THDS1 SNS1 VOMA1 fm = 1kHz, 100% Mod, Cue (Stereo), 15kHz LPF Sub Carrier (Non Mod), Cue (Stereo), 15kHz LPF fm = 1kHz, 100% Mod, Cue (Bilingual), 15kHz LPF Main distortion Main S/N SUB output level THDMA1 SNMA1 VOSU1 fm = 1kHz, 100% Mod, Cue (Bilingual), 15kHz LPF Sub Carrier (Non Mod), Cue (Bilingual), 15kHz LPF fm = 1kHz, 100% Mod, Cue (Bilingual), 15kHz LPF SUB distortion SUB frequency characteristics SUB Main S/N STEREO separation L → R STERO separation R → L Stay behind carrier level (SUB) Stay behind carrier level (MAIN) Cross-talk MAIN → SUB Cross-talk SUB → MAIN MODE output MONO MODE output STEREO MODE output BILINGUAL Just Clock output High voltage Just Clock output Low voltage Max Output level THDSU1 FCSU1 SNSU1 SEPR1 SEPL1 CLSU1 CLMA1 CTSUB1 CTMA1 MODMO1 MODST1 MODBI1 JCH1 JCL1 MOL1 fm = 1kHz, 100% Mod, Cue (Bilingual), 15kHz LPF fm = 10kHz/1kHz, 60% Mod, Cue (Bilingual), 15kHz LPF, Pre-emphasis OFF Sub Carrier (Non Mod), Cue (Bilingual), 15kHz LPF fm = 1kHz (L-only), 60% Mod, Cue (Stereo), 15kHz LPF fm = 1kHz (R-only), 60% Mod, Cue (Stereo), 15kHz LPF Main = 0%, Sub = 0% (Carrier) Cue (Bilingual) Main = 0%, Sub = 0% (Carrier) Cue (Bilingual) Main : fm = 1kHz, 100% modulation, Cue (Bilingual), 1kHz BPF Sub : fm = 1kHz, 100% modulation, Cue (Bilingual), 1kHz BPF Input = Mono Signal Input = Stereo Signal Input = Bilingual Signal f = 400Hz (mono), 25% Mod f = 400Hz (mono), 10% Mod f = 1kHz, distortion = 3% 3.3 1462 4.2 1622 1.7 0 2.7 4 1 2 1 3 2.3 1.3 3.3 V V V V V dBV mVrms 55 62 dB 55 62 dB -55 -45 dBV -50 -40 dBV 35 43 dB 50 35 60 43 dB dB -18 -14.5 dB 60 -6 501 65 -4.5 595 0.7 -3 708 1.5 dB dBV mVrms % -6 501 -4.5 595 0.2 -3 708 0.5 dBV mVrms % 50 60 dB 60 -6 501 65 -4.5 595 0.5 -3 708 1 dB dBV mVrms % -18 -1 typ 26 -4.5 595 0 0.2 -13.5 max 34 -3 708 1 0.5 unit mA dBV mVrms dB % dB Continued on next page. No.A1770-2/13 LA72715NV Continued from preceding page. Ratings Parameter EXTERNAL input level Symbol EXTIN1 Conditions f = 1kHz, (pin 12 & pin 13 input) min typ -14.5 188.4 8pin-CONTROL “H” 8pin-CONTROL “OPEN” 8pin-CONTROL “L” MUTEH MUTEOP MUTEL MUTE-ON MUTE-OFF MUTE-OFF & Detection AREA CONROL 0 3.0 0.9 0.2 VCC max unit dBV mVrms V V V [Condition of input signal at pin 5] Deviation of SIF input MONO : (fm = 1kHz) 100%→4.5MHz±25kHz Pre-Emphasis ON [Output] L-ch : pin 18, R-ch : pin 17 Ratings Parameter Current dissipation Input sensitivity level Symbol ICC2 VSIN Conditions No signal, Inflow current at pin 19 fc = 4.5MHz min 20 70 3.16 MONO output level VOMN2 ΔVOMN2 THDM2 FCM2 SNM2 VOST2 fm = 1kHz, 100% Mod, Pre-emphasis OFF -6 501 MONO L/R level difference MONO distortion MONO frequency characteristics MONO S/N STEREO output level fm = 1kHz, 100% Mod, Pre-emphasis OFF fm = 1kHz, 100% Mod, Pre-emphasis OFF fm = 10kHz/1kHz, 100% Mod, 15kHz LPF Pre-emphasis OFF Non Mod, 15kHz LPF fm = 1kHz, 100% Mod, Cue (Stereo), 15kHz LPF STEREO distortion STEREO S/N Main output level THDS2 SNS2 VOMA2 fm = 1kHz, 100% Mod, Cue (Stereo), 15kHz LPF Sub Carrier (Non Mod), Cue (Stereo), 15kHz LPF fm = 1kHz, 100% Mod, Cue (Bilingual), 15kHz LPF Main distortion Main S/N SUB output level THDMA2 SNMA2 VOSU2 fm = 1kHz, 100% Mod, Cue (Bilingual), 15kHz LPF Sub Carrier (Non Mod), Cue (Bilingual), 15kHz LPF fm = 1kHz, 100% Mod, Cue (Bilingual), 15kHz LPF SUB distortion SUB frequency characteristics SUB Main S/N STEREO separation L → R STERO separation R → L Stay behind carrier level (SUB) Stay behind carrier level (MAIN) Cross-talk MAIN → SUB Cross-talk SUB → MAIN MODE output MONO MODE output STEREO MODE output BILINGUAL Just Clock output High voltage THDSU2 FCSU2 SNSU2 SEPR2 SEPL2 CLSU2 CLMA2 CTSUB2 CTMA2 MODMO2 MODST2 MODBI2 JCH2 fm = 1kHz, 100% Mod, Cue (Bilingual), 15kHz LPF fm = 10kHz/1kHz, 60% Mod, Cue (Bilingual), 15kHz LPF, Pre-emphasis OFF Sub Carrier (Non Mod), Cue (Bilingual), 15kHz LPF fm = 1kHz (L-only), 60% Mod, Cue (Stereo), 15kHz LPF fm = 1kHz (R-only), 60% Mod, Cue (Stereo), 15kHz LPF Main = 0%, Sub = 0% (Carrier) Cue (Bilingual) Main = 0%, Sub = 0% (Carrier) Cue (Bilingual) Main : fm = 1kHz, 100% modulation, Cue (Bilingual), 1kHz BPF Sub : fm = 1kHz, 100% modulation, Cue (Bilingual), 1kHz BPF Input = Mono Signal Input = Stereo Signal Input = Bilingual Signal f = 400Hz (mono), 25%Mod 1.7 0 2.7 4 2 1 3 2.3 1.3 3.3 V V V V 55 62 dB 55 62 dB -55 -45 dBV -50 -40 dBV 35 38 dB 50 35 58 38 dB dB -18 -14.5 dB 55 -6 501 60 -4.5 595 0.7 -3 708 1.5 dB dBV mVrms % -6 501 -4.5 595 0.2 -3 708 0.5 dBV mVrms % 50 57 dB 55 -6 501 60 -4.5 595 0.5 -3 708 1 dB dBV mVrms % -18 -1 typ 28 90 31.62 -4.5 595 0 0.2 -13.5 max 36 110 316.2 -3 708 1 0.5 unit mA dBμV mVrms dBV mVrms dB % dB Continued on next page. No.A1770-3/13 LA72715NV Continued from preceding page. Ratings Parameter Just Clock output Low voltage Max Output level Symbol JCL2 MOL2 Conditions f = 400Hz (mono), 10%Mod f = 1kHz, distortion = 3% 3.3 1462 EXTERNAL input level EXTIN2 f = 1kHz, (pin 12 & pin 13 input) 4.2 1622 -14.5 188.4 8pin-CONTROL “H” 8pin-CONTROL “OPEN” 8pin-CONTROL “L” MUTEH MUTEOP MUTEL MUTE-ON MUTE-OFF MUTE-OFF & Detection AREA CONROL 0 3.0 0.9 0.2 VCC min typ max 1 unit V dBV mVrms dBV mVrms V V V Package Dimensions unit : mm (typ) 3175C 7.8 24 13 [LA72715NV] 5.6 7.6 1 0.65 (0.33) 0.22 12 0.15 SANYO : SSOP24(275mil) 0.1 (1.3) 1.5max 0.5 No.A1770-4/13 DC VOLT METER OUT(L) N.C. 24 AMP(10dB) MODE REGULATOR CUE DET LOGIC CONTROL SUB 15kHz LPF SUB DEEM MAIN DEEM 15kHz LPF MAIN COMP 952Hz BPF AM DEMOD CUE BPF 4.5fH TRAP 3.5fH CLK.G SUB BPF SUB DEMOD SUB DET SW LCH RCH MATRIX 23 22 21 20 19 18 17 16 15 14 N.C. N.C. + + + 13 + + Block Diagram and Test Circuit VCC 5V AUDIO ANALYZER EXT_IN(L) SLAVE ADD SELECT H:84H OPEN:80H L:A0H OUT(R) LA72715NV SIF JUST CLK GND 6 7 8 VCC 9 I2C DECODE 10 11 12 + OSCILLO I2C MUTE SCOPE H:MUTE DATA OPEN/L:NORMAL I 2C CLOCK TEST1 EXT_IN(R) SG SIF_INPUT SLAVE ADDRESS = 1000 000*B (16PIN : OPEN) SLAVE ADDRESS = 1000 010*B (16PIN : H) SLAVE ADDRESS = 1010 000*B (16PIN : L) 1 + 2 + 3 4 5 Base Band Mode Application controlled by I2C 4 5 MPX INPUT + N.C SG 4.5MHz BPF No.A1770-5/13 MODE I/O VCC 5V 47μF OUT(L) OUT(R) EXT_IN(L) + 1μF 14 13 + 20 AMP(10dB) MODE REGULATOR CUE DET LOGIC CONTROL SUB 15kHz LPF SUB DEEM MAIN DEEM 15kHz LPF MAIN COMP 952Hz BPF AM DEMOD CUE BPF 4.5fH TRAP 3.5fH CLK.G SUB BPF SUB DEMOD SUB DET SW LCH RCH MATRIX 0.1μF 19 18 17 16 15 + 100μH 2.2μF or more 2.2μF or more 1μF SLAVE ADD SELECT H:84H OPEN:80H L:A0H N.C. 24 23 22 21 Block Diagram and Application Circuit Example N.C. N.C. 2.2μF + 4.7μF (*3) LA72715NV SIF VCC 1 4.7μF 1μF Base Band Mode Application controlled by I2C 4 5 + N.C MPX IN 10μF 10kΩ + 0.1μF SIF_IN 2 3 4 5 GND 6 JUST CLK 7 8 VCC 1kΩ 100kΩ 9 I2C DECODE 10 1kΩ 11 1μF 12 470kΩ to 1MΩ (*1) 0.01μF to 0.047μF (*1) The value of (1*), (2*), and (3*) affects sensitivity for signal detection. It must be adjusted depending on the circumstances by the user. (1*): Recommended constant value 0.0033μF + 470kΩ (values when tested) (2*): Recommended matching resistor value R1=1kΩ, R2=1kΩ Recommended BPF Murata SFSRA4M50DF00-B0 (3*): Recommended constant value 4.7μF to 10kΩ The ceramic capacitor may be used for the electrolytic capacitor. R2 I2C TEST1 EXT_IN(R) JUST CLK OUT I2C MUTE CLOCK (open collector) H:MUTE DATA R1 OPEN/L:NORMAL 4.5MHz BPF From (*2) Tuner SLAVE ADDRESS = 1000 000*B (16PIN : OPEN) SLAVE ADDRESS = 1000 010*B (16PIN : H) Match SLAVE ADDRESS = 1010 000*B (16PIN : L) resistance (*2) No.A1770-6/13 LA72715NV Pin Functions Pin No. 1 Pin Name AM DETECTOR DC voltage AC level DC : 2.3V Function Reference terminal of AM detection. Equivalent Circuit PAD VCC 10kΩ 1kΩ 10kΩ 1kΩ 2 14 DC FILTER OUT 2pin DC : 2.6V 14pin DC : 2.1V Absorbing the DC offset of signal line by external capacity. PAD 3 15 DC FILTER IN DC : 2.4V Absorbing the DC offset of signal line by external capacity. 2.4V 2kΩ 100kΩ PAD 1kΩ 2kΩ 4 FM FILTER DC : 2.9V Filter terminal for making stable DC voltage of FM detection output in SIF part. Normally, use a condenser of 4.7μF. Increase the capacity value with concerning frequency characteristics of low level. 1kΩ 1kΩ PAD 5 SIF INPUT DC : 2.4V Input terminal for SIF. The input impedance is about 5kΩ. Be care for about pattern layout of the input circuit, because of causing buzz-beat and buzz by leaking noise signal into the input terminal. (The noise signal depending on sound is particularly video signal and chroma signal and so on. VIF carrier becomes noise signal.) PAD 500Ω 500Ω 10kΩ 10kΩ 6 GND Continued on next page. No.A1770-7/13 LA72715NV Continued from preceding page. Pin No. 7 Pin Name JUST CLOCK OUT DC voltage AC level (OPEN Collector) 100kΩ Pull-up Function Rectangle wave output for JUST CLOCK. Equivalent Circuit 5V 5kΩ PAD 0V 8 MUTE control pin & Distinction control. DC : 0V 3.0V to VCC : MUTE (CONT 1) OPEN (0.9V) : NORM 0V : NORM & Detection AREA Control (CONT2) Use it within the range of 0 to 0.2V when you operate usually. CONT2 PAD CONT1 2.4V REG 9 Serial data input pin. High : 2.5V to 5V Low : 0V to 1.5V 30μA PAD 500Ω 5V 0V 10 Serial CLK input pin High : 2.5V to 5V Low : 0V to 1.5V 30μA 5V PAD 500Ω 0V 11 12 TEST1 EXTIN_R DC : 2.4V -14.5dBV EXT input Rch not used : OPEN VCC PAD 50kΩ 2.4V 1kΩ 13 EXTIN_L DC : 2.4V -14.5dBV EXT input Lch not used : OPEN VCC PAD 50kΩ 2.4V 1kΩ Continued on next page. No.A1770-8/13 LA72715NV Continued from preceding page. Pin No. 16 17 18 Pin Name SLAVE ADD SELECT Line Out (R) terminal Line Out (L) terminal DC : 2.4V AC : -4.5dBV Line output pin. DC voltage AC level Function Equivalent Circuit 50kΩ 2.5pF 2.5pF 50kΩ 250Ω 300Ω PAD 19 20 VCC5V MTS MODE OUT No signal DC : 2.0V Detection output for M.T.S. signal. BILINGUAL MONO STEREO :3.0V :2.0V :1.0V 10kΩ 10kΩ PAD 21 REG FILT DC : 2.4V Filter terminal of reference voltage source PAD 500Ω 500Ω 50kΩ 10kΩ 10kΩ 10kΩ 22 23 24 NC I2C BUS Serial Interface Specification (1) Data Transfer Manual This LSI adopts control method (I2C-BUS) with serial data, and controlled by two terminals which called SCL (serial clock) and SDA (serial data). At first, set up*1the condition of starting data transfer, and after that, input 8 bit data to SDA terminal with synchronized SCL terminal clock. The order of transferring is first, MSB (the Most Scale of Bit), and save the order. The 9th bit takes ACK (Acknowledge) period, during SCL terminal takes ‘H’, this LSI pull down the SDA terminal. After transferred the necessary data, two terminals lead to set up and of *2data transfer stop condition, thus the transfer comes to close. *1 Defined by SCL rise down SDA during ‘H’ period. *2 Defined by SCL rise up SDA during ‘H’ period. (2) Transfer Data Format After transfer start condition, transfers slave address (1000 000*) to SDA terminal, control data, then, stop condition (See figure 1). Slave address is made up of 7bits, *38th bit shows the direction of transferring data, if it is ‘L’ takes write mode (As this LSI side, this is input operation mode), and in case of ‘H’ reading mode (As this LSI side, this is output operation mode). Data works with all of bit, transfer the stop condition before stop 8bit transfer, and to stop transfer, it will be canceled the transfer dates. At READ mode, this LSI outputs during ACK period, please must input 9 clocks. *3 It is called R/W bit. No.A1770-9/13 LA72715NV Fig.1 DATA STRUCTURE “WRITE” mode START Condition Slave Address R/W L ACK Control data ACK STOP condition Fig.2 DATA STRUCTURE “READ” mode START condition Slave Address R/W H ACK Internal Data * ACK STOP condition ∗ The output data synchronizes with the clock of SCL pin. Then the ACK output is made after the output data. bit8 is result of STERO DET (H : STEREO) bit7 is result of BILINGUAL DET (H : BILINGUAL) bit6 is Initial Condition ‘H’ bit5 to bit1 are fixed to ‘L’ (3) Initialize This IC is initialized for circuit protection. Initial condition is “01h (Main-mode) ”. Reference Parameter LOW level input voltage HIGH level input voltage LOW level output current SCL clock frequency Set-up time for a repeated START condition Hold time START condition. After this period, the first clock pulse is generated LOW period of the SCL clock Rise time of both SDA and SDL signals HIGH period of the SCL clock Fall time of both SDA and SDL signals Data hold time Data set-up time Set-up time for STOP condition BUS free time between a STOP and START condition VIL VIH IOL fSCL tSU : STA tHD : STA tLOW tR tHIGH tF tHD : DAT tSU : DAT tSU : STO tBUF 0 4.7 4.0 4.7 0 4.0 0 0 250 4.0 4.7 1.0 1.0 Symbol min -0.5 2.5 max 1.5 5.5 3.0 100 unit V V mA kHz μs μs μs μs μs μs μs ns μs μs Definition of Timing tR t HI G H tF SCL t HD : S TA t SU : S TA t LO W t HD : D AT A t SU : D AT t SU : S TO t BU F SDA No.A1770-10/13 LA72715NV I2C Control/LA72715NV Group number is ONLY 1 (Normal Use). Grp-1 D8 D7 D6 D5 D4 D3 D2 0 * 0 1 1 * 0 1 * 0 1 * 0 1 * 0 1 * 0 1 * 0 1 D1 0 1 0 1 Condition Bilingual Main Sub (Prohibit) Normal Forced MONO Normal (MUTE OFF) MUTE TV Mode (SW Normal) EXT Mode (SW EXT) JUST CLOCK OFF JUST CLOCK ON SIF Mode BASE BAND Mode Fix Prohibit (TEST Mode) *: Initial condition Read out data D8 0 1 0 1 0 1 D7 D6 D5 0 D4 0 D3 0 D2 0 D1 0 Condition Fixed Normal Stereo det Normal Bilingual det Except an initial condition Initial condition Test Mode Condition When STOP condition transform at Grp-1 data-end, controlled NORMAL mode. Grp-2 (Only test condition : Normally, this group is hidden group) D8 0 0 0 0 0 0 0 0 0 0 0 D7 0 0 0 0 0 0 0 0 0 0 0 D6 0 0 0 0 0 0 0 0 0 0 0 D5 0 0 0 0 0 0 0 0 0 0 0 D4 0 0 0 0 0 0 0 0 1 1 1 D3 0 0 0 0 1 1 1 1 0 0 0 D2 0 0 1 1 0 0 1 1 0 0 1 D1 0 1 0 1 0 1 0 1 0 1 0 TEST-01 SIF out TEST-02 SUB FIL out TEST-03 CUE FIL out TEST-04 SUD DET out TEST-05 CUE DC1 out TEST-06 SUB DET2 out TEST-07 110K out TEST-08 28K out TEST-09 CUE PLS out TEST-10 FIL ZAP LEVEL Condition/Moniter position SLAVE ADDRESS 80H (16pin : OPEN) SLAVE ADDRESS 84H (16pin : VCC) SLAVE ADDRESS A0H (16pin : GND) No.A1770-11/13 LA72715NV Mode Select (pin & I2C setting) Broadcast signal Bilingual MUTE PIN setting 8pin L or OPEN L or OPEN L or OPEN L or OPEN * H L or OPEN STEREO L or OPEN L or OPEN * H L or OPEN MONO L or OPEN * H L or OPEN D5 0 0 0 0 * * 1 0 0 * * 1 0 * * 1 D4 0 0 0 0 1 * 0 0 0 1 * 0 0 1 * 0 I2C D3 0 0 0 1 * * * 0 1 * * * * * * * D2 0 0 1 * * * * * * * * * * * * * D1 0 1 0 * * * * * * * * * * * * * LCH (18pin) MAIN MAIN SUB MAIN MUTE MUTE EXT L L L+R MUTE MUTE EXT L L+R MUTE MUTE EXT L OUTPUT MODE RCH (17pin) SUB MAIN SUB MAIN MUTE MUTE EXT R R L+R MUTE MUTE EXT R L+R MUTE MUTE EXT R MODE BOTH MAIN SUB MONO MUTE MUTE EXT STEREO MONO MUTE MUTE EXT MONO MUTE MUTE EXT READ MODE OUT D8 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 D7 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 2V 1V MODE I/O 20pin 3V 16pin : Slave address select. 0V to 1.5V : A0H, OPEN : 80H, 3.0V to VCC : 84H Serial Data Specification (I2C bus communication) Data bit MSB D8 TEST D7 SIF or BASE BAND 0 : SIF 1 : BASE BAND D6 JUST CLK 0 : OFF 1 : ON D5 EXT SOURCE SELECT 0 : OFF(TV) 1 : EXT D4 NORMAL OUT MUTE 0 : OFF 1 : ON D3 Forced MONO 0 : OFF 1 : ON D2 LSB D1 Bilingual mode select 00:BILINGUAL 01 : MAIN 10 : SUB 11 : Unusable 0 : OFF 1 : ON Note : Underline shows default setting No.A1770-12/13 LA72715NV LA72715NV Reference Characteristics 6 4 2 Output frequency characteristics TYP (30%MOD SIF_IN) MAIN ST_Lch ST_Rch SUB 10 De-emphasis characteristics TYP (30%MOD SIF_IN) 5 Output level – dB 0 –2 –4 –6 Output level – dB 0 –5 IN B MA SU – 10 –8 – 10 0.01 2 3 5 7 0.1 2 3 57 – 15 Frequency, f – kHz 1 2 3 5 7 10 0.01 2 3 5 7 0.1 2 3 Frequency, f – kHz 571 2 3 5 7 10 2000 Main degree of modulation – Output level & Distortion factor TYP (1kHz SIF_IN) 4 Output level – mVrms 1000 t Ou 500 t pu lev el 2 1 Distortion 0 0 100 200 factor 0 300 Main degree of modulation – % SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of July, 2010. Specifications and information herein are subject to change without notice. PS No.A1770-13/13 Distortion factor – % 1500 3