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LA72730_10

LA72730_10

  • 厂商:

    SANYO(三洋)

  • 封装:

  • 描述:

    LA72730_10 - Audio/Video Switch - Sanyo Semicon Device

  • 数据手册
  • 价格&库存
LA72730_10 数据手册
Ordering number : ENA1059A Monolithic Linear IC LA72730 Overview For TV Audio/Video Switch The LA72730 is an Audio/Video Switch for TV. Functions • Audio : Possible to Change 4 Channel×2, ALC OUTPUT, 4dB Amplifier MONITOR OUTPUT • Video : Possible to Change 4 Channel, 6dB Amplifier • Control : I2C (Slave address : 92h) Specifications Maximum Ratings at Ta = 25°C Parameter Maximum supply voltage Allowable power dissipation Operating temperature Storage temperature Symbol VCC max Pd max Topr Tstg Pin 8 Ta ≤ 70°C Conditions Ratings 7.0 300 -20 to +70 -55 to +150 Unit V mW °C °C Recommended Operating Conditions at Ta = 25°C Parameter Recommended operating voltage Operating voltage range Symbol VCC VCC op Pin 8 Pin 8 Conditions Ratings 5.0 4.5 to 5.5 Unit V V Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 21010 SY / 52108 MS PC 20080514-S00004 No.A1059-1/8 LA72730 Electrical Characteristics at Ta = 25°C, VDD = 5.0V Parameter Current dissipation Audio block Audio input DC voltage Audio output DC voltage Audio channel bandwidth Audio voltage gain (Audio-out) Audio voltage gain (Monitor-out) Audio input dynamic range (Audio-out) Audio input dynamic range (Monitor-out) Audio channel PSRR Audio channel input impedance Audio channel output impedance Audio channel crosstalk Audio channel S/N Audio channel THD ALC Detect level-1 ALC Detect level-2 ALC Detect level-3 ALC Detect level-4 Video block Video input DC voltage Video output DC voltage Video channel bandwidth Video signal voltage gain Video input dynamic range Video channel PSRR Video channel input impedance Video channel output impedance Video channel crosstalk Video channel noise INv Ov Fv Av Dv PSv Riv Rov CTv SNv f = 3.58MHz, VIN = 1Vp-p Bandwidth 10MHz -3dB frequency f = 500kHz, VIN = 1Vp-p f = 100kHz, THD ≤ 1% VCC = 5V+1Vp-p, SINE WAVE (50Hz) 1.44 1.26 10 5.0 2.0 35 8.0 30 45 55 6.0 2.5 50 10 40 60 60 12.0 50 7.0 1.6 1.4 1.76 1.54 V V MHz dB Vp-p dB kΩ Ω dB dB PSa Ria Roa CTa SNa THDa ALC1 ALC2 ALC3 ALC4 f = 1kHz Filter = DIN/AUDIO f = 1kHz, VIN = -6dBV -10.5 -15.5 -13.5 -19.5 Da2 INa Oa Fa Aa1 Aa2 Da1 No signal pin 1, 2, 3, 4, 5, 6, 23, 24 DC voltage No signal pin 19, 20 DC voltage Input : 1kHz/20kHz, -6dBV : Pin 19, 20 output f = 1kHz, VIN = -6dBV, Pin 19, 20 output f = 1kHz, VIN = -6dBV, Pin 12, 16 output f = 1kHz, THD = ≤1% Pin 19, 20 output f = 1kHz, THD = ≤1% Pin 13, 16 output VCC = 5V+1Vp-p, SINE WAVE (50Hz) 35 80 150 65 70 50 100 200 80 85 0.15 -9 -14 -12 -18 0.3 -7.5 -12.5 -10.5 -16.5 120 250 dB kΩ Ω dB dB % dBV dBV dBV dBV -5.0 -3.0 dBV 2.2 2.2 -2 -0.3 3.5 -3.0 2.4 2.4 0 0.0 4.0 -1.0 2.6 2.6 +2 +0.3 4.5 V V dB dB dB dBV Symbol ICC Conditions min VCC = 5V, No signal 15.2 Ratings typ 18 max 20.8 mA Unit Package Dimensions unit : mm (typ) 3067B 21.0 24 13 0.9 0.95 3.3 3.9 max (0.71) 0.51min (3.25) 1.78 0.48 SANYO : DIP24S(300mil) 0.25 1 12 7.62 6.4 No.A1059-2/8 LA72730 Block Diagram LIN-1 0.1μF LIN-2 0.1μF LIN-3 0.1μF RIN-1 0.1μF RIN-2 0.1μF RIN-3 0.1μF VIN-1 + 10μF VCC 47μF + 100μH VCC 5V 0.1μF VIN-2 + 10μF 9 4dB 16 7 6dB 18 6 ALC BUFF 19 5 ALC BUFF 20 4 21 3 REG 22 2 23 1 24 LIN-TV 0.1μF RIN-TV 0.1μF + 47μF VIN-TV + 10μF AUDIO L OUT + 10μF AUDIO R OUT + 10μF 75Ω + VIDEO OUT 220μF 75Ω 8 DET 17 + 47μF ALC FILT + 10μF L Monitor out GND 10 NC 15 VIN-3 + 10μF 11 MODE SELECT 12 4dB 13 14 SDA + 10μF R Monitor out SCL No.A1059-3/8 LA72730 I2C Bit Pattarn D8 * D7 D6 D5 D4 D3 D2 0 0 1 1 * 0 1 0 0 * 1 1 * 0 1 0 * * 0 1 “*” : Shows initial condition. Slave address : 92h (1001 0010) 1 0 1 0 1 D1 0 1 0 1 Condition AV IN-TV AV IN-1 AV IN-2 AV IN-3 Norma Mute ALC Level-1 (-9dBV) ALC Level-2 (-14dBV) ALC Level-3 (-12dBV) ALC Level-4 (-18dBV) ALC-ON ALC-OFF Prohibit Fix Fix Prohibit 10 5 0 LINE-OUT 15 10 5 MONITOR OUTPUT – dBV OUTPUT – dBV –5 – 10 – 15 AL C- F OF ALC-1 ALC-3 ALC-2 ALC-4 0 –5 – 10 – 15 – 20 – 25 N MO ITO R – 20 – 25 – 30 – 30 – 25 – 20 – 15 – 10 –5 0 – 30 – 30 – 25 – 20 – 15 – 10 –5 0 INPUT – dBV INPUT – dBV No.A1059-4/8 LA72730 Test Circuit LIN-1 620Ω 0.1μF LIN-2 620Ω 0.1μF LIN-3 620Ω 0.1μF RIN-1 620Ω 0.1μF RIN-2 620Ω 0.1μF RIN-3 620Ω 0.1μF VIN-1 75Ω 0.1μF VCC 8 + 47μF 0.1μF VIN-2 9 0.1μF DET 17 + 7 6dB 18 6 ALC BUFF 19 5 ALC BUFF 20 4 21 3 REG 22 2 23 0.1μF 1 24 0.1μF LIN-TV 620Ω RIN-TV 620Ω + 1μF VIN-TV 0.1μF 75Ω AUDIO L OUT AUDIO R OUT VIDEO OUT VCC5V 1μF ALC FILT 4dB 16 L Monitor out 75Ω GND 10 15 NC VIN-3 75Ω 0.1μF 11 MODE SELECT 12 R Monitor out 4dB 13 14 SDA SCL No.A1059-5/8 LA72730 Pin Functions Pin No. 1 2 3 4 5 6 23 24 Pin Name PIA_L1 PIA_L2 PIA_L3 PIA_R1 PIA_R2 PIA_R3 PIA_RTV PIA_LTV Audio input Function DC : voltage AC : level DC : 2.4V Equivalent Circuit 50kΩ 50kΩ 7 9 11 21 PIV_1 PIV_2 PIV_3 PIV_TV Video input DC : 1.6V 500Ω 8 10 12 16 VCC GND POMONITR POMONITL Monitor output DC : 2.4V 200Ω 13 PISCL Serial clock input 1kΩ 14 PISDA Serial data input 1kΩ 17 POALCFIL ALC detect filter 2kΩ 150Ω Continued on next page No.A1059-6/8 LA72730 Continued from preceding page. Pin No. 18 Pin Name POVIDEO Video output Function DC : voltage AC : level DC : 1.4V Equivalent Circuit 19 20 POALCR POALCL Audio output DC : 2.4V 200Ω 10kΩ 22 PCREG Reference voltage DC : 2.4V 10kΩ 9.6kΩ 1kΩ 500Ω I2C BUS serial interface specification (1) Data Transfer Manual This IC adopts control method (I2C-BUS) with serial data, and controlled by two terminals which called SCL (serial clock) and SDA (serial data).At first, set up *1 the condition of starting data transfer, and after that, input 8 bit data to SDA terminal with synchronized SCL terminal clock. The order of transferring is first, MSB (the Most Scale of Bit), and save the order. The 9th bit takes ACK (Acknowledge) period, during SCL terminal takes “H”, this IC pull down the SDA terminal. After transferred the necessary data, two terminals lead to set up and of *2 data transfer stop condition, thus the transfer comes to close. *1 Defined by SDA fall down SCL during ‘H’ period. *2 Defined by SDA rise up SCL during ‘H’ period. (2) Transfer Data Format After transfer start condition, transfers slave address (92h : 1001 0010 ) to SDA terminal, control data, then, stop condition (See figure 1). Slave address is made up of 7bits, *3 8th bit shows the direction of transferring data, but this IC does not have READ mode, so that this bit fix to “L”. Data works with all of bit, transfer the stop condition before stop 8bit transfer, and to stop transfer, it will be canceled the transfer dates. *3 It is called R/W bit. Fig.1 DATA STRUCTURE START Condition Slave Address R/W L ACK Control data ACK STOP condition (3) Initialize This IC is initialized for circuit protection. Initial condition is shown on bitmap. No.A1059-7/8 LA72730 Reference Parameter LOW level input voltage HIGH level input voltage LOW level output current SCL clock frequency Set-up time for a repeated START condition Hold time START condition. After this period, the first clock pulse is generated LOW period of the SCL clock Rise time of both SDA and SDL signals HIGH period of the SCL clock Fall time of both SDA and SDL signals Data hold time Data set-up time Set-up time for STOP condition BUS free time between a STOP and START condition Symbol VIL VIH IOL fSCL tSU : STA tHD : STA tLOW tR tHIGH tF tHD : DAT tSU : DAT tSU : STO tBUF 0 4.7 4.0 4.7 0 4.0 0 0 250 4.0 4.7 1.0 1.0 min -0.5 2.5 max 1.5 5.5 3.0 100 unit V V mA kHz μs μs μs μs μs μs μs ns μs μs Definition of timing tR t HI G H tF S CL t HD : S TA t SU : S TA t LO W t HD : D AT A t SU : D AT t SU : S TO t BU F S DA SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of February, 2010. Specifications and information herein are subject to change without notice. PS No.A1059-8/8
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