Ordering number : EN*A1283
Monolithic Linear IC
LA74322LP
Overview
Audio I/O Interface for Cell Phone
The LA74322LP is an audio I/O interface IC for cell phones that integrates, on a single chip, amplifiers for a monaural speaker, EVR stereo headphone, internal and external microphones, and a receiver speaker.
Features
• INT & EXT MIC amplifiers selectable (MIC power supply built-in) • ALC amplifier (ALC level: 3 levels selectable) • Base band/audio source input selector switch • ALC (through switch, ALC level: 4 levels selectable) • EVR stereo headphone amplifier • Monaural speaker amplifier • Receiver speaker amplifier (mono) standby control • I2C bus supported (first mode)
Specifications
Maximum Ratings at Ta=25°C
Parameter Supply voltage Allowable power dissipation Operating temperature Storage temperature Symbol VCC max Pd max Topr Tstg Ta≤70°C, Mounted on a specified board *1 Conditions Ratings 5.5 TBD -20 to +70 -55 to +150 Unit V mW °C °C
*1: Mounted on a specified board: TBD
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment.
73008 TI IM No.A1283-1/14
LA74322LP
Operating Conditions at Ta = 25°C
Parameter Recommended supply voltage (VCCA) Recommended supply voltage (VCCHP) Recommended supply voltage (VCCSP) Allowable operating voltage range (VCCA) Allowable operating voltage range (VCCHP) Allowable operating voltage range (VCCSP) Symbol VCCA VCCHP VCCSP VCCAop VCCHPop VCCSPop *2 Conditions Ratings 3.0 3.0 3.6 2.7 to 3.6 2.7 to 3.6 2.7 to 5.0 Unit V V V V V V
*2: Take care not to exceed Pd max. Electrical Characteristics at Ta=25°C, VCCA=VCCHP=3.0V, VCCSP=5.0V, f=1kHz, ALC1 LEVEL=-17dBV MODE, ALC2 LEVEL=-11dBV MODE
No. Circuit current 1 VCCA current dissipation ICCA VCCA=3.0V, MIC1 ON, audio source system (stereo) OFF, receiver system ON 2 3 4 5 6 7 8 VCCA STANDBY current dissipation VCCHP current dissipation 1 VCCHP current dissipation 2 VCCHP STANDBY current dissipation VCCSP current dissipation 1 VCCSP current dissipation 2 VCCSP STANDBY current dissipation ICCAS ICCHP1 ICCHP2 ICCHPS ICCSP1 ICCSP2 ICCSPS VCCA=3.0V, 0V applied to STANBDY pin VCCHP=3.0V: Receiver SPK AMP POWER SAVE MODE VCCHP=3.0V: H/P AMP POWER SAVE MODE VCCHP=3.0V, 0V applied to STANBDY pin VCCSP=5.0V: SPK POWER ON MODE VCCSP=5.0V: SPK POWER SAVE MODE VCCSP=5.0V, 0V applied to STANBDY pin 6.5 0.3 10 10 8.5 2.7 10 μA mA mA μA mA mA μA Parameter Symbol Conditions min Ratings typ max Unit
9.5
mA
MIC output system 9 10 11 12 INT MIC voltage gain INT MIC output distortion INT MIC output noise voltage INT MIC maximum input level VGIMIC HDIMIC VNIMIC VMIMIC INT MIC input, VIN=-29dBV INT MIC input, VIN=-29dBV, THD: from 2nd to 5th harmonic INT MIC no input, JIS-A Filter INT MIC input, INT MIC input level at which up to 5th order distortions of MIC output are reduced to 3% or less 13 14 15 16 17 INT MIC supply voltage EXT MIC voltage gain EXT MIC output distortion EXT MIC output noise voltage EXT MIC maximum input level VVIMIC VGEMIC HDEMIC VNEMIC VMEMIC At 6.2kΩ load EXT MIC input, VIN=-29dBV EXT MIC input, VIN=-29dBV, THD: from 2nd to 5th harmonic EXT MIC no input, JIS-A Filter EXT MIC input, EXT MIC input level at which up to 5th order distortions of MIC output are reduced to 3% or less 18 EXT MIC supply voltage VVEMIC At 6.2kΩ load 1.7 V -20 dBV 1.7 10 0.03 -100 V dB % dBV -20 dBV 10 0.03 -100 dB % dBV
REC output system: ALC1 level=-17dBV mode 19 20 21 22 23 24 REC reference output level REC reference output distortion ALC1 level characteristics ALC1 distortion characteristics REC output noise voltage ALC1 maximum input level VOREC HDREC VOALC1 VDALC1 VNOR VMXALC ALC1 input, VIN=-40dBV ALC1 input, VIN=-40dBV, THD: from 2nd to 5th harmonic ALC1 input, VIN=-14dBV (reference+26dB) ALC1 input, VIN=-14dBV (reference+26dB), THD: from 2nd to 5th harmonic ALC1 no input, JIS-A Filter ALC1 input, ALC1 input level at which up to 5th order distortions of REC output are reduced to 3% or less -10 dBV -16.5 0.03 -10 0.3 -83 dBV % dBV % dBV
Continued on next page.
No.A1283-2/14
LA74322LP
Continued from preceding page.
No. Parameter Symbol Conditions min EVR output system: ALC2 level=-11dBV mode 25 26 27 28 29 EVR reference output level 1 (VOl=Max) EVR reference output distortion EVR reference output level 2 (VOl=Typ) EVR reference output level 3 (VOl=Min) EVR maximum input level VOEVR1 HDEVR VOEVR2 VOEVR3 VMXEVR Audio source pin input, VIN=-25dBV, EVR=Max Audio source pin input, VIN=-25dBV, EVR=Max, THD: from 2nd to 5th harmonic Audio source pin input, VIN=-25dBV, EVR=Typ (5Bit: 11011) Audio source pin input, VIN=-25dBV, EVR=Min, JIS-A Filter ALC2=Through MODE, audio source input level at which up to 5th order distortions of EVR output are reduced to 3% or less l H/P output system: Measured at HP load = 16Ω, ALC2=Through mode 30 31 32 33 H/P reference output level H/P reference output distortion H/P output noise voltage H/P maximum input level VOHP HDHP VNHP VMXHP Base band input, VIN=-11dBV, EVR=Max Base band input, VIN=-11dBV, THD: from 2nd to 5th harmonic No base band input, EVR=Max, JIS-A Filter Base band input, base band input level at which up to 5th order distortions of H/P output are reduced to 3% or less SPK output system: Measured at SPK load = 8Ω, ALC2 level=-11dBV mode 34 35 36 37 SPK reference output level SPK reference output distortion SPK output noise voltage SPK maximum output power VOSPK VDSPK VNSPK VMXSPK Audio source pin input, VIN=-30dBV, VOl=Max Audio source pin input, VIN=-30dBV, VOl=Max, THD: from 2nd to 5th harmonic No input at audio source pin, EVR=Max, JIS-A Filter Audio source pin input, SPK output power at which up to 5th order distortions of SPK output are reduced to 3% or less, ALC2=Through MODE 38 39 40 41 SPK ALC level 1 SPK ALC level 2 SPK ALC level 3 SPK ALC level 4 VOSPK1 VOSPK2 VOSPK3 VOSPK4 Audio source pin input, VIN=-10dBV, VOl=Max, LC2=-13dBV MODE Audio source pin input, VIN=-10dBV, VOl=Max, ALC2=-12dBV MODE Audio source pin input, VIN=-10dBV, VOl=Max, ALC2=-11dBV MODE Audio source pin input, VIN=-10dBV, VOl=Max, ALC2=-10.5dBV MODE Receiver SPK output system: Measured at SPK load = 32Ω 42 43 44 45 46 47 Receiver SPK reference output level 1 (VOl=Max) Receiver SPK reference output distortion Receiver SPK reference output level 2 (VOl=Typ) EVR reference output level 3 (VOl=Min) Receiver SPK output noise voltage Receiver SPK maximum output power Control system 48 49 50 Serial CLOCK frequency Serial input LOW level Serial input HIGH level FCLK SERLO SERHI I2C bus first mode 0 2.4 400 0.6 3.5 kHz V V VMXRSP VORSP3 VNRSP VORSP2 VDRSP Base band input, VIN=-22dBV, VOl=Max, THD: from 2nd to 5th harmonic Base band input, VIN=-22dBV, VOl=Typ (5Bit: 11011) Base band input, VIN=-22dBV, EVR=Min, JIS-A Filter Base band no input, EVR=Max, JIS-A Filter Base band input, SPK output power at which up to 5th order distortions of SPK output are reduced to 3% or less 110 mW VORSP1 Base band input, VIN=-22dBV, VOl=Max -4 0.9 -10 -80 -80 dBV % dBV dBV dBV 4.5 5.5 6.4 7 dBV dBV dBV dBV 1000 mW -4 0.9 -70 dBV % dBV -10 dBV -19 0.1 -100 dBV % dBV -3 dBV -17.3 0.003 -22.5 -96 dBV % dBV dBV Ratings typ max unit
No.A1283-3/14
LA74322LP
Electrical Characteristic: Serial Communication Condition Table
Address(0 1) No. Symbol D 8 0 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D 7 0 0 1 1 1 1 1 1 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D 5 0 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D 2 1 1 0 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D 1 1 1 0 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D 8 1 1 0 1 1 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 D 7 1 1 0 1 1 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 D 6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 Address(0 2) D 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 D 4 1 1 0 1 1 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 0 0 0 1 0 0 0 0 1 1 1 1 1 1 D 3 1 1 0 1 1 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 0 0 0 1 0 0 0 0 1 1 1 1 1 1 D 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 D 8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D 7 1 1 0 1 1 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 D 6 1 1 0 1 1 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 Address(0 3) D 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 D 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 D 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 D 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 D 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 D 8 0 0 1 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 D 7 0 0 1 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 D 6 0 0 1 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 Address(0 4) D 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 1 D 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 1 D 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 1 D 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 1 D 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 1
1 2 3 4 5 6 7 8 9
ICCA ICCAS ICCHP1 ICCHP2 ICCHPS ICCSP1 ICCSP2 ICCSPS VGIMIC
10 HDIMIC 11 VNIMIC 12 VMIMIC 13 VVIMIC 14 VGEMIC 15 HDEMIC 16 VNEMIC 17 VMEMIC 18 VVEMIC 19 20 VOREC HDREC
21 VOALC1 22 VDALC1 23 VNOR
24 VMXALC 25 VOEVR1 26 HDEVR
27 VOEVR2 28 VOEVR3 29 VMXEVR 30 31 32 33 34 35 36 VOHP HDHP VNHP VMXHP VOSPK VDSPK VNSPK
37 VMXSPK 38 VOSPK1 39 VOSPK2 40 VOSPK3 41 VOSPK4 42 VORSP1 43 VDRSP
44 VORSP2 45 VORSP3 46 VNRSP
47 VMXRSP
↑ It is SW of Lch SPK setting. Here always sets “1” = OFF.
No.A1283-4/14
Data byte (Underline is initial setting)
Address D6 D5 D4 D3 D2 LSB D1
MSB
D8
D7
MIC1 & 2 Power Save CTL MIC1 or 2 Input Select 1,0 OFF ALC1 DET discharge OFF ON OFF ON ALC2 DET discharge OFF -17dBV Lch ALC2 CTL Power Save & Through SW 1,0 ALC2 ON OFF ALC2 1,1 D4 0 1 D3 0 ON 1 OFF Lch SPK Power ON Through SW OFF ON OFF -10.5dBV ON ON -11dBV ON OFF -12dBV ON Through SW OFF ON *Note Please set OFF. ON OFF Rch SPK Power Rch ALC2 CTL Power Save & Through SW ON Lch Speaker Power Save CTL D2 0 1 ON OFF ALC2 LEVEL =-13/-12/-11/-10.5dBV CTL 1,0 OFF OFF -13dBV ON 1,1 D6,D5 0,0 0,1 OFF -19dBV ON OFF -21dBV ON Lch H/P ON OFF 1,1 D6,D5 0,0 0,1 1,0 1,1 D4 0 1 D3 0 1 D2 0 1 D1 Rch H/P
ALC1 & REC AMP Power Save CTL ALC1 LEVEL=-21/-19/-17dBV CTL
ALC1 DET Discharge CTL
ALC2 DET Discharge CTL
Lch H/P Power Save CTL
Rch H/P Power Save CTL 0 ON 1 OFF
D8,D7
0,0
0,1
(0 1) 00000001
MIC1
ON
OFF
MIC2
OFF
ON
Sound source & Base Band (B.B.) Input Select
Rch Speaker Power Save CTL D1 0 1
D8,D7
0,0
0,1
Serial Data Specification (I2C bus communication) [Slave Address: 1 1 1 0 1 0 0 0]
(0 2) 00000010
Lch Input SW
ON
ON
ON
OFF
Rch Input SW
ON
OFF
LA74322LP
B.B. input SW
OFF
OFF
VREF Charge CTL D16(10000) 0 ON OFF Rch EVR Power ON OFF EVR D16 Gain ATT 1 D6 0 D5 0 1 1 AMP D4
Lch EVR Power Save CTL
Rch EVR Power Save CTL D08(01000) 0 EVR D08 Gain ATT
EVR Setting (Sound source & Base Band) 5bit
(0 3) 00000011
D04(00100) 1 AMP D3 EVR D04 Gain 0 ATT 1 AMP D2
D02(00010) 0 EVR D2 Gain ATT 1 AMP D1
D01(00001) 0 EVR D1 Gain ATT 1 AMP
D8
0
1
D7
VREF charge SW
OFF
ON
Lch EVR Power
Receiver Speaker Power Save CTL Receiver EVR Power Save CTL
Receiver Input Select SW
EVR Setting (Receiver) 5bit D16(10000) D08(01000) D5 OFF EVR D16 Gain 0 ATT 1 AMP D4 EVR D08 Gain 0 ATT 1 AMP D3 EVR D04 Gain D04(00100) 0 ATT 1 AMP D2 EVR D2 Gain D02(00010) 0 ATT 1 AMP D1 EVR D1 Gain D01(00001) 0 ATT 1 AMP
(0 4) 00000100 0 ON OFF Receiver EVR ON 1 D6 0
D8
0
1
D7
1
No.A1283-5/14
Receiver Speaker
ON
OFF
Input Select SW
LA74322LP
Package Dimensions
unit : mm (typ) 3302A
TOP VIEW 5.0 SIDE VIEW BOTTOM VIEW 0.35
5.0
0.4
40 21
0.85 MAX
SIDE VIEW
0.0 NOM
0.2
(0.7)
SANYO : VQLP40(5.0X5.0)
Pin Assignment
SPK(R)+OUT SPK(R)-OUT 22 SPK(L) GND SPK(R)GND
(0.7)
0.35
VCCSP(R)
VCCSP(L)
30
29
28
27
NC
26
25
24
23
21
SPK(R)IN
NC
NC
EVR(L)OUT HP(L)IN VREFSP STANDBY L H/P(L)OUT H/P GND H/P(R)OUT Receiver & HP VCC Receiver(+)OUT Receiver GND
31 32 33 34 35 36 37 38 39 40
20 19 18 17
EVR(R)OUT HP(R)IN Rch(Audio source)IN Base Band IN Lch(Audio source)IN ALC2 DET Base Band OUT ALC1 DET ALC1 IN MIC2 VCC
LA74322LP
16 15 14 13 12 11
1 Receiver(-)OUT
2 AVCC
3 CLOCK
4 DATA
5 AGND
6 MIC1 IN
7 MIC2 IN
8 MIC OUT
9 MIC1 VCC
10 VREF
No.A1283-6/14
LA74322LP
LA74322LP EVR Characteristic 0 -10 -20 Attenuation [dB] -30 -40 -50 -60 -70 -80 0
Mute
5 10 15 20 25 30 35 5bit data (decimal notation)
Table of Input/Output Forms
PIN 1 Pin Name Receiver (-) output DC voltage 1.65V =-10dBV (@ EVR=Max. audio source input =-30dBV) AC voltage Reference output level pin Description of functions Receiver reverse phase output Equivalent circuit diagram in pin
VCCHP
20.5kΩ 1
5k Ω
2 3
VCC A CLOCK
3.0V
Power pin for analog signal part CLOCK input pin
1kΩ 3
4
DATA
DATA input pin
1kΩ 4 ACK Tr
5
A GND
0V
GND pin for analog signal part
Continued on next page.
No.A1283-7/14
LA74322LP
Continued from preceding page.
PIN 6 Pin Name MIC1 IN DC voltage 1.5V =-50dBV Maximum input level =-20dBV AC voltage Reference input level Description of functions MIC1 input pin Equivalent circuit diagram in pin
VCCA
500Ω 6 70kΩ
VREF
7 MIC2 IN 1.5V Reference input level =-50dBV Maximum input level =-20dBV MIC2 input pin
VCCA
500Ω 7 70kΩ
VREF
8 MIC OUT 1.5V Reference output level =-40dBV Maximum output level =-10dBV MIC output pin
VCCA
500Ω 8
7.5kΩ
3.2kΩ VREF
9 MIC1 VCC 2.3V MIC1 power pin
VCCA
2.2kΩ 9
23kΩ
10
VREF
2.3V
MIC VCC and VREF ripple rejection pin
VCCA
400Ω 10 500Ω
200kΩ Continued on next page.
No.A1283-8/14
LA74322LP
Continued from preceding page.
PIN 11 Pin Name MIC2 VCC DC voltage 2.3V AC voltage Description of functions MIC2 power pin Equivalent circuit diagram in pin
VCCA
2.2kΩ 11
23kΩ
12
ALC1 IN
Reference output level =-40dBV Maximum output level =-10dBV
ALC1 input pin
VCCA
1k Ω 12 50kΩ
VREF
13 ALC1 DET ALC1 detection pin
VCCA
1kΩ 13
500Ω
14
Base_Band OUT
1.5V
Reference output level =-16dBV Maximum input level =-3dBV
Base band output pin
VCCA
1kΩ 14
7.5kΩ
6k Ω VREF
15 ALC2 DET ALC2 detection pin
VCCA
1k Ω 15
500Ω
Continued on next page.
No.A1283-9/14
LA74322LP
Continued from preceding page.
PIN 16 Pin Name Lch audio source IN DC voltage 1.5V =-15dBV Maximum input level =-3dBV AC voltage Reference output level Description of functions Lch audio input pin Equivalent circuit diagram in pin
VCCA
25kΩ 16 25kΩ
VREF
17 Base Band IN 1.5V Reference output level =-16dBV Maximum output level =-10dBV Base band input pin
VCCA
500Ω 17 50kΩ
VREF
18 Rch audio source IN 1.5V Reference output level =-15dBV Maximum input level =-3dBV Rch audio source input pin
VCCA
25kΩ 18 25kΩ
VREF
19 Rch HP IN 1.5V Reference output level =-16dBV (@Base band input) =-21dBV (@audio source input) Maximum input level =-10dBV (@Base band input) =-9dBV (@audio source input) Rch HP input pin
VCCHP
1k Ω 19 50kΩ
VREF
20 Rch EVR OUT 1.5V Reference output level =-16dBV (@Base band input) =-21dBV (@audio source input) Maximum input level =-10dBV (@Base band input) =-9dBV (@audio source input) Rch EVR output pin
VCCA
500Ω 20
Continued on next page.
No.A1283-10/14
LA74322LP
Continued from preceding page.
PIN 21 Pin Name Rch SPK IN DC voltage 1.65V =-16dBV (@Base band input) =-21dBV (@audio source input) Maximum input level =-10dBV (@Base band input) =-9dBV (@audio source input) AC voltage Reference output level Description of functions Rch Speaker input pin Equivalent circuit diagram in pin
VCCSP(R)
5k Ω 21 25kΩ
22
22
Rch SPK(-)OUT
1.65V
Reference output level =-1dBV (@audio source input =-15dBV)
Rch speaker reverse phase output pin
VCCSP(R)
25kΩ 22 5k Ω 21
23 24 GND SPK(R) Rch SPK(+)OUT 0V 1.65V Reference output level =-1dBV (@audio source input =-15dBV) Rch speaker GND pin Rch speaker normal phase output pin
VCCSP(R)
20.5kΩ 24 20kΩ 22
25 26 27 28 29 30 31 VCC SP(R) VCC SP(L) NC GND SPK(L) NC NC Lch EVR OUT 1.5V Reference output level =-16dBV (@Base band input) =-21dBV (@audio source input) Maximum input level =-10dBV (@Base band input) =-9dBV (@audio source input) 0V 3.6V 3.6V Rch speaker power pin Lch speaker power pin NC pin Lch speaker GND NC pin NC pin Lch EVR output pin
VCCA
500Ω 31
Continued on next page.
No.A1283-11/14
LA74322LP
Continued from preceding page.
PIN 32 Pin Name Lch HP IN DC voltage 1.5V =-16dBV (@Base band input) =-21dBV (@audio source input) Maximum input level =-10dBV (@Base band input) =-9dBV (@audio source input) AC voltage Reference output level Description of functions Lch HP input pin Equivalent circuit diagram in pin
VCCHP
1k Ω 32 50kΩ
VREF
33 VREFSP 1.65V SPK VREF and ripple rejection pin
VCCSP(L)
400Ω 33
250kΩ 2kΩ 215kΩ
34
STANDBY L
STANDBY control pin
38kΩ 34 23kΩ
35
Lch HP OUT
1.5V
Reference output level =-23.5dBV Maximum output level =-3dBV
Lch HP output pin
VCCHP
74Ω 35
2.6kΩ
1.8kΩ VREF
36 37 GND HP Rch HP OUT 0V 1.5V Reference output level =-23.5dBV Maximum output level =-3dBV HP GND pin Rch HP output pin
VCCHP
74Ω 37
2.6kΩ
1.8kΩ
Continued on next page.
No.A1283-12/14
LA74322LP
Continued from preceding page.
PIN 38 39 Pin Name VCCHP Receiver (+) OUT DC voltage 3.0V 1.5V Reference output level =-10dBV (@ EVR=Max audio source input =-30dBV) AC voltage Description of functions HP & receiver speaker power pin Receiver speaker normal phase output pin Equivalent circuit diagram in pin
VCCHP
20.5kΩ 39 20kΩ 1
40 Receiver GND 0V Receiver GND
Internal Equivalent Circuit Diagram
No.A1283-13/14
LA74322LP
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the use of the technical information and products mentioned above.
This catalog provides information as of July, 2008. Specifications and information herein are subject to change without notice.
PS No.A1283-14/14
