LA75694M

Ordering number : ENA0251 Monolithic Linear IC LA75694M Overview For Use in TV/VTR Applications IF Signal Processing (VIF/SIF for Hi-Fi) The LA75694M is a PAL/NTSC split Support VIF/SIF for Hi-Fi signal-processing IC that makes the minimum number of adjustments possible. The system is designed so that VCO adjustment makes AFT adjustment unnecessary, thus simplifying the adjustment steps in endproduct manufacturing. PLL detection is adopted in the FM detector, allowing the LA75694M to support multichannel detection for the audio signal. In addition, it also incorporates a buzz canceller that suppresses Nyquist buzz for improved audio quality. Functions • VIF Block: VIF Amplifier, Buzz Canceller, BNC, PLL Detector, IF AGC, RF AGC, AFT, Equalizer Amplifier • 1st SIF Block: 1st SIF Amplifier, 1st SIF Detector, AGC • SIF Block: HPF, MIX, 500kOSC Specifications Maximum Ratings at Ta = 25°C Parameter Maximum supply voltage Circuit voltage Circuit current Symbol VCC max V13, V17 I6 I10 Allowable power dissipation Pd max Ta ≤ 50°C, Independent IC Mounted on a board. ∗ Operating temperature Storage temperature Topr Tstg Conditions Ratings 6 VCC -3 -10 420 720 -20 to +70 -55 to +150 Unit V V mA mA mW mW °C °C ∗ When mounted on a 65×72×1.6mm3 paper phenol board. Recommended Operating Conditions at Ta = 25°C Parameter Recommended supply voltage Operating voltage Symbol VCC VCC op Conditions Ratings 5 4.5 to 5.5 Unit V V Any and all SANYO Semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO Semiconductor representative nearest you before using any SANYO Semiconductor products described or contained herein in such applications. SANYO Semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor products described or contained herein. 92706 / 42406 MS OT B8-6166 No.A0251-1/10 LA75694M Electrical Characteristics at Ta = 25°C, VCC = 5V, fp = 45.75MHz VIF Block Ratings Parameter Circuit current Maximum RF AGC voltage Minimum RF AGC voltage Input sensitivity AGC range Maximum allowable input No-signal video output voltage Sync. signal tip voltage Video output level Black noise threshold voltage Black noise clamp voltage Video S/N C-S best Frequency characteristics Differential gain Differential phase No-signal AFT voltage Maximum AFT voltage Minimum AFT voltage AFT detection sensitivity VIF input resistance VIF input capacitance APC pull-in range (U) APC pull-in range (L) AFT tolerance frequency 1 VCO1 maximum variable range (U) VCO1 maximum variable range (L) VCO control sensitivity Synchronization ratio Symbol I5 V14H V14L Vi GR Vi max V6 V6 tip VO VBTH VBCL S/N IC-S fc DG DP V13 V13H V13L Sf Ri Ci fpu fpl ∆Fa1 dfu dfl β VS 1.2 25.0 -200 1.0 45.75MHz 45.75MHz 0.7 2.0 4.0 0 14 6MHz S1 = OFF 27 53 90 2.1 0.7 0.95 0.5 1.2 48 38 -3 Conditions min 38 VCC-0.5 typ 45 VCC 0 33 58 96 2.4 1.0 1.1 0.8 1.5 52 43 -1.5 3 3 2.5 4.4 0.18 21 1.5 3 1.5 -2.0 0 1.5 -2.0 3.2 28.5 -1.4 5.0 31.5 -1.4 200 6.5 5 3.0 5.0 1.0 28 2.7 1.3 1.25 1.1 1.8 0.5 39 max 51.8 Unit mA V V dBµV dB dBµV V V Vp-p V V dB dB dB % °C V V V mV/kHz kΩ pF MHz MHz kHz MHz MHz kHz/mV % 1st SIF Block Ratings Parameter Conversion gain 4.5MHz output level 1st SIF maximum input 1st SIF input resistance 1st SIF input capacitance Symbol VG SO Si max Ri (SIF) Ci (SIF) 41.25MHz 41.25MHz Conditions min 27 53 8 typ 33 115 16 2 3 max 39 180 Unit dB mVrms mVrms kΩ pF SIF Converter Ratings Parameter Conversion gain Maximum output level Carrier suppression ratio Oscillator level OSC leakage Oscillator stop current Symbol VG (SIF) V max VGR (4.5) VOSC OSC leak I4 Conditions min 8 103 15 35 14 typ 11 109 21 70 25 300 max 14 115 Unit dB dBµV dB mVp-p dB µA No.A0251-2/10 LA75694M Package Dimensions unit : mm 3112B 12.5 24 13 5.4 7.6 1 1.0 (0.75) 0.35 12 0.15 SANYO : MFP24S(300mil) Pin Assignment 0.1 1.7max (1.5) 0.63 No.A0251-3/10 LA75694M Block Diagram and AC Characteristics Test Circuit Input Impedance Test Circuit No.A0251-4/10 LA75694M Test Conditions V1. Circuit current [I5] (1) Internal AGC (2) Input a 45.75MHz 10mVrms continuous wave to the VIF input pin. (3) RF AGC Vr MAX (4) Connect an ammeter to the VCC and measure the incoming current. V2.V3. Maximum RF AGC voltage, Minimum RF AGC voltage [V14H, V14L] (1) Internal AGC (2) Input a 45.75MHz 10mVrms continuous wave to the VIF input pin. (3) Adjust the RF AGC Vr (resistor value max.) and measure the maximum RF AGC voltage. ····· F (4) Adjust the RF AGC Vr (resistor value min.) and measure the minimum RF AGC voltage. ····· F V4. Input sensitivity [Vi] (1) Internal AGC (2) fp = 45.75MHz 400Hz 40% AM (VIF input) (3) Turn off the S1 and put 100kΩ through. (4) VIF input level at which the 400Hz detection output level at test point A becomes 0.35Vp-p. V5. AGC range [GR] (1) Apply the VCC voltage to the external AGC, IF AGC (pin 17). (2) In the same manner as for the V4 (input sensitivity), measure the VIF input level at which the detection output level becomes 0.35Vp-p. ····· Vil (3) GR = 20log Vil dB Vi V6. Maximum allowable input [Vi max] (1) Internal AGC (2) fp = 45.75MHz 15kHz 78% AM (VIF input) (3) VIF input level at which the detection output level at test point A is video output (VO) ±1dB. V7. No-signal video output voltage [V6] (1) Apply the VCC voltage to the external AGC, IF AGC (pin 17). (2) Measure the DC voltage of VIDEO output (A). V8. Sync. signal tip voltage [V6tip] (1) Internal AGC (2) Input a 45.75MHz 10mVrms continuous wave to the VIF input pin. (3) Measure the DC voltage of VIDEO output (A). V9. Video output level [VO] (1) Internal AGC (2) fp = 45.75MHz 15kHz 78% AM Vi = 10mVrms (VIF input) (3) Measure the peak value of the detection output level at test point A. (Vp-p) No.A0251-5/10 LA75694M V10.V11. Black noise threshold level and clamp voltage [VBTH, VBCL] (1) Apply DC voltage to the external AGC, IF AGC (pin 17) and adjust the voltage. (2) fp = 45.75MHz 400Hz 40% AM 10mVrms (VIF input) (3) Adjust the IF AGC (pin 17) voltage to operate the noise canceller. Measure the VBTH, VBCL at test point A. V12. Video S/N [S/N] (1) Internal AGC (2) fp = 45.75MHz CW = 10mVrms (VIF input) (3) Measure the noise voltage at test point A in RMS volts through a 10kHz to 4MHz band-pass filter. ····· Noise voltage (N) 1.12Vp-p Video portion (Vp-p) (4) S/N = 20log Noise voltage (Vrms) = 20log Noise voltage (Vrms) (dB) V13. C/S beat [IC-S] (1) Apply DC voltage to the external AGC IF AGC (pin 17) and adjust the voltage. (2) fp = 45.75MHz CW; 10mVrms fc = 42.17MHz CW; 10mVrms – 10dB fs = 41.25MHz CW; 10mVrms – 10dB (3) Adjust the IF AGC (pin 17) voltage so that the output level at test point A becomes 0.72Vp-p. (4) Measure the difference between the levels for 3.58MHz and 0.92MHz components at test point A. No.A0251-6/10 LA75694M V14. Frequency characteristics [fc] (1) Apply DC voltage to the external AGC IF AGC (pin 17) and adjust the voltage. (2) SG1 : 45.75MHz continuous wave 10mVrms SG2 : 45.65MHz to 39.75MHz continuous wave 2mVrms Add the SG1 and SG2 signals using a T pat and adjust each SG signal level so that the above-mentioned levels are reached and input the added signals to the VIF IN. (3) First set the SG2 frequency to 45.65MHz, and then adjust the IF AGC voltage (V17) so that the output level at test point A becomes 0.5Vp-p. ····· V1 (4) Set the SG2 frequency to 39.75MHz and measure the output level. ····· V2 (5) Calculate as follows : fc = 20log V2 (dB) V1 V15.V16. Differential gain, differential phase [DG, DP] (1) Internal AGC (2) fp = 45.75MHz APL50% 87.5% modulation video signal Vi = 10mVrms (3) Measure the DG and DP at test point A. V17. No-signal AFT voltage [V13] (1) Internal AGC (2) Measure the DC voltage at the AFT output (B). V18.V19.V20. Maximum, minimum AFT output voltage, AFT detection sensitivity [V13H, V13L, Sf] (1) Internal AGC (2) fp = 45.75MHz ±1.5MHz Sweep = 10mVrms (VIF input) (3) Maximum voltage : V13H, minimum voltage : V13L. (4) Measure the frequency deviation at which the voltage at test point B changes from V1 to V2. ····· ∆f V21.V22. VIF input resistance, Input capacitance [Ri, Ci] (1) Referring to the Input Impedance Test Circuit, measure Ri and Ci with an impedance analyzer. No.A0251-7/10 LA75694M V23.V24. APC pull-in range [fpu, fpl] (1) Internal AGC (2) fp = 39MHz to 51MHz continuous wave; 10mVrms (3) Adjust the SG signal frequency to be higher than fp = 45.75MHz to bring the PLL to unlocked state. Note : The PLL is assumed to be in unlocked state when a beat signal appears at test point A. (4) When the SG signal frequency is lowered, the PLL is brought to locked state again. ····· f1 (5) Lower the SG signal frequency to bring the PLL to unlock state. (6) When the SG signal frequency is raised, the PLL is brought to locked state again. ····· f2 (7) Calculate as follows : fpu = f1 – 45.75MHz fpl = f2 – 45.75MHz V25. AFT tolerance frequency 1 [∆Fa1] (1) Internal AGC (2) SG1 : 43.75MHz to 47.75MHz variable continuous wave 10mVrmns (3) Adjust the SG1 signal frequency so that the AFT output DC voltage (test point B) becomes 2.5V; that SG1 signal frequency is f1. (4) External AGC (Adjust the V17.) (5)Apply 5V to the IF AGC (pin 17) and then pick up the VCO oscillation frequency from GND, etc.; and measure the frequency ····· f2 (6) Calculate as follows : AFT tolerance frequency : ∆Fa1 = f2 – f1 (kHz) V26.V27. VCO maximum variable range (U, L) [dfu, dfl] (1) Apply the VCC voltage to the external AGC, IF AGC (pin 17). (2) Pick up the VCO oscillation frequency from the VIDEO output (A), GND, etc. and adjust the VCO coil so that the frequency becomes 45.75MHz. (3) fl is taken as the frequency when 1V is applied to the APC pin (pin 9). In the same manner, fu is taken as the frequency when 5V is applied to the APC pin (pin 9). dfu = fl–45.75MHz dfl = fl–45.75MHz V28. VCO control sensitivity [β] (1) Apply the VCC voltage to the external AGC, IF AGC (pin 17). (2) Pick up the VCO oscillation frequency from the VIDEO output (A), GND, etc. and adjust the VCO coil so that the frequency becomes 45.75MHz. (4) f1 is taken as the frequency when 3.0V is applied to the APC pin (pin 9). In the same manner, f2 is taken as the frequency when 3.4V is applied to the APC pin (pin 9). β= f2–f1 400 (kHz/mV) V29. Synchronization ratio [VS] (1) Internal AGC (2) fp = 45.75MHz 87.5% 10STEP B/W Vi = 10mVrms (3) Measure the output amplitude at the measuring point A. ····· Vvideo (4) Measure the pedestal voltage (DC) at the measuring point A. ····· Vped VS = (Vped–V6tip) / Vvideo×100 (%) No.A0251-8/10 LA75694M F1. 1st SIF conversion gain [VG] (1) Internal AGC (2) fp = 45.75MHz CW; 10mV (VIF input) fs = 41.25MHz CW; 500µV (1st SIF input) ····· V1 (3) Detection output level at test point C (Vrms) ····· V2 (4.5MHz) (4) VG = 20log V2 dB V1 F2. 4.5MHz output level [SO] (1) Internal AGC (2) fp = 45.75MHz CW; 10mV (VIF input) fs = 41.25MHz CW; 10mV (1st SIF input) ····· V1 (3) Detection output level at test point C (4.5MHz) ····· SO (mVrms) F3. 1st SIF maximum input [Si max] (1) Internal AGC (2) fp = 45.75MHz CW; 10mV (VIF input) fs = 41.25MHz CW; variable (1st SIF input) (3) Input level at which the detection output at test point C (4.5MHz) becomes SO ±2dB. ····· Si max F4.F5. 1st SIF input resistance, Input capacitance [Ri (SIF), Ci (SIF)] (1) Using an input analyzer, measure Ri and Ci in the input impedance measuring circuit. C1. Converter conversion gain [VG (SIF)] (1) Internal AGC (2) fp = 45.75MHz CW; 10mV (VIF input) fs = 41.25MHz CW; 316µV (1st SIF input) (3) Measure the 6MHz component at test point E (MIX output) ····· V1 (4) Measure the 4.5MHz component at test point F (NICAM output). ····· V2 (5) VG(SIF) = 20log V1 dB V2 C2. SIF converter maximum output level [V max] (1) Internal AGC (2) fp = 45.75MHz CW; 10mV (VIF input) fs = 41.25MHz CW; 10mV (1st SIF input) (3) Measure the 6MHz component at test point E (MIX output). ····· V max (dBµV) C3. Carrier suppression ratio [VGR (4.5)] (1) Internal AGC (2) fp = 45.75MHz CW; 10mV (VIF input) fs = 41.25MHz CW; 316µV (1st SIF input) (3) Measure the 6MHz component at test point E (MIX output). ····· V6 (dBµV) (4) Measure the 4.5MHz component at test point E (MIX output). ····· V4.5 (dBµV) (5) Perform the following calculation. Carrier suppression ratio VGR (4.5) (dB) = V6 – V4.5 C5. OSC leakage [OSC leak] (1) Internal AGC (2) fp = 45.75MHz CW; 10mV (VIF input) fs = 41.25MHz CW; 316µV (1st SIF input) (3) Measure the 6MHz component at test point E (MIX output). ····· V6 (dBµV) (4) Measure the 500kHz component at test point E (MIX output). ····· V0.5 (dBµV) (5) Perform the following calculation. Carrier suppression ratio OSC leak (dB) = V6 – V0.5 No.A0251-9/10 LA75694M Note 1) Unless otherwise specified for VIF test, apply the VCC voltage to the IF AGC and adjust the VCO coil so that oscillation occurs at 45.75MHz. 2) Unless otherwise specified, the SW1 must be ON. Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. 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Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO Semiconductor believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of April, 2006. Specifications and information herein are subject to change without notice. PS No.A0251-10/10