LA9703W_06

Ordering number : EN7413 Monolithic Linear IC LA9703W Overview Front End Processor for DVD Player The LA9703W is an RF signal-processing and servo error signal generation IC for DVD and CD playback. A DVD player can be implemented by combining this IC with a DVD DSP product that includes a digital servo DSP. Functions • Generation of RF signal (with built-in RFAGC circuit). • Generation of RF - peak detection. • Generation of RF - bottom detection (time constant changeover). • RF equalizer incorporated (fO, boost variable). • FE Amplifier (Balance Adjustment VCA Built in). • 3-beam Tracking Error Amplifier (Balance Adjustment VCA Built in). • Reflect Amplifier. • DPD Circuit. • Push-pull TE amplifier. • Wobble detection BPF built in. • APC Circuit (two channels). Specifications Maximum Ratings at Ta = 25°C Parameter Maximum supply voltage Allowable power dissipation Operating temperature Storage temperature Symbol VCC max Pd max Topr Tstg Ta≤70°C(Mounted on a board *) Conditions Ratings 6.0 500 -20 to +70 -40 to +150 Unit V mW °C °C * Size: 114.3×76.1×1.6 mm Material: Glass epoxy Operating Conditions at Ta = 25°C Parameter Recommended supply voltage Operating supply voltage Symbol VCC VCC op Conditions Ratings 5.0 4.65 to 5.35 Unit V V Any and all SANYO Semiconductor products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO Semiconductor representative nearest you before using any SANYO Semiconductor products described or contained herein in such applications. SANYO Semiconductor assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor products described or contained herein. 92706 / O2605 MS OT B8-6304 No.7413-1/16 LA9703W Electrical Characteristics at Ta = 25°C, VCC (Pins 2, 29, 63) = 5.0V, GND = (Pins 8, 19, 56) = 0V Parameter Current drain Reference voltage 1 Reference voltage 2 VIH min VIL max IIH IIL VIDAH max VIDAL min Customer OP1 Customizer OP2 RF-EQ Symbol ICC PREF SREF VIH VIL IIH IIL VIDH VIDL CAOP1 CAOP2 RFEQ No signal Pin 58, Load current ±2mA Pin 48 = 5V, Pin 51, Load current ±2mA Pin 20 to 28, Pin 30 to 31 Pin 20 to 28, Pin 30 to 31 Pin 20 to 28, Pin 30 to 31 Pin 20 to 28, Pin 30 to 31 Pin 32 to 36 Pin 32 to 36 Pin 1 = PREF+450mV, Pin 62 Pin 1 = PREF-300mV, Pin 62 Pins 61, 59 13MHz input, Pin 23 = 5V, Pin 25 = 0V, Pin 26 = 5V, Pin 34 = SREF+1V Output gain ratio of pins 55 and 54 at input of SREF+1V to pin 33 and SREF-1V to pin 33 RF GAIN 1 (MAX GAIN 1) RF GAIN 2 (MIN GAIN) RF GAIN 3 (AGOF GAIN) RF GAIN 4 (MAX GAIN 2) PH PH RFG4 RFG3 RFG2 RFG1 Pins 61, 59 input, Pin 23 = 0V, Pin 25 = 5V Pin 33 = Pin 34 = SREF Pins 55, 54 Pins 61, 59 input, Pin 23 = 0V, Pin 25 = 0V Pin 33 = Pin 34 = SREF Pins 55, 54 Pins 61, 59 input, Pin 23 = 0V, Pin 25 = 0V Pin 33 = Pin 34 = SREF Pins 55, 54 Pins 61, 59 input, Pin 23 = 0V, Pin 25 = 0V Pin 33 = Pin 34 = SREF Pins 55, 54 Pin 61 = 130mVp-p, Pin 59 = PREF, Pin 23 = 0V, Pin 25 = 0V, Pin 33 = Pin 34 = SREF, Pin 24 = 0V Pin 50 BH BH Pin 61 = 130mVp-p, Pin 59 = PREF, Pin 23 = 0V, Pin 25 = 0V, Pin 33 = Pin 34 = SREF, Pin 31 = 5V Pin 46 RREC1 RREC2 RREC3 RRECOST FEGAIN1 FEGAIN2 FEGAIN3 FEOST FEBAL1 FEBAL2 TEGAIN1 TEGAIN2 TEGAIN3 TEOST RREC1 RREC2 RREC3 ROST FEG1 FEG2 FEG3 FOST FBAL1 FBAL2 TEG1 TEG2 TEG3 TOST Pins A6, A7 input, Pin 25 = 0V, Pin 32 = SREF-0.75V Pin 38 Pins A6, A7 input, Pin 25 = 0V, Pin 32 = SREF+0.75V Pin 38 Pins A6, A7 input, Pin 25 = 5V, Pin 32 = SREF-0.75V Pin 38 A6 = A7 = PREF, Pin 25 = 0V, Pin 32 = SREF Pin 38 Pins A6, A7 input, Pin 25 = 0V, Pin 32 = SREF-0.75V Pin 35 = SREF, Pin 39 Pins A6, A7 input, Pin 25 = 0V, Pin 32 = SREF+0.75V Pin 35 = SREF, Pin 39 Pins A6, A7 input, Pin 25 = 5V, Pin 32 = SREF-0.75V Pin 35 = SREF, Pin 39 A6 = A7 = PREF, Pin 25 = 0V, Pin 32 = SREF Pin 35 = SREF, Pin 39 Pins A6, A7 input, Pin 25 = 0V, Pin 32 = SREF Pin 35 = SREF-0.75V, Pin 39∆GAIN Pins A6, A7 input, Pin 25 = 0V, Pin 32 = SREF Pin 35 = SREF+0.75V, Pin 39∆GAIN A10, A11 pin input, Pin 25 = 0V, Pin 32 = SREF-0.75V, Pin 36 = SREF, Pin 40 A10, A11 pin input, Pin 25 = 0V, Pin 32 = SREF+0.75V, Pin 36 = SREF, Pin 40 A10, A11 pin input, Pin 25 = 5V, Pin 32 = SREF-0.75V, Pin 36 = SREF, Pin 40 A10 = Pin 11 = PREF, Pin 25 = 0V, Pin 32 = SREF Pin 36 = SREF, Pin 40 Continued on next page. SREF-0.3 SREF SREF+0.3 V 25.8 29.8 33.8 dB 32.6 35.6 38.5 dB 12.2 15.2 18.2 dB -11.2 -8.2 -5.2 dB 5.2 8.2 11.2 dB SREF-0.3 SREF SREF+0.3 V 15.9 19.9 23.9 dB 22.5 25.5 28.5 dB 2.2 5.2 8.2 dB SREF-0.3 SREF SREF+0.3 V 7.2 11.2 15.2 dB 12.5 17.5 22.5 dB -5.7 -2.7 1.7 dB SREF-0.23 SREF-0.53 SREF-0.83 V SREF+0.5 SREF+0.75 SREF+0.9 V 17.4 24.4 dB 3.9 7.9 11.9 dB 3.4 6 dB 30 37 dB SREF-1 PREF+0.3 PREF-0.45 6 PREF+0.45 PREF-0.3 9 PREF+0.6 PREF-0.25 12 -10 -10 Conditions min 31 2.3 2.3 2.3 0.98 +10 +10 SREF+1 Ratings typ 40.5 2.5 2.5 max 53 2.7 2.7 mA V V V V µA µA V V V V dB Unit No.7413-2/16 LA9703W Continued from preceding page. Parameter TEBAL1 TEBAL2 DPD phase difference voltage difference 1 Symbol TBAL1 TBAL2 PD1 Conditions min A10, A11 pin input, Pin 25 = 0V, Pin 32 = SREF Pin 36 = SREF-0.75V, Pin 40∆GAIN A10, A11 pin input, Pin 25 = 0V, Pin 32 = SREF Pin 36 = SREF+0.75V, Pin 40∆GAIN Differential voltage at pin 39 between inputs of Pin A1=pin A3=pin A4=pin A5=5MHz phase 0 degree, pin A2=5MHz phase 36 degrees and inputs of pin A1=pin A3=pin A4=pin A5=5MHz phase 0 degree, pin A2=5MHz phase -36 degree, RL=6.8kΩ DPD phase difference voltage difference 2 PD2 Differential voltage at pin 39 between inputs of Pin A1 = pin A2 = pin A4 = pin A5 = 5MHz phase 0 degree, pin A3 = 5MHz phase 36 degrees and inputs of pin A1 = pin A2 = pin A4 = pin A5 = 5MHz phase 0 degree, pin A3 = 5MHz phase -36 degree, RL = 6.8kΩ DPD phase difference voltage difference 3 PD3 Differential voltage at pin 39 between inputs of Pin A1 = pin A2 = pin A3 = pin A5 = 5MHz phase 0 degree, pin A4 = 5MHz phase 36 degrees and inputs of pin A1 = pin A2 = pin A3 = pin A5 = 5MHz phase 0 degree, pin A4 = 5MHz phase -36 degree, RL = 6.8kΩ DPD phase difference voltage difference 4 PD4 Differential voltage at pin 39 between inputs of Pin A1 = pin A2 = pin A3 = pin A4 = 5MHz phase 0 degree, pin A5 = 5MHz phase 36 degrees and inputs of pin A1 = pin A2 = pin A3 = pin A4 = 5MHz phase 0 degree, pin A5 = 5MHz phase -36 degree, RL = 6.8kΩ DPD offset APC1 reference voltage APC1 off APC2 reference voltage APC3 reference voltage APC2 off BPF1 BPF2 BPF3 LDD2 BPF1 BPF2 BPF3 Pin 22 = 0V, Pin 17 Pin A8 = Pin A9 = 190kHz, Pin 32 = SREF-0.75V Pin 41 Pin A8 = Pin A9 = 140kHz, Pin 32 = SREF-0.75V Pin 41 Pin A8 = Pin A9 = 240kHz, Pin 32 = SREF-0.75V Pin 41 11 17 dB 13.5 19.5 dB 4.5 13.5 5 19 24.5 V dB LDS3 Pin 22 = 5V, Pin 17 150 180 200 mV LDD1 LDS2 Pin 21 = 0V, Pin 15 Pin 20 = 5V, Pin 21 = 5V, Pin 15 4.5 3.2 5 3.5 3.8 V mV DPDOF LDS1 Pin A1 = A2 = A3 = A4 = A5 = 5MHz RL = 6.8kΩ Pin 20 = 0V, Pin 21 = 5V, Pin 15 SREF-0.3 150 SREF 180 SREF+0.3 200 V mV -0.66 -0.51 -0.39 V 0.39 0.51 0.66 V -0.66 -0.51 -0.39 V 0.39 0.51 0.66 V -11.3 -8.3 -5.3 dB 5.3 Ratings typ 8.3 max 11.3 dB Unit No.7413-3/16 LA9703W Package Dimensions unit : mm 3190A No.7413-4/16 LA9703W Operational Descriptions (1) Customer amplifier This IC includes a built-in high-band operational amplifier. Pin 1 is the noninverting input and pin 64 is the inverting input. Pin 62 is the output. If this circuit is not used, short pins 62 and 64, and connect pin 1 to pin 58. (2) RF amplifier The RF signal input differentially to pins 59 and 61 is passed through a VCA used for AGC and an equalizer and output as a differential signal from pins 54 and 55. The peak level and DC level of the differential signal output from pins 54 and 55 are detected. The AGC VCA is controlled by the detected peak signal to form an AGC loop. The time constant used for peak detection can be set with the value of the capacitor connected to pin 50. The AGC circuit can be set to a fixed gain by setting pin 23 to the high level. Also note that a DC servo is formed by adding the detected DC value to the AGC VCA front end. The DC servo band can be set with the value of the capacitor connected to pin 52. Setting pin 25 to the high level increases the gain of the input stage amplifier for pins 59 and 61 by a factor of five. (3) RF equalizer The equalizer is switched by pin 26 between DVD mode (when pin 26 is high) and CD mode (when pin 26 is low). The equalizer band is set by the value of the resistor connected between pin 57 and ground. The equalizer fO frequency can be changed by changing the pin 34 DC voltage. The amount of boost provided by the equalizer can be changed by changing the pin 33 DC voltage. (4) Peak hold/bottom hold The peak hold and bottom hold envelope waveforms for the differential signal output from pins 54 and 55 is output from pins 47 and 46. When pin 24 is at the high level, the peak envelope detection time constant can be set with the value of the resistor connected between pin 49 and ground. The bottom hold band can be roughly doubled by setting pin 31 to the low level. (5) Reflection amplifier The current signal input to pins 9 and 10 is converted to a voltage and summed using a summation amplifier. The pit component is removed from the input signal with a low-pass filter. The summed signal is passed through the VCA that adjusts the servo gain and is output from pin 38. The VCA that adjusts the servo gain is controlled by the DC voltage applied to pin 32. The gain is increased by another factor of 5 when pin 25 is at the high level. (6) FE amplifier The current signal input to pins 9 and 10 is converted to a voltage and after passing through a balance adjustment VCA, the difference is taken. That signal is then passed through a servo gain adjustment VCA and output from pin 39. The gain of the balance adjustment VCA can be adjusted by changing the DC voltage applied to pin 32. The gain is increased by another factor of 5 when pin 25 is at the high level. (7) TE amplifier (for 3-beam systems) The current signal input to pins 13 and 14 is converted to a voltage and after passing through a balance adjustment VCA, the difference is taken. That signal is then passed through a servo gain adjustment VCA and, after band switching, output from pin 40. The gain of the balance adjustment VCA can be adjusted by changing the DC voltage applied to pin 36. This VCA, which adjusts the servo gain, is controlled by the DC voltage applied to pin 32. The band switching circuit consists of a low-pass filter whose frequency is 30kHz when pin 31 is at the high level and whose frequency is 200kHz when pin 31 is low. Also, when pin 30 is at the low level, the output is shunted to SREF. The gain is increased by another factor of 5 when pin 25 is at the high level. No.7413-5/16 LA9703W (8) DPD circuit This circuit compares the phase of the pin 3 input signal to the pin 4, 5, 6, and 7 input signals and outputs the result from pin 40. The phase compared signal is output as a current signal by the pin 37 constant-current charge pump, and converted to a voltage level by the external capacitor and resistor attached to pin 37. The signal converted to a voltage is passed through a buffer amplifier and, after band limiting is applied by the band switching circuit, is output from pin 40. The charge pump is set to its off mode by a high level on pin 30. The band switching circuit consists of a low-pass filter whose frequency is 30kHz when pin 31 is at the high level and whose frequency is 200kHz when pin 31 is low. Also, when pin 30 is at the low level, pin 37 is shunted to SREF. (9) PP amplifier The current signal input to pins 11 and 12 is converted to a voltage and after passing through a servo gain adjustment VCA, the signal is band limited and output from pin 42. The signal output from pin 42 is input to pin 43 through a capacitor and resistor. After this input signal is amplified, it is output from pin 41. This VCA, which adjusts the servo gain, is controlled by the DC voltage applied to pin 32. Note that pin 28 must be set to the low level if the PP amplifier is used. (10) Wobble bandpass filter The current signal input to pins 11 and 12 is converted to a voltage and the difference is taken. After passing through the servo gain adjustment VCA, the signal is input to the bandpass filter. The DC component of the signal that was band limited by the bandpass filter is removed with a DC cut circuit and, after being amplified by a 37dB amplifier, it is output from pin 41. The fO frequency of the bandpass filter can be changed by changing the value of the external resistor connected between pin 45 and ground. When the value of the pin 45 external resistor is 62kΩ, fO will be about 200kHz. The cutoff frequency for the DC cut circuit is set by the value of the capacitor connected to pin 44. The cutoff frequency will be approximately the product of the internal resistance (18kΩ) and the value of the external capacitor. Note that pin 28 must be set to the low level if the PP amplifier is used. (11) APC circuit A servo loop that holds the laser power at a fixed level is formed by inputting the monitor signal to pin 16 and connecting pin 15 to the laser driver. The threshold voltage will be 180mV when pin 20 is low and (VCC - 1.5V) when pin 20 is high. The laser can be turned off by setting pin 21 to the low level. Note that there are two APC circuit systems; the second system consists of pins 18 (monitor input), 17 (laser drive), and 22 (laser on/off). The threshold voltage is 180mV. (12) Reference circuit The VCC level is resistor divided by two internally and that voltage is output from pin 58. The pin 58 voltage is a dedicated reference voltage for the pickup. The pin 48 voltage level is resistor divided by two internally and that voltage is output from pin 51. The pin 51 voltage is a reference level that is supplied to the DSP and other circuits. No.7413-6/16 LA9703W Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Pin name CAP VCC PDRF PD1 PD2 PD3 PD4 GND FIN1 FIN2 PIN1 PIN2 TIN1 TIN2 LDD1 LDS1 LDD2 LDS2 GND LDTH LDON1 LDON2 AGOF BCA GU DVD/CD DPD/TE WO/PP VCC TH XHTR SGC BST FC FEBL TEBL CP RREC FE TE WO PP PPN WOC ISET BH PH SREFI BCAI PHC Customer OP amplifier + input Power pin (for DPD) Pickup signal input Pickup signal input Pickup signal input Pickup signal input Pickup signal input Ground (for DPD) Pickup signal input Pickup signal input Pickup signal input Pickup signal input Pickup signal input Pickup signal input AP1 output APC1 monitor input APC2 output PC2 monitor input Ground (servo system) APC1 threshold changeover (H:VCC-1.5V, L: 180mV) APC1 laser ON pin (H: ON) APC2 laser ON pin (H: ON) RFAGC OFF pin (H: OFF) PH discharge factor changeover (H: BCA mode) RF, servo signal gain-up pin (H: gain-up) RF-equalizer band changeover pin (H: DVD) TE output changeover pin (H: DPD) WO output changeover pin (H: wobble) Power pin (servo system) Tracking hold (H: hold) Tracking, bottom band changeover (L: high band) Servo gain control pin (RREC, FE, PP, TE) Equalizer boost control pin Equalizer fo control pin FE balance control pin TE balance control pin Pin to connect resistor and capacitor to set charge pump gain Reflection output Focus error output Tracking error output Wobble/push-pull output pin Push-pull output pin Pin to connect resistor to set push-pull gain DC cut capacity connection pin Pin to connect resistor to set BPF central frequency RF bottom detection output RF peak detection output SREF setting pin Pin to connect resistor to set the peak hold detection constant Pin to connect PH detection capacitor for RF-AGC Continued on next page. Pin description No.7413-7/16 LA9703W Continued from preceding page. Pin No. 51 52 53 54 55 56 57 58 59 60 61 62 63 64 Pin name SREF LPC N/C RFON RFOP GND FSET RREF RFN N/C RFP CAO VCC CAN Reference voltage output for servo signal Pin to connect capacitor for RF DC servo N/C pin RF - output RF + output Ground (RF system) Pin to connect resistor to set equalizer for frequency Reference voltage output (for pick) RF signal - input N/C pin RF + signal Customer OP amplifier output pin Power pin (RF system) Customer OP amplifier - input pin Pin description No.7413-8/16 LA9703W Block Diagram and Test Circuit No.7413-9/16 LA9703W The Explanation of the Terminal Pin No. 1 64 CAP CAN Pin name Equivalent circuit 3 4 5 6 7 PDRF PD1 PD2 PD3 PD4 9 10 11 12 13 14 FIN1 FIN2 PIN1 PIN2 TIN1 TIN2 15 17 LDD1 LDD2 Continued on next page. No.7413-10/16 LA9703W Continued from preceding page. Pin No. 16 18 Pin name LDS1 LDS2 Equivalent circuit 20 21 22 24 25 27 28 30 31 LDTH LDON1 LDON2 BCA GU DPD/TE WO/PP TH XHTR 23 26 AGOF DVD/CD 32 33 SGC BST Continued on next page. No.7413-11/16 LA9703W Continued from preceding page. Pin No. 34 FC Pin name Equivalent circuit 35 36 FEBL TEBL 37 CP 38 39 40 41 42 46 47 RREC FE TE WO PP BH PH 43 PPN Continued on next page. No.7413-12/16 LA9703W Continued from preceding page. Pin No. 44 Pin name WOC Equivalent circuit 45 57 ISET FSET 48 SREFI 49 BCAI 50 PHC Continued on next page. No.7413-13/16 LA9703W Continued from preceding page. Pin No. 51 58 62 Pin name SREF PREF CAD Equivalent circuit 52 LPC 54 55 RFON PFOP 59 61 RFN RFP No.7413-14/16 LA9703W Sample Application Circuit No.7413-15/16 LA9703W Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor products (including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Semiconductor Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO Semiconductor believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of October, 2005. Specifications and information herein are subject to change without notice. PS No.7413-16/16