LB11620GP

Ordering number : ENA1913A LB11620GP Overview Monolithic Digital IC Brushless Motor Driver The LB11620GP is a direct PWM drive pre-driver IC that is optimal for three-phase power brushless motors. A motor driver circuit with the desired output capability (voltage and current) can be implemented by adding discrete transistors or other power devices to the outputs of this IC. Since the LB11620GP is provided in a miniature package, it is also appropriate for use with miniature motors as well. Features • Three-phase bipolar drive • Direct PWM drive (input of either a control voltage or a variable-duty PWM signal) • Built-in forward/reverse switching circuit • 5V regulator output (VREG pin) • Built-in current limiter circuit (0.25V (typical) reference voltage) • Built-in under voltage protection circuit • Built-in automatic recovery type constraint protection circuit (ON: OFF=1: 18) with protection operating state discrimination output (RD pin) • Hall signal pulse outputs Specifications Maximum Ratings at Ta = 25°C Parameter Supply voltage 1 Output current Allowable power dissipation Operating temperature Storage temperature Symbol VCC max IO max Pd max Topr Tstg VCC pin UL, VL, WL, UH, VH, WH pins *Mounted on a circuit board. Conditions Ratings 18 30 1.0 -30 to +100 -55 to +150 Unit V mA W °C °C * Mounted on a circuit board: 40.0mm×50.0mm×0.8mm, glass epoxy board. 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To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 20211 SY 20110131-S00004/D2210 SY 20101213-S00003 No.A1913-1/13 LB11620GP Recommended Operating Ranges at Ta = 25°C Parameter Supply voltage range 1-1 Supply voltage range 1-2 Output current 5 V constant voltage output current HP pin voltage HP pin output current RD pin voltage RD pin output current Symbol VCC1-1 VCC1-2 IO IREG VHP IHP VRD IRD VCC pin VCC pin, with VCC shorted to VREG UL, VL, WL, UH, VH, WH pins Conditions Ratings 8 to 17 4.5 to 5.5 25 -30 0 to 17 0 to 15 0 to 17 0 to 15 Unit V V mA mA V mA V mA Electrical Characteristics at Ta = 25°C, VCC = 12V Parameter Supply voltage 1 Symbol ICC1 Conditions min Ratings typ 12 max 16 mA Unit 5V constant voltage output (VREG pin) Output voltage Line regulation Load regulation Temperature coefficient VREG ΔVREG1 ΔVREG2 ΔVREG3 VCC = 8 to 17V IO = -5 to -20mA Design target 4.7 5.0 40 10 0 5.3 100 30 V mV mV mV/°C Low-voltage protection circuit (VREG pin) Operating voltage Clear voltage Hysteresis Output Block Output voltage 1-1 Output voltage 1-2 Output voltage 2 Output leakage current Hall Amplifier Block Input bias current Common-mode input voltage range 1 Common-mode input voltage range 2 Hall input sensitivity Hysteresis Input voltage low → high Input voltage high → low PWM Oscillator (PWM pin) High-level output voltage Low-level output voltage External capacitor charge current Oscillator frequency Amplitude EI+ pin Input bias current Common-mode input voltage range Input voltage 1 Input voltage 2 Input voltage 1L Input voltage 2L Input voltage 1H Input voltage 2H IB (CTL) VICM VCTL1 VCTL2 VCTL1L VCTL2L VCTL1H VCTL2H Output duty 100% Output duty 0% Design target value. When VREG = 4.7V, 100% Design target value. When VREG = 4.7V, 0% Design target value. When VREG = 5.3V, 100% Design target value. When VREG = 5.3V, 0% Continued on next page 1.44 V 3.18 V 1.29 V -1 0 3.0 1.35 2.82 1 VREG-1.7 μA V V V V VOH (PWM) VOL (PWM) ICHG f (PWM) V (PWM) VPWM = 2.1V C = 2000pF 1.4 2.75 1.2 -120 3.0 1.35 -90 22 1.6 1.9 3.25 1.5 -65 V V μA kHz Vp-p ΔVIN (HA) VSLH (HA) VSHL (HA) IHB (HA) VICM1 VICM2 When a Hall effect sensor is used For single-sided input bias (Hall IC application) 80 15 5 -20 24 12 -12 40 20 -5 mVp-p mV mV mV -2 0.5 0 -0.5 VCC-2.0 VCC μA V V VOUT1-1 VOUT1-2 VOUT2 IOleak Low level IO = 400μA Low level IO = 10mA High level IO = -20mA VCC-1.1 0.2 0.9 VCC-0.9 10 0.5 1.2 V V V μA VSDL VSDH ΔVSD 3.5 3.95 0.3 3.7 4.15 0.45 3.9 4.35 0.6 V V V No.A1913-2/13 LB11620GP Continued from preceding page. Parameter HP pin Output saturation voltage Output leakage current CSD oscillator (CSD pin) High-level output voltage Low-level output voltage External capacitor charge current External capacitor discharge current Charge/discharge current ratio RD pin Low-level output voltage Output leakage current Current limiter circuit (RF pin) Limiter voltage PWMIN pin Input frequency High-level input voltage Low-level input voltage Input open voltage Hysteresis High-level input current Low-level input current F/R pin High-level input voltage Low-level input voltage Input open voltage Hysteresis High-level input current Low-level input current N1 pin High-level input voltage Low-level input voltage Input open voltage High-level input current Low-level input current VIH (N1) VIL (N1) VIO (N1) IIH (N1) IIL (N1) VN1 = VREG VN1 = 0V 2.0 0 VREG-0.5 -10 -130 0 -100 VREG 1.0 VREG 10 V V V μA μA VIH (FR) VIL (FR) VIO (FR) VIS (FR) IIH (FR) IIL (FR) 2.0 0 VREG-0.5 0.2 -10 -130 0.25 0 -90 VREG 1.0 VREG 0.4 10 V V V V μA μA f (PI) VIH (PI) VIL (PI) VIO (PI) VIS (PI) IIH (PI) IIL (PI) VPWMIN = VREG VPWMIN = 0V 2.0 0 VREG-0.5 0.2 -10 -130 0.25 0 -90 60 VREG 1.0 VREG 0.4 10 kHz V V V V μA μA VRF RF-GND 0.225 0.25 0.275 V VRDL IL (RD) IO = 10mA VO = 18V 0.2 0.5 10 V μA VOH (CSD) VOL (CSD) ICHG1 ICHG2 RCSD VCSD = 2V VCSD = 2V Charge current /discharge current 2.7 0.7 -3.15 0.1 15 3.0 1.0 -2.5 0.14 18 3.3 1.3 -1.85 0.18 21 V V μA μA Times VHPL IHPleak IO = 10mA VO = 18V 0.2 0.5 10 V μA Symbol Conditions min Ratings typ max Unit No.A1913-3/13 LB11620GP Package Dimensions unit : mm (typ) 3322A TOP VIEW 3.5 (C0.17) 3.5 (0.13) (0.125) Allowable power dissipation, Pd max - W SIDE VIEW BOTTOM VIEW 1.2 Pd max Ta Specified circuit board : 40.0×50.0×0.8mm3 glass epoxy board 1.0 0.8 0.4 0.6 24 21 0.5 SIDE VIEW 0.8 (0.5) 0.4 0.40 0.2 0.25 (0.035) 0 -30 0 30 60 90 120 SANYO : VCT24(3.5X3.5) Ambient temperature, Ta - C Pin Assignment VCC VREG 15 14 EI+ 13 12 N1 11 HP 10 F/R PWMIN CSD RD WH 18 WL 19 VH 20 VL 21 RF 17 GND 16 LB11620GP UH 22 UL 23 IN1- 24 1 IN1+ 2 IN23 IN2+ 4 IN35 IN3+ 6 PWM 9 8 7 No.A1913-4/13 LB11620GP • Three-Phase Logic Truth Table (IN = “H” indicates the state where IN+ > IN-) F/R = “L” IN1 1 2 3 4 5 6 H H H L L L IN2 L L H H H L IN3 H L L L H H IN1 L L L H H H F/R=“H” IN2 H H L L L H IN3 L H H H L L PWM VH WH WH UH UH VH UL UL VL VL WL WL Output • PWMIN pin Input state High or open Low State Output off Output on If the PWM pin is not used, the input must be held at the low level. • N1 pin Input state High or open Low HP output Three Hall sensor synthesized output Single Hall sensor output Explanation of Pin Functions Pin No. 1, 24 3, 2 5, 4 6 7 8 9 Pin IN1+, IN1IN2+, IN2IN3+, IN3PWM RD CSD PWMIN Hall sensor inputs from each motor phase. The logic high state indicates that IN+ > IN-. If inputs are provided by a Hall effect sensor IC, the common-mode input range is expanded by biasing either the + or input. Functions as both the PWM oscillator frequency setting pin and the initial reset pulse setting pin. Connect a capacitor between this pin and ground. Lock (motor constrained) detection state output. This output is turned on when the motor is turning and off when the lock protection function detects that the motor has been stopped. This is an open collector output. Sets the operating time for the lock protection circuit. Connect a capacitor between this pin and ground. Connect this pin to ground if the lock protection function is not used. PWM pulse signal input. The output goes to the drive state when this pin is low and to the off state when this pin is high or open. To use this pin for control, a CTL amplifier input such that the TOC pin voltage goes to the 100% duty state must be provided. 10 11 12 13 14 15 16 17 F/R HP N1 EI+ VREG VCC GND RF Forward/reverse control input Hall signal output (HP output). This provides either a single Hall sensor output or a synthesized 3-sensor output. Hall signal output (HP output) selection CTL amplifier + (no inverting) input. The PWMIN pin must be held at the low level to use this input for motor control 5V regulator output (Used as the control circuit power supply. A low-voltage protection circuit is built in.) Connect a capacitor between this pin and ground for stabilization. Power supply. Connect a capacitor between this pin and ground to prevent noise and other disturbances from affecting this IC. Ground Output current detection. The current detection resistor (Rf) voltage is sensed by the RF pin to implement current detection. The maximum output current is set by RF to be IOUT = 0.25/Rf. 22 20 18 23 21 19 UH VH WH UL VL WL Outputs These are push-pull outputs. Outputs (PWM outputs). These are push-pull outputs. Description No.A1913-5/13 LB11620GP Hall Sensor Signal Input/Output Timing Chart F/R = " L " IN1 IN2 IN3 UH VH WH UL VL WL F/R = " H " IN1 IN2 IN3 UH VH WH UL VL WL Sections shown in gray are PWM output periods. No.A1913-6/13 VREG 5V + + VM RD + CSD VREG RD CSD OSC LVSD VREG CTL EI+ + Bipolar transistor drive (high side PWM) Using a 5V power supply PWM VCC PWM OSC COMP PWMIN CONTROL LOGIC UH UL PRI DRIVER HALL LOGIC VH VL HP LOGIC WH WL Block Diagram and Application Example 1 PWM IN LB11620GP VREG HP F/R N1 HALL HYS AMP CURR LIM RF F/R IN1 IN1+ IN1- IN2+ IN2- IN3+ IN3- GND No.A1913-7/13 VCC VREG + RD CSD VM(12V) + RD VREG Tr CSD OSC LVSD VREG Application Example 2 - EI+ + 54 MOS transistor drive (low side PWM) Using a 12V single-voltage power supply PWM VCC PWM OSC COMP PWMIN CONTROL LOGIC UL UH PRI DRIVER HALL LOGIC VL VH HP LOGIC WL WH PWM IN Tr LB11620GP VREG HP Tr F/R N1 HALL HYS AMP CURR LIM RF F/R IN1 IN1+ IN1- IN2+ IN2- IN3+ IN3- GND No.A1913-8/13 VCC VREG + RD VCC(12V) + RD VREG CSD OSC LVSD VREG VM(24V) + CSD Application Example 3 - EI+ + PWM VCC PWM OSC COMP MOS transistor drive (low side PWM) Using a VCC = 12V, VM = 24V power supply system PWMIN CONTROL LOGIC UL UH PRI DRIVER HALL LOGIC VL VH HP LOGIC WL WH PWM IN LB11620GP VREG HP F/R N1 HALL HYS AMP CURR LIM RF F/R IN1 IN1+ IN1- IN2+ IN2- IN3+ IN3- GND No.A1913-9/13 VCC VREG + RD CSD VM(24V) + RD VREG CSD OSC LVSD VREG Application Example 4 - EI+ + MOS transistor drive (low side PWM) Using a 24V single-voltage power supply PWM VCC PWM OSC COMP PWMIN CONTROL LOGIC UL UH PRI DRIVER HALL LOGIC VL VH HP LOGIC WL WH PWM IN LB11620GP VREG HP F/R N1 HALL HYS AMP CURR LIM RF F/R IN1 IN1+ IN1- IN2+ IN2- IN3+ IN3- GND No.A1913-10/13 VCC LB11620GP Pin Functions PIN No. 24 1 2 3 4 5 PIN name IN1IN1+ IN2IN2+ IN3IN3+ Hall input pin. IN+ > IN- to “H”, IN+ < IN- to “L”. Connect the capacitor between IN+ and INwhen the noise of the hall signal becomes a problem. 1 3 5 24 2 4 Function Equivalent circuit VCC 6 PWM Functions as both the PWM oscillator frequency setting pin and the initial reset pulse setting pin. Connect a capacitor between this pin and ground. It is possible to set it to about 22kHz with C=2000pF. VREG 6 7 RD Lock (motor constrained) detection state output. This output is turned on when the motor is turning and off when the lock protection function detects that the motor has been stopped. VREG 7 11 11 HP Hall signal output pin. Two kinds of outputs can be selected by setting the N1 pin. 8 CSD Sets the operating time for the lock protection circuit. Connect a capacitor between this pin and ground. Connect this pin to ground if the lock protection function is not used. VREG 8 9 PWMIN PWM pulse signal input. The output goes to the drive state when this pin is low and to the off state when this pin is high or open. To use this pin for control, a CTL amplifier input such that the TOC pin voltage goes to the 100% duty state must be provided. VREG 9 10 10 F/R Forward/reverse control input. 12 N1 Hall signal output (HP output) selection. VREG 12 Continued on next page No.A1913-11/13 LB11620GP Continued from preceding page. PIN No. 13 PIN name EI+ Function CTL amplifier + (no inverting) input. The PWMIN pin must be held at the low level to use this input for motor control. Equivalent circuit VCC 13 14 VREG Stabilizing supply output pin. (5V output) Connect a capacitor between this pin and ground for stabilization. (about 0.1μF level) VCC 14 15 VCC Power supply. Connect a capacitor between this pin and ground to prevent noise and other disturbances from affecting this IC. 16 17 GND RF Ground Output current sensing pin. The low resistance is connected between RF and GND. It sets it by output maximum current IOUT=0.25/Rf. 17 VREG 18 19 20 21 22 23 WH WL VH VL UH UL Output pin. (Driving external TR output) The duty is controlled on UH, VH, and WH side. VCC 18 19 20 21 22 23 PS No.A1913-12/13 LB11620GP SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. 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SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of February, 2011. Specifications and information herein are subject to change without notice. PS No.A1913-13/13