LB1916

Ordering number : EN5653 Monolithic Digital IC LB1916 CD-ROM Spindle Motor Driver Overview The LB1916 is a 3-phase motor driver that is optimal for driving CD-ROM spindle motors. Functions and Features • 3-phase brushless motor driver • 120° voltage linear drive control • V-type input used for the control voltage • Control gain switching supported • Pins for system control and control of acceleration and deceleration provided. • Start/stop pin provided. • Hall bias circuit Package Dimensions unit: mm 3219-QFP34H-C [LB1916] Allowable power dissipation, Pdmax – W Ambient temperature, Ta – °C SANYO: QFP34H-C Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Maximum supply voltage Output voltage Output current Allowable power dissipation Operating temperature Storage temperature Symbol VCC1 max VCC2 max VOU, V, W IOUT Pd max Topr Tstg Independent IC Conditions Ratings 14 7.0 13 1.0 0.77 –20 to +75 –55 to +150 Unit V V V A W °C °C Allowable Operating Ranges at Ta = 25°C Parameter Supply voltage VCREF input voltage Symbol VCC1 VCC2 VCREF VCC1 ≥ VCC2 Conditions Ratings 5 to 12.5 4.3 to 6.5 VCC2/2±1.0 Unit V V V SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN 53197HA(OT) No. 5653-1/7 LB1916 Electrical Characteristics at Ta = 25°C, VCC1 = 12 V, VCC2 = 5 V Parameter Symbol ICC1 ICC2 (ICC for VCC1) [Drive Block] Output saturation voltage Output TRS sustainable voltage Output center voltage Hall amplifier input offset voltage Hall amplifier input bias current Hall amplifier common-mode input voltage range Hall input/output voltage gain Control - output drive gain 1 Control - output channel difference 1 Control - output drive gain 2 Control - output channel difference 2 Input dead band voltage Input bias current 1 S/S pin high-level voltage S/S pin low-level voltage Gain control 1 high-level voltage Gain control 1 low-level voltage Gain control 2 high-level voltage Gain control 2 low-level voltage S/S pin input current Gain control 1 and 2 current Rotation output saturation voltage Hall bias voltage CTRL pin high-level voltage VO(sat)1 VO(sat)2 VO(sus) VOQ VH offset IH bias VHch VGHO VGCO1 ∆VGCO1 VGCO2 ∆VGCO2 VDZ IB SERVO VS/S H VS/S L VGC1 H VGC1 L VGC2 H VGC2L IS/S IGC V(sat)H.FG1, 2 RZ1 = RZ2, GC1 = L, GC2 = L RZ1 = RZ2, GC1 = L, GC2 = L RZ1 = RZ2, GC1 = L, GC2 = H RZ1 = RZ2, GC1 = L, GC2 = H RZ1 = RZ2, GC1 = L, GC2 = H VO (voltage between out and OUT) = 0.1 V VC = 1.0 V Inputs are CMOS level, (See Note.) S/S pin Vth = VCC2/2 Inputs are CMOS level, (See Note.) S/S pin Vth = VCC2/2 Inputs are CMOS level, (See Note.) GC1 pin Vth = 2.0 V Inputs are CMOS level, (See Note.) GC1 pin Vth = 2.0 V Inputs are CMOS level, (See Note.) GC2 pin Vth = 2.0 V Inputs are CMOS level, (See Note.) GC2 pin Vth = 2.0 V Input voltage = 5 V Input voltage = 5 V IO = –5 mA IO = 5 mA, RH = 200 Ω CTRL1 and CTRL2 are common, Inputs are CMOS level, (See Note.) CTRL pin Vth = 2.5 V CTRL1 and CTRL2 are common, Inputs are CMOS level, (See Note.) CTRL pin Vth = 2.5 V Input voltage = 5 V * * 150 53 180 15 0.7 4.0 50 53 0.24 4.0 1.0 100 110 0.5 7 0.97 1.2 4.0 1.0 4.0 1.0 1.3 38 23 –1.5 29 –1.9 ±24 32 +1.9 ±50 500 41 26 +1.5 IOUT = 0.4 A, sink + source IOUT = 0.8 A, sink + source IOUT = 20 mA, * VC = 2.5 V, VCREF = 2.5 V 14 5.7 –5 1 6.0 6.3 +5 5 2.2 44 1.6 2.0 2.2 3.0 V V V V mV µA V dB dB dB dB dB mV nA V V V V V V µA µA V V V V ICC3 Conditions VC = 2.5 V, VCREF = 2.5 V, RL = ∞, VS/S = 5 V, VRF = GND VC = 2.5 V, VCREF = 2.5 V VC = 2.5 V, VCREF = 2.5 V, RL = ∞, VS/S = 0 V, VRF = GND Ratings min typ 17 7.5 0.9 max 30 10.5 3 Unit mA mA mA Supply current drain V(sus)H.FG1, 2 * VH± VS/S H CTRL pin low-level voltage CTRL input pin Thermal shutdown operating voltage Thermal shutdown hysteresis VS/S L ICTRL TSD ∆TSD 1.0 110 210 V µA °C °C Note: Items marked with an asterisk are design target values and are not tested. No. 5653-2/7 LB1916 Hall Logic Truth Table Source → Sink 1 W→V V→W W→U U→W V→W W→V U→V V→> U V→U U→V U→W W→U Hall input UIN H VIN H WIN L Forward/reverse control Forward Reverse Forward H L L Reverse Forward L L H Reverse Forward L H L Reverse Forward H L H Reverse Forward L H H Reverse Mode Switching Truth Table CTRL0 L L H H CTRL1 L H L H Mode Control Control Acceleration Deceleration 2 The low level is 0 to 1.0 V The high level is 4.0 V or higher 3 4 5 6 An input “H” state is defined as UIN1 > UIN2, VIN1 > VIN2, and the potential difference is at least 0.2 V. When VC > VCREF: Forward rotation When VC < VCREF: Reverse rotation Pin Assignment VCREF No. 5653-3/7 LB1916 Peripheral Circuit Example VCREF Block Diagram Start/stop Absolute value detector VCREF Thermal shutdown Gain selector 0/6 dB Mode selector Hall amp & Matrix & Forward/reverse selector Hall bias No. 5653-4/7 LB1916 Pin Functions Pin No. 3, 4, 20, 21 Pin GND Pin voltage • GND Pin function Equivalent circuit 23 22 19 UOUT VOUT WOUT • Outputs • Connect these pins to the motor. 17 Rf • Ground for the output transistors • The output current can be detected as a voltage by connecting a resistor between the Rf pin and ground. This can then be used to implement overcurrent protection. 18, 24, 7 NC • No connection 16 VCC2 4.3 to 6.5 V • Power supply for circuits other than the output block • The power supply provided by this pin must be well stabilized so that noise does not occur. 15 14 Z1 Z2 • Connections for the resistors that set the front-end amplifier gain • Z1 and Z2 are common, and have a resistance of between a few tens of kΩ and a few hundreds of kΩ. • The gain is about 6 dB. 13 12 VC VCREF • VC is the speed control pin. When VC > VCREF: Forward rotation VCC2 When VC < VCREF: Reverse rotation ——— ±1.0 The output voltage is controlled by the V voltage. C 2 • VCREF determines the motor control stop voltage. Normally, this will be VCC2/2. 11 10 GC1 GC2 0 to VCC2 • I/O gain switching input • GC1 switches Z1 and Z2 for the front end amplifier. When GC1 is low, Z1 is selected, and when GC1 is high, Z2 is selected. GC2 switches the amplifier in the second stage. Continued on next page. No. 5653-5/7 LB1916 Continued from preceding page. Pin No. Pin Pin voltage Pin function Equivalent circuit 9 8 CTRLφ CTRL1 0 to VCC2 • Operating mode switching input • These pins select control, acceleration, or deceleration according to the mode switching truth table. 6 S/S 0 to VCC2 • Apply a high level to the S/S pin for start, and a low level for stop. • The threshold is VCC2/2. 5 FC • Oscillation can be prevented by connecting a capacitor between the FC pin and ground to lower the I/O gain frequency characteristics. 2 1 34 33 32 31 WIN2 WIN1 VIN1 VIN2 UIN2 UIN1 1.3 to 2.2 V • W phase Hall element inputs Logic high is when WIN1 > WIN2. • V phase Hall element inputs Logic high is when VIN1 > VIN2. • U phase Hall element inputs Logic high is when UIN1 > UIN2. 30 29 VH+ VH– 2.4 V 1.4 V • Hall element power supply There is a potential difference of 1.0 V between VH+ and VH–. Continued on next page. No. 5653-6/7 LB1916 Continued from preceding page. Pin No. Pin Pin voltage Pin function Equivalent circuit 28 27 HFG2 HFG1 0 to VCC2 • Hall FG pins • The Hall waveform is modified and used as FG pulses. • The phase relationship between HFG1 and HFG2 is used as a forward/reverse signal. 26 CL 0 to VCC2 • The current limiter operates when the Rf pin voltage reaches the voltage on the CL pin. The CL potential is determined externally. 25 VCC1 5 to 12.5 V • Power supply for the output block • The power supply provided to this pin must be well stabilized so that noise does not occur. s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. s Anyone purchasing any products described or contained herein for an above-mentioned use shall: Œ Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use:  Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of May, 1997. Specifications and information herein are subject to change without notice. No. 5653-7/7