LB1991V

Ordering number : EN5792 Monolithic Digital IC LB1991V Three-Phase Brushless Motor Driver for Portable VCR Capstan Motors Overview The LB1991V is a 3-phase brushless motor driver IC that is optimal for driving the capstan motor in portable VCR products. • Speed control technique based on motor voltage and current control. • Built-in FG comparators • Built-in thermal shutdown circuit Functions • 3-phase full-wave voltage drive technique (120° voltage-linear technique) • Torque ripple correction circuit (overlap correction) Package Dimensions unit: mm 3175A-SSOP24 [LB1991V] Allowable power dissipation, Pd max — W SANYO: SSOP24 Ambient temperature, Ta — °C Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol VCC1 max Maximum supply voltage VCC2 max VS max Applied output voltage Maximum output current Allowable power dissipation Operating temperature Storage temperature VO max IO max Pd max Topr Tstg Independent IC Conditions Ratings 10 11 11 VS + 2 1.0 440 –20 to +75 –55 to +150 Unit V V V V A mW °C °C Allowable Operating Ranges at Ta = 25°C Parameter Symbol VCC1 Supply voltage VCC2 VS Hall input amplitude VHALL Between Hall effect element inputs VCC1 ≤ VCC2 Conditions Ratings 2.7 to 6.0 3.5 to 9.0 Up to VCC2 ±20 to ±80 Unit V V V mVp-p SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 53098RM (OT) No. 5792-1/7 LB1991V Electrical Characteristics at Ta = 25°C, VCC1 = 3 V, VCC2 = 4.75 V, VS = 1.5 V Parameter [Supply Current] VCC1 current drain VCC2 current drain VCC1 quiescent current VCC2 quiescent current VS quiescent current [VX1] High side residual voltage Low side residual voltage [VX2] High side residual voltage Low side residual voltage Output saturation voltage Overlap High/low overlap difference [Hall Amplifiers] Input offset voltage Common-mode input voltage range I/O voltage gain [Standby Pin] High-level voltage Low-level voltage Input current Leakage current [FRC Pin] High-level voltage Low-level voltage Input current Leakage current [VH] Hall supply voltage (–) pin voltage [FG Comparator] Input offset voltage Input bias voltage Input bias current offset Common-mode input voltage range Output high-level voltage Output low-level voltage Voltage gain Output current (sink) [TSD] TSD operating temperature TSD temperature hysteresis T-TSD ∆TSD Design target value *1 Design target value *1 180 20 °C °C VFGOFF IbFG ∆IbFG VFGCM VFGOH VFGOL VGFG IFGOS At the internal pull-up resistors At the internal pull-up resistors *1 For the output pin low level 100 5 VFGIN+ = VFGIN– = 1.5 V VFGIN+ = VFGIN– = 1.5 V –100 1.2 2.8 0.2 –3 +3 500 +100 2.5 mV nA nA V V V dB mA VHALL VH(–) IH = 5 mA, VH(+) – VH(–) IH = 5 mA 0.85 0.81 0.95 0.88 1.05 0.95 V V VFRCH VFRCL IFRCIN IFRCLK VFRC = 3 V VFRC = 0 V 20 2.5 0.4 30 –30 V V µA µA VSTH VSTL ISTIN ISTLK VSTBY = 3 V VSTBY = 0 V 25 2.5 0.4 40 –30 V V µA µA VHOFF VHCM VGVH *1 Rangle = 20 kΩ Rangle = 20 kΩ –5 0.95 25.5 28.5 +5 2.1 31.5 mV V dB VXH2 VXL2 VO(sat) O.L ∆O.L IOUT = 0.5 A IOUT = 0.5 A IOUT = 0.8 A, Sink + Source RL = 39 Ω × 3, Rangle = 20 kΩ *2 (Average high side overlap) – (Average low side overlap) *2 73 –8 80 0.25 0.25 0.40 0.40 1.4 87 +8 V V V % % VXH1 VXL1 IOUT = 0.2 A IOUT = 0.2 A 0.15 0.15 0.22 0.20 0.29 0.25 V V ICC1 ICC2 ICC1Q ICC2Q ISQ IOUT = 100 mA IOUT = 100 mA VSTBY = 0 V VSTBY = 0 V VSTBY = 0 V 75 3 7.0 1.5 5 10.0 3.0 100 100 mA mA mA µA µA Symbol Conditions Ratings min typ max Unit Notes: 1. Items specified as design target values in the conditions column are not tested. 2. The standard for overlap is the value as measured. No. 5792-2/7 LB1991V Pin Assignment Truth Table Source phase → Sink phase 1 V→W W→V U→W W→U U→V V→U W→V V→W W→U U→W V→U U→V H Hall input H L FRC H L H L H L H L H L H L 2 H L L 3 H L H 4 L L H 5 L H H 6 L H L Note: The “H” entries in the FRC column indicate a voltage of 2.50 V or higher, and the “L” entries indicate a voltage of 0.4 V or lower. (When VCC1 is 3 V.) At the Hall inputs, for each phase a high-level input is the state where the (+) input is 0.02 V or higher than the (–) input. Similarly, a low-level input is the state where the (+) input is 0.02 V or lower than the (–) input. No. 5792-3/7 LB1991V Pin Functions Pin No. 1 2 3 Pin VCC1 VCC2 VS UOUT Equivalent circuit Supply voltage for all circuits other than the IC internal output block and the amplitude control block. Supply voltage for the IC internal output control block and the amplitude control block. Motor drive power supply. The voltage applied to this pin must not exceed VCC2. U phase output Pin function 5 7 VOUT V phase output (These outputs include built-in spark killer diodes.) 9 WOUT Rf W phase output 6, 8 Ground for the output power transistors 10 VH+ Hall element bias voltage supply A voltage that is typically 0.95 V is generated between the VH + and VH– pins. (When IH is 5 mA.) 11 VH– 13 GND Ground for circuits other than the output transistor The Rf pin potential is the lowest output transistor potential. Forward/reverse selection. Applications can select motor forward or reverse direction rotation using this pin. (This pin has hysteresis characteristics.) 14 FRC 15 STBY Selects the bias supply for all circuits other than the FG comparators. The bias supply is cut when this pin is set to the low level. 16 17 18 19 20 21 12 UIN1 UIN2 VIN1 VIN2 WIN1 WIN2 ANGLE U phase Hall element input The logic high level is the state where the IN+ voltage is greater than the IN- voltage. V phase Hall element input The logic high level is the state where the IN+ voltage is greater than the IN- voltage. W phase Hall element input The logic high level is the state where the IN+ voltage is greater than the IN- voltage. Hall input/output gain control. The gain is controlled by the resistor connected between this pin and ground. 22 FGIN+ FG comparator noninverting inputs. There is no internally applied bias. 23 FGIN– FG comparator inverting inputs. There is no internally applied bias. 24 FGOUT FG comparator outputs. There is an internal 20-kΩ resistor load. No. 5792-4/7 Block Diagram Forward/re verse switching current distribution Drive signal current generation block Synthesized signal level shifters Power to shaded blocks is supplied from VCC2. Hall input synthesis (matrix) Hall amplifiers LB1991V Upper and lower amplitude limiters 1.2-V reference voltage and bias startup circuit Bias supply Hall power-supply voltage output circuit FG amplifier No. 5792-5/7 LB1991V Overlap Generation and Calculation Method High side residual voltage High side clamp potential Absolute voltage Electrical angle Calculated center point Low side clamp potential Low side residual voltage Time [Overlap Generation] Since the voltage generated in the amplitude control block is, taking the center point as the reference, 2 × × (1/2 VS – VX) on one side, the intersection point of the waveform will be × (1/2 VS – VX) from the center point. To clamp that waveform at (1/2 VS – VX) referenced to the center point the overlap must be: A/B × 100 = × 100 (%). [Overlap Calculation] • High side overlap (VS – VXH – VXL) (VS – VXH + VXL) Calculated center point: VN = ———————— + VXL = ———————— 2 2 Since A = Vα – VN, B = VS – VXH – VN, the high side overlap will be: A Vα – ((VS – VXH + VXL)/2) = — = —————————————— × 100 (%) B VS – VXH – ((VS – VXH + VXL)/2) Which can be calculated as: 2Vα – (VS – VXH) – VXL = ——————————— × 100 (%). (VS – VXH) – VXL • Low side overlap Since C = VN – Vβ, and D = VN – VXL, the low side overlap will be: C ((VS – VXH + VXL)/2) = — = ———————————— × 100 D ((VS – VXH + VXL)/2) – VXL Which can be calculated as: (VS – VXH) – VXL –2Vβ = ——————————— × 100 (%). (VS – VXH) – VXL No. 5792-6/7 LB1991V Test Circuit s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. s Anyone purchasing any products described or contained herein for an above-mentioned use shall: Œ Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use:  Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of May, 1998. Specifications and information herein are subject to change without notice. PS No. 5792-7/7