LC74770

Ordering number : EN4248A CMOS LSI LC74770M On-Screen Display Controller LSI Overview The LC74770M is a CMOS LSI that implements onscreen display, a function that displays characters and patterns on display screens such as camcorder viewfinder screens under microprocessor control. This LSI displays 12-dot by 18-dot characters. Package Dimensions unit: mm 3112-MFP24S [LC74770M] Features • Display format: 24 characters by 12 rows (up to 288 characters) • Characters displayed: Up to 288 characters • Character format: 12 (horizontal) × 18 (vertical) • Characters in font: 128 • Character sizes: Normal and double • Initial display positions: 64 horizontal positions and 64 vertical positions • Reverse video function: Characters can be displayed in reverse video specified in units of individual characters. • Blinking types: In character units in one of two periods, 1.0 second and 0.5 second, with a 50% duty. • Outputs: Character and blanking data, with two output systems for each • External control input: 8-bit serial input format • General-purpose output port: 4 bits (controlled from the serial input data) Pin Assignment SANYO: MFP24S Top view SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-0005 JAPAN 31596HA (OT) No. 4248-1/11 LC74770M Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Maximum supply voltage Maximum input voltage Maximum output voltage Allowable power dissipation Operating temperature Storage temperature Symbol VDD max VIN max VOUT max Pd max Topr Tstg VDD All input pins BLK1, BLK2, CHA1, CHA2, P0 to P3, CKOUT Conditions Ratings VSS – 0.3 to VSS + 7.0 VSS – 0.3 to VDD + 0.3 VSS – 0.3 to VDD + 0.3 300 –30 to +70 –40 to +125 Unit V V V mW °C °C Allowable Operating Ranges at Ta = –30 to +70°C Parameter Supply voltage Input high-level voltage Input low-level voltage Oscillator frequency Symbol VDD VIH VIL fOSC VDD RST, CS, SIN, SCLK, HSYNC, VSYNC RST, CS, SIN, SCLK, HSYNC, VSYNC OSCIN and OSCOUT oscillator pins Conditions min 4.5 0.8 VDD VSS – 0.3 5 7 typ 5.0 max 5.5 VDD + 0.3 0.2 VDD 10 Unit V V V MHz Electrical Characteristics at Ta = –30 to +70°C, VDD = 5 V unless otherwise specified. Parameter Output high-level voltage Output low-level voltage Input current Operating current drain Symbol VOH VOL IIH IIL IDD Conditions BLK1, BLK2, CHA1, CHA2, P0 to P3: VDD = 5.0 V, IOH = –1.0 mA BLK1, BLK2, CHA1, CHA2, P0 to P3: VDD = 5.0 V, IOL = 1.0 mA RST, CS, SIN, SCLK, HSYNC, VSYNC: VIN = VDD HSYNC, VSYNC: VIN = VSS VDD: all outputs open, LC = 7 MHz –1 10 min 4.5 0.5 1 typ max Unit V V µA µA mA Timing Characteristics at Ta = –30 to +70°C, VDD = 5 ± 0.5 V Parameter Minimum input pulse width Symbol tW (SCLK) tW (CS) tSU (CS) tSU (SIN) th (CS) th (SIN) tword twt SCLK CS (the period that CS is high) CS SIN CS SIN The time to write 8 bits of data The time to write RAM data Conditions min 200 1 200 200 2 200 4.2 1 typ max Unit ns µs ns ns µs ns µs µs Data setup time Data hold time Single word write time No. 4248-2/11 LC74770M Serial Data Input Timing Pin Functions No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Symbol VSS OSCIN OSCOUT CKOUT/TEST P0 P1 CS SCLK SIN VSS NC NC NC NC CHA1 BLK1 CHA2 BLK2 P3 P2 VSYNC HSYNC RST VDD Pin Ground pin LC oscillator pin Clock output/test output pin General-purpose port 0 output pin General-purpose port 1 output pin Enable input pin Clock input pin Data input pin Ground pin No connection No connection No connection No connection Character 1 output pin Blank 1 output pin Character 2 output pin Blank 2 output pin General-purpose port 3 output pin General-purpose port 2 output pin Vertical synchronizing signal input pin Horizontal synchronizing signal input pin Reset input pin Power supply pin (+5 V) System 1 character data output System 1 blank data output System 2 character data output System 2 blank data output General-purpose port (PORT3) output General-purpose port (PORT2) output Input for the vertical synchronizing signal (active low) Input for the horizontal synchronizing signal (active low) System reset input (active low) A pull-up resistor is built in, i.e., this is a hysteresis input. Power supply (+5 V) Unused pins. These pins must be left open or connected to ground. Ground connection Connections for the coil and capacitor that form the oscillator that generates the character output dot clock. Provides the OSCOUT output (when RST is low) and the test mode output. General-purpose port (PORT0) output General-purpose port (PORT1) output Enable input for the serial data input function. Serial data input is enabled when this pin is low. A pull-up resistor is built in, i.e., this is a hysteresis input. Clock input for the serial data input function. A pull-up resistor is built in, i.e., this is a hysteresis input. Serial data input. A pull-up resistor is built in, i.e., this is a hysteresis input. Ground connection Function No. 4248-3/11 LC74770M Block Diagram Display Control Commands Display control commands have an 8-bit format and are transferred using the serial input function. Commands consist of a command identification code in the first byte and command data in the following bytes. The following commands are supported. 1 COMMAND 0: Display memory (VRAM) write address setup command 2 COMMAND 1: Display character data write command 3 COMMAND 2: Vertical display start position and vertical character size setup command 4 COMMAND 3: Horizontal display start position and horizontal character size setup command 5 COMMAND 4: Display control setup command 6 COMMAND 5: System 2 (BLK2 and CHA2) output control (lines 1 to 6) and line size setting command 7 COMMAND 6: System 2 (BLK2 and CHA2) output control (lines 7 to 12) and general-purpose port setting command No. 4248-4/11 LC74770M Display Control Command Table First byte Command Command identification code 7 COMMAND 0 Write address COMMAND 1 Character write COMMAND 2 Vertical display position start position COMMAND 3 Horizontal display position start position COMMAND 4 Display control COMMAND 5 BLK2 and CHA2 output control: lines 1 to 6, and line size control COMMAND 6 BLK2 and CHA2 output control: lines 7 to 12, and general-purpose port control 1 1 6 0 0 5 0 0 4 0 1 3 V3 0 2 V2 0 Data 1 V1 0 0 V0 0 7 0 at 6 0 c6 5 0 c5 4 H4 c4 Second byte Data 3 H3 c3 2 H2 c2 1 H1 c1 0 H0 c0 1 0 1 0 0 0 0 0 0 0 VP 5 HP 5 MD0 VP 4 HP 4 EG VP 3 HP 3 BK 1 LN 4 VP 2 HP 2 BK 0 LN 3 VP 1 HP 1 RV VP 0 HP 0 DSP 1 0 1 1 0 0 0 0 0 0 1 1 0 0 TST RCL OSC RST 0 MD1 1 1 0 1 0 0 0 LS 0 0 LN 6 LN 5 LN 2 LN 1 1 1 1 0 P3 P2 P1 P0 0 0 LN 12 LN 11 LN 10 LN 9 LN 8 LN 7 Once written, the command identification code in the first byte is stored until the next first byte is written. However, when the display character data write command (COMMAND1) is written, the LC74770M locks into the display character data write mode, and another first byte cannot be written. When a high level is input to the CS pin, the LC74770M is set to COMMAND0 (display memory write address setup mode). 1 COMMAND 0 (Display memory write address setup command) First byte Register content DA0 to DA7 7 6 5 4 3 Register name — — — — V3 State 1 0 0 0 0 1 0 1 0 1 0 1 Display memory address (0 to B hexadecimal) Command 0 identification code Sets the display memory write address. Function Note 2 V2 1 V1 0 V0 No. 4248-5/11 LC74770M Second byte Register content DA0 to DA7 7 6 5 4 Register name — — — H4 State 0 0 0 0 1 0 1 0 1 0 1 0 1 Display memory address (0 to 17 hexadecimal) Function Second byte identification bit Note 3 H3 2 H2 1 H1 0 H0 Note: All registers are set to 0 when the LC74770M is reset by the RST pin. 2 COMMAND 1 (Display character data write setup command) First byte Register content DA0 to DA7 7 6 5 4 3 2 1 0 Register name — — — — — — — — State 1 0 0 1 0 0 0 0 Command 1 identification code Sets up display character data write. Function Note When this command is input, the LC74770M locks into the display character data write mode until the CS pin goes high. Second byte Register content DA0 to DA7 7 Register name at State 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Character code (00 to 7F hexadecimal) Character attribute off Character attribute on Function Note 6 c6 5 c5 4 c4 3 c3 2 c2 1 c1 0 c0 Note: All registers are set to 0 when the LC74770M is reset by the RST pin. No. 4248-6/11 LC74770M 3 COMMAND 2 (Vertical display start position setup command) First byte Register content DA0 to DA7 7 6 5 4 3 2 1 0 Register name — — — — — — — — State 1 0 1 0 0 0 0 0 Command 2 identification code Sets the vertical display start position. Function Note Second byte Register content DA0 to DA7 7 6 5 Register name — — VP5 (MSB) VP4 State 0 0 0 1 0 1 0 1 0 1 0 1 0 1 The vertical display start position is set by the 6 bits VP0 to VP5. The weight of bit 1 is 1H. If VS is the vertical display start position then: VS = H × (Σ 2nVPn) n=0 5 Function Second byte identification bit Note 4 H: the horizontal synchronization pulse period 3 VP3 2 VP2 1 VP1 VP0 (LSB) 0 Note: All registers are set to 0 when the LC74770M is reset by the RST pin. 4 COMMAND 3 (Horizontal display start position setup command) First byte Register content DA0 to DA7 7 6 5 4 3 2 1 0 Register name — — — — — — — — State 1 0 1 1 0 0 0 0 Command 3 identification code Sets the horizontal display start position. Function Note No. 4248-7/11 LC74770M Second byte Register content DA0 to DA7 7 6 5 Register name — — HP5 (MSB) HP4 State 0 0 0 1 0 1 0 1 0 1 0 1 0 1 If HS is the horizontal start position then: HS = Tc × (Σ 2nHPn) n=0 5 Function Second byte identification bit Note 4 3 HP3 The horizontal display start position is set by the 6 bits HP0 to HP5. The weight of bit 1 is 1Tc. 2 HP2 Tc: Period of the oscillator connected to OSCIN/OSCOUT in operating mode. 1 HP1 HP0 (LSB) 0 Note: All registers are set to 0 when the LC74770M is reset by the RST pin. 5 COMMAND 4 (Display control setup command) First byte Register content DA0 to DA7 7 6 5 4 3 Register name — — — — TST (TSTMOD) RCL (RAMCLR) OSC (OSCSTP) RST (SYSRST) State 1 1 0 0 0 1 0 1 0 1 0 1 Reset all registers and turn the display off. Erase display RAM (Data is set to 7F hexadecimal.) Do not stop the LC oscillator circuit. Stop the LC oscillator circuit. Normal operating mode Test mode This bit must be zero. Command 4 identification code Sets up display control. Function Note 2 Valid when display is off. 1 This bit must be zero. The LSI is reset when the CS pin is low, and the reset is cleared when that pin goes high. 0 No. 4248-8/11 LC74770M Second byte Register content DA0 to DA7 7 6 Register name — MD1 State 0 0 1 0 1 0 1 0 1 0 2 BK0 1 1 RV DSP (DSPON) 0 1 0 1 Blinking on Reverse video off Reverse video on Character display off Character display on Function Second byte identification bit The blank output also outputs character data. The blank output only outputs blank data. The system 1 output outputs all lines. The system 1 output only outputs lines not output by system 2. Border off Border on Blinking period set to about 0.5 second. Blinking period set to about 1 second. Blinking off Blinking period switching Blinking of reverse video characters consists of alternation between normal and reverse video. Blank output control Note 5 MD0 Output system 1 control 4 EG 3 BK1 0 Note: All registers are set to 0 when the LC74770M is reset by the RST pin. 6 COMMAND 5 (System 2 output control and line size setting command) First byte Register content DA0 to DA7 7 6 5 4 3 2 1 0 Register name — — — — — — — LS State 1 1 0 1 0 0 0 0 1 Output line selection Character size selection (line units) The line is selected in the second byte. Function Command 5 identification code Controls output system 2 and sets the line size. (Output control for CHA2 and BLK2) (Line size control) Note Second byte Register content DA0 to DA7 7 6 5 Register name — — LN6 State 0 0 0 1 0 1 0 1 0 1 0 1 0 1 The sixth line of data is not output to CHA2 and BLK2. The sixth line of data is output to CHA2 and BLK2. The fifth line of data is not output to CHA2 and BLK2. The fifth line of data is output to CHA2 and BLK2. The fourth line of data is not output to CHA2 and BLK2. The fourth line of data is output to CHA2 and BLK2. The third line of data is not output to CHA2 and BLK2. The third line of data is output to CHA2 and BLK2. The second line of data is not output to CHA2 and BLK2. The second line of data is output to CHA2 and BLK2. The first line of data is not output to CHA2 and BLK2. The first line of data is output to CHA2 and BLK2. Used for the line output setting when LS is low. Used for the line size setting when LS is high. Note: LS = 1: Set the line size. LS = 0: Specifies line output. Function Second byte identification bit Note 4 LN5 3 LN4 2 LN3 1 LN2 0 LN1 Note: All registers are set to 0 when the LC74770M is reset by the RST pin. No. 4248-9/11 LC74770M 7 COMMAND 6 (System 2 output control and general-purpose port setting command) First byte Register content DA0 to DA7 7 6 5 4 3 Register name — — — — P3 State 1 1 1 0 0 1 0 1 0 1 0 1 Function Command 6 identification code Controls output system 2 output. (Output control for CHA2 and BLK2) (General-purpose port output control) Sets the general-purpose port output (P3) to low. Sets the general-purpose port output (P3) to high. Sets the general-purpose port output (P2) to low. Sets the general-purpose port output (P2) to high. Sets the general-purpose port output (P1) to low. Sets the general-purpose port output (P1) to high. Sets the general-purpose port output (P0) to low. Sets the general-purpose port output (P0) to high. Note 2 P2 1 P1 0 P0 Second byte Register content DA0 to DA7 7 6 5 Register name — — LN12 State 0 0 0 1 0 1 0 1 0 1 0 1 0 1 The twelfth line of data is not output to CHA2 and BLK2. The twelfth line of data is output to CHA2 and BLK2. The eleventh line of data is not output to CHA2 and BLK2. The eleventh line of data is output to CHA2 and BLK2. The tenth line of data is not output to CHA2 and BLK2. The tenth line of data is output to CHA2 and BLK2. The ninth line of data is not output to CHA2 and BLK2. The ninth line of data is output to CHA2 and BLK2. The eighth line of data is not output to CHA2 and BLK2. The eighth line of data is output to CHA2 and BLK2. The seventh line of data is not output to CHA2 and BLK2. The seventh line of data is output to CHA2 and BLK2. Used for the line output setting when LS is low. Used for the line size setting when LS is high. Note: LS = 1: Set the line size. LS = 0: Specifies line output. Function Second byte identification bit Note 4 LN11 3 LN10 2 LN9 1 LN8 0 LN7 Note: All registers are set to 0 when the LC74770M is reset by the RST pin. No. 4248-10/11 LC74770M Display Screen Structure The display consists of 12 lines of 24 characters each and thus up to 288 characters can be displayed. Display memory addresses are specified as row (0 to B hexadecimal) and column (0 to 17 hexadecimal) addresses. Display Screen Structure (display memory addresses) s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. s Anyone purchasing any products described or contained herein for an above-mentioned use shall: Œ Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use:  Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of March, 1996. Specifications and information herein are subject to change without notice. PS No. 4248-11/11