LC74900

Ordering number : ENA2000 CMOS IC LC74900 Overview Silicon gate LCD PROCESSOR LSI for small size display LC74900 is a highly integrated multi-purpose LCD Panel (up to WVGA) controller processing analog and digital video signal. It contains A/D converter, video decorder, De-interlacer/Scaler, and picture improvement. Features (1) Video Input/Output • Analog input: 4ch CVBS (NTSC, PAL, and SECAM) with 1ch 10bit A/D converter • Digital input: 24bit RGB and YCbCr, 16bit YCbCr (4:2:2), and 8bit YC (BT.656) • Digital output: 8bit video decoder output (BT.656) (2) YC separation video decoder • Adaptive 3line comb filter, automatic gain and chrominance control (3) De-interlacer and Scaler • Horizontal and vertical programmable scaler separately, and supports panels up to WVGA resolutions (4) Picture Improvements • CDEX (Color Depth Expander): high quality expansion for low-resolution graphics • Dynamic gamma correction: picture adapted automatic luminance control • Sharpness control, LTI and CTI: peaking enhancement without glares • Color exciter: 6 phases RGBYMC gain control separately (5) Panel interface • 24bit RGB output and 18bit RGB output with dithering process • Pulse Width Modulation for automatic LED backlight control • Timing conroller for LCD driver with horizontal or vertical reversing signals • Pin swapping : replace output pin assignment of the RGB channel or bit Continued on next page. Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment. The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for new introduction or other application different from current conditions on the usage of automotive device, communication device, office equipment, industrial equipment etc. , please consult with us about usage condition (temperature, operation time etc.) prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' s products or equipment. 30712HKPC 20120113-S00002,S00003 No.A2000-1/14 LC74900 Continued from preceding page. (6) On Screen Display • Built-in OSD controller with integrated font ROM, which contains 501 fonts, and fomt RAM, which contains 8 fonts • Character Numbers displayed on the screen: 24 characters by 8 rows, 24 characters by 10 rows, or 32 characters by 8 rows • Character Size: 16 pixels wide by 20 pixels high • Character Colors: 8 font colors for each character, 8 back colors for each character, and 8 font border colors for each row • Inverting font colors and back colors each character, Blinking fonts each character, and Fringing each row • Pin assignment for an optional external OSD controller: 24bit, 18bit, 12bit, and 6bit RGB (7) EEPROM booting • Quick boot from an external EEPROM in power on sequence before starting a system controller • Waiting timer between data transfers • Verifying boot datas • EEPROM Size: Up to 512K bits with I2C or SPI interface (8) Parallel data outputs, panel interface and video decorder output • Reentering video decoder outputs, which are processed by an external graphic engine as digital inputs (9) System Controller Interface • SPI (Max 1Mbit/s) or I2C bus (100Kbit/s or 400Kbit/s) LSI Specification • Supply voltage: 1.5V (core), 3.3V (IO) • Maximum operation frequency: 60MHz (video processing) • Package: 120pin TQFP Applications • For mediam or small size LCD Panel • Automobile use: car TV, portable navigation, etc. • Home use: Photo Frame, Portable DVD, Door Phone, etc. No.A2000-2/14 LC74900 Specifications Absolute Maximum Ratings at Ta = 25°C, DVSS = 0V, ADC0AVSS = 0V, ADC1AVSS = 0V, PLLAVSS = 0V, XVSS = 0V Parameter Maximum supply voltage (I/O) Symbol DVDD33 XVDD33 DVDD3318 Maximum supply voltage (Analog) Maximum supply voltage (Core) Digital input voltage ADC0AVDD33 ADC1AVDD33 PLLAVDD33 DVDD15 VI -0.3 to +1.8 -0.3 to DVDD33+0.3 -0.3 to DVDD3318+0.3 VI (5V Tolerant) Digital output voltage VO Ta = 85°C, With evaluation board* -0.3 to +5.6 -0.3 to DVDD33+0.3 -0.3 to DVDD3318+0.3 Maximum allowable loss Operating temperature Storage temperature Pd max Topr Tstg 0.7 -40 to +85 -55 to +125 V W °C °C V V -0.3 to +3.96 V Conditions Ratings unit -0.3 to +3.96 V *: Board size: 150mm × 150mm × 1.6mm, FR-4, 6layers Allowable Operation Ranges at Ta = -40 to +85°C, DVSS = 0V, ADC0AVSS = 0V, ADC1AVSS = 0V, PLLAVSS = 0V, XVSS = 0V Parameter Supply voltage (I/O) Symbol DVDD33 XVDD33 DVDD3318 Conditions min 3.15 3.15 1.7 Supply voltage (Analog) ADC0AVDD33 ADC1AVDD33 PLLAVDD33 Supply voltage (Core) Input voltage range Input voltage range (5V Tolerant) DVDD15 VIN VIN5 3.15 1.4 0 3.3 1.5 3.45 1.6 DVDD33 DVDD3318 5.5 V V V V typ 3.3 3.3 1.8 max 3.45 3.45 1.9 unit V V V 0 No.A2000-3/14 LC74900 DC Characteristics at Ta = -40 to +85°C, DVSS = 0V, ADC0AVSS = 0V, ADC1AVSS = 0V, PLLAVSS = 0V, XVSS = 0V, DVDD33 = 3.15V to 3.45V, DVDD3318 = 3.15V to 3.45V or 1.7V to 1.9V, DVDD15 = 1.42V to 1.58V, XVDD33 = 3.15V to 3.45V, ADC0AVDD = 3.15V to 3.45V, ADC1AVDD = 3.15V to 3.45V, PLLAVDD = 3.15V to 3.45V Parameter Input high-level voltage Symbol VIH Conditions CMOS level inputs CMOS level Schmitt inputs Input low-level voltage VIL CMOS level inputs CMOS level Schmitt inputs Input high-level current IIH VI = DVDD33 VI = DVDD3318 Input low-level current Output high-level voltage IIL VOH VI = DVSS Type B: IOH = -4mA Type G: IOH = -6mA DVDD3318 = 3.15V to 3.45V Type J: IOH = -4mA Type K: IOH = -6mA DVDD3318 = 1.7V to 1.9V Type J: IOH = -3mA Type K: IOH = -5mA Output low-level voltage Output leakage current Operating current drain VOL IOZ IDDOP CMOS When in high-impedance output mode Output open, tck = 9MHz, 10steps Ta = 25°C, DVDD33 = 3.3V, DVDD3318 = 3.3V, XVDD = 3.3V, DVDD15 = 1.5V, ADC0AVDD = 3.3V, ADC1AVDD = 3.3V, PLLAVDD = 3.3V Output open, tck = 33MHz, 10steps Ta = 25°C, DVDD33 = 3.3V, DVDD3318 = 3.3V, XVDD = 3.3V, DVDD15 = 1.5V, ADC0AVDD = 3.3V, ADC1AVDD = 3.3V, PLLAVDD = 3.3V Static current drain IDDST Output open, tck: stop VI = DVSS, Ta = 25°C, DVDD33 = 3.3V, DVDD3318 = 1.8V, XVDD = 3.3V, DVDD15 = 1.5V, ADC0AVDD = 3.3V, ADC1AVDD = 3.3V, PLLAVDD = 3.3V 34 μA 139 mA 95 mA -10 0.4 10 V μA DVDD3318-0.4 V DVDD3318-0.6 V DVDD33-0.6 min 0.7DVDD33 0.7DVDD3318 0.7DVDD33 0 0 0.3DVDD33 0.3DVDD3318 0.3DVDD33 typ max unit V V V V μA μA μA V No.A2000-4/14 LC74900 Package Dimensions unit : mm (typ) 3257A 16.0 14.0 120 1 0.4 (1.2) 1.2MAX (1.0) 0.15 14.0 16.0 0.125 0.1 SANYO : TQFP120(14X14) 0.5 No.A2000-5/14 LC74900 Pin Assignment 120 115 110 105 100 DVDD15 XRST XPDWN GP0 GP1 GP2 DVDD33 DVSS SCK_SCL SRXD_SDA STXD SCS_I2SEL SIOSEL MODE2 MODE3 TEST REFPKV VRT REFNKV VRB ADC0AVDD33 AIN4 ADC0AVSS33 AIN3 ADC1AVDD33 AIN2 ADC1AVSS33 AIN1 SVO LPFO 95 DCRIN7 DCRIN6 DCRIN5 DCRIN4 DVSS DCKO2 DVDD3318 DCRIN3 DCRIN2 DCRIN1 DCRIN0 DVDD15 GRST FLM OE CPV STRB SP DVDD33 POL PWM DEXR DDEO DVSO DVSS DHSO DGOUT7 DGOUT6 DGOUT5 DGOUT4 90 5 85 10 80 Top View 15 LC74900 75 20 70 25 65 30 35 40 45 50 55 60 DGOUT3 DGOUT2 DGOUT1 DGOUT0 DBOUT7 DBOUT6 DVDD33 DBOUT5 DBOUT4 DBOUT3 DBOUT2 DBOUT1 DVDD15 DBOUT0 DROUT7 DROUT6 DROUT5 DROUT4 DVSS DCKO1 DVDD33 DROUT3 DROUT2 DROUT1 DROUT0 DVSS DYGIN7 DYGIN6 DYGIN5 DYGIN4 PLLAVDD33 PDO PLLAVSS33 XVDD33 XTALI XTALO XVSS DVDD15 MODE0 DCKI MODE1 XMUTE INTO DDEI DVSI DHSI DVDD33 DCBIN0 DCBIN1 DCBIN2 DCBIN3 DCBIN4 DCBIN5 DVSS DCBIN6 DCBIN7 DYGIN0 DYGIN1 DYGIN2 DYGIN3 No.A2000-6/14 LC74900 Block Diagram LC74900 AIN1 1ch 10bit ADCs & AFE Video Decoder AIN3 AIN4 MUX AIN2 Picture Quality Improvement DGOUT[7:0] DBOUT[7:0] DROUT[7:0] OSD Mix DHSO/SP2 DVSO/FLM2 DDEO DCKO GRST FLM OE CPV STRB SP LCD Back Light Controler DEXR POL DYGIN[7:0] DCBIN[7:0] DCRIN[7:0] De-Interlacer & Scaler OSD DDEI DCKI XRST PLL SPI/ 2 IC MUX DVSI Timing Controler DHSI PANEL Protection PWM TCON PWM SCK_SCL SRXD_SDA STXD SCS_I2SEL MPU EEPROM XMUTE XTALI XTALO INTO No.A2000-7/14 LC74900 Pin Functions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 I/O format Pin symbol I/O DVDD15 XRST XPDWN GP0 GP1 GP2 DVDD33 DVSS SCK_SCL SRXD_SDA STXD SCS_I2SEL SIOSEL MODE2 MODE3 TEST REFPKV VRT REFNKV VRB ADC0AVDD33 AIN4 ADC0AVSS33 AIN3 ADC1AVDD33 AIN2 ADC1AVSS33 AIN1 SVO LPFO PLLAVDD33 PDO PLLAVSS33 XVDD33 XTALI XTALO XVSS DVDD15 MODE0 DCKI MODE1 XMUTE INTO DDEI DVSI DHSI DVDD33 DCBIN0 DCBIN1 DCBIN2 P I I I/O I/O I/O P P I/O I/O I/O I I I I I I I I I P I P I P I P I O O P O P P I O P P I I I I I/O I I I P I I I Format A A B B B C C B A D D D D E E E E E E E E E E F F D D D A B D D D D D D GND IO voltage CMOS CMOS GND Core voltage CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS IO voltage CMOS CMOS CMOS Analog voltage GND Analog voltage GND Analog voltage Core voltage CMOS CMOS CMOS CMOS CMOS IO voltage GND CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Analog Analog Analog Analog Analog Analog Analog Analog Analog Analog Analog Analog Analog Analog Analog Analog Analog Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 XVDD33 XVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 Connected to Digital IO power supply Power supply for core (1.5V) Reset pin (active at a low voltage level) Fixed at a high voltage level Input: Digital input/OSD enable (pull down if not used) Output: Global port/Video decoder Vsync Input: Digital input/OSD halftone (pull down if not used) Output: Global Port/Video DecoderHsync Global port output Power supply for IO (3.3V) GND for digital I2C: I2C Clock inout, SPI: Clock input I2C: data inout, SPI: data input SPI: data output I2C: Select I2C slave address, SPI: Chip select Select CPU I/F, ”L”: I2C, ”H”: SPI Operation mode control Operation mode control For production test (Fixed at a low voltage level) Top reference level Buffer-AMP input for ADC Top reference level for ADC Bottom reference level Buffer-AMP input for ADC Bottom reference level for ADC Power supply for ADC (3.3V) CVBS input 4 GND for ADC CVBS input 3 Power supply for ADC (3.3V) CVBS input 2 GND for ADC CVBS input 1 AFE output External AGC control level Power supply for PLL (3.3V) Test port for PLL (Open) GND for PLL Power supply for 27MHz X’tal (3.3V) 27MHz X’tal input 27MHz X’tal output GND for 27MHz X’tal Power supply for core (1.5V) Operation mode control Digital video clock Operation mode control Mute control (active at a low voltage level) Interrupt output Digital video enable/OSD enable Digital video Vsync/OSD half tone Digital video Hsync Power supply for IO (3.3V) Digital video input/OSD input (pull down if not used) Digital video input/OSD input (pull down if not used) Digital video input/OSD input (pull down if not used) Remarks Continued on next page. No.A2000-8/14 LC74900 Continued from preceding page. Pin No. 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 I/O format Pin symbol I/O DCBIN3 DCBIN4 DCBIN5 DVSS DCBIN6 DCBIN7 DYGIN0 DYGIN1 DYGIN2 DYGIN3 DYGIN4 DYGIN5 DYGIN6 DYGIN7 DVSS DROUT0 DROUT1 DROUT2 DROUT3 DVDD33 DCKO1 DVSS DROUT4 DROUT5 DROUT6 DROUT7 DBOUT0 DVDD15 DBOUT1 DBOUT2 DBOUT3 DBOUT4 DBOUT5 DVDD33 DBOUT6 DBOUT7 DGOUT0 DGOUT1 DGOUT2 DGOUT3 DGOUT4 DGOUT5 DGOUT6 DGOUT7 DHSO DVSS DVSO DDEO DEXR I I I P I I I I I I I I I I P I/O I/O I/O I/O P O P I/O I/O I/O I/O I/O P I/O I/O I/O I/O I/O P I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O P I/O I/O I/O B B B B B B B B B B B B B B B B B B B B B B B B G B B B B D D D D D D D D D D Format D D D CMOS CMOS CMOS GND CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS GND CMOS CMOS CMOS CMOS IO voltage CMOS GND CMOS CMOS CMOS CMOS CMOS Core voltage CMOS CMOS CMOS CMOS CMOS IO voltage CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS GND CMOS CMOS CMOS Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 Connected to Digital IO power supply DVDD33 DVDD33 DVDD33 Digital video input/OSD input (pull down if not used) Digital video input/OSD input (pull down if not used) Digital video input/OSD input (pull down if not used) GND for digital Digital video input/OSD input (pull down if not used) Digital video input/OSD input (pull down if not used) Digital video input/OSD input (pull down if not used) Digital video input/OSD input (pull down if not used) Digital video input/OSD input (pull down if not used) Digital video input/OSD input (pull down if not used) Digital video input/OSD input (pull down if not used) Digital video input/OSD input (pull down if not used)) Digital video input/OSD input (pull down if not used) Digital video input/OSD input (pull down if not used) GND for digital Panel R output (LSB) (input port in test mode) Panel R output (input port in test mode) Panel R output (input port in test mode) Panel R output (input port in test mode) Power supply for IO (3.3V) Panel clock output GND for digital Panel R output (input port in test mode) Panel R output (input port in test mode) Panel R output (input port in test mode) Panel R output (MSB) (input port in test mode) Panel B output (LSB) (input port in test mode) Power supply for core (1.5V) Panel B output (input port in test mode) Panel B output (input port in test mode) Panel B output (input port in test mode) Panel B output (input port in test mode) Panel B output (input port in test mode) Power supply for IO (3.3V) Panel B output (input port in test mode) Panel B output (MSB) (input port in test mode) Panel G output (LSB) (input port in test mode) Panel G output (input port in test mode) Panel G output (input port in test mode) Panel G output (input port in test mode) Panel G output (input port in test mode) Panel G output (input port in test mode) Panel G output (input port in test mode) Panel G output (MSB) (input port in test mode) Panel Hsync/Start pulse for source driver/ Video decoder Vsync output (input port in test mode) GND for digital Panel Vsync/Start pulse for gate driver/ Video decoder Vsync output (input port in test mode) Panel enable output (input port in test mode) Invert control signal for DTR/ Video decorer output 1[7](BT.656) (input port in test mode) Remarks Continued on next page. No.A2000-9/14 LC74900 Continued from preceding page. Pin No. 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 I/O format Pin symbol I/O PWM POL DVDD33 SP STRB CPV OE FLM GRST DVDD15 DCRIN0 DCRIN1 DCRIN2 DCRIN3 DVDD3318 DCKO2 DVSS DCRIN4 DCRIN5 DCRIN6 DCRIN7 I/O I/O P I/O I/O I/O I/O I/O I/O P I/O I/O I/O I/O P O P I/O I/O I/O I/O H H H H J H H H H B B B B B B Format B B CMOS CMOS IO voltage CMOS CMOS CMOS CMOS CMOS CMOS Core voltage CMOS CMOS CMOS CMOS IO voltage CMOS GND CMOS CMOS CMOS CMOS Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital Digital DVDD3318 DVDD3318 DVDD3318 DVDD3318 DVDD3318 DVDD3318 DVDD3318 DVDD3318 DVDD3318 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 DVDD33 Connected to Digital IO power supply DVDD33 DVDD33 Pulse width modulation (input port in test mode) Polarity control for source driver/ Video decoder output 1[6] (BT.656) (input port in test mode) Power supply for IO (3.3V) Start pulse for source driver/ Video decoder output 1[5] (BT.656) (input port in test mode) Data stroboscope for source driver/ Video decoder output 1[4] (BT.656) (input port in test mode) Clock for gate driver/ Video decoder output 1[3] (BT.656) (input port in test mode) Output enable for gate driver/ Video decoder output 1[2] (BT.656) (input port in test mode) Start pulse for gate driver/ Video decoder output 1[1] (BT.656) (input port in test mode) Reset for gate driver/ Video decoder output1[0] (BT.656) (input port in test mode) Power supply for core (1.5V) Input: Digital video input/OSD input (pull down if not used) Output: Video decoder output 2[0] (BT.656) Input: Digital video input/OSD input (pull down if not used) Output: Video decoder output 2[1] (BT.656) Input: Digital video input/OSD input (pull down if not used) Output: Video decoder output 2[2] (BT.656) Input: Digital video input/OSD input (pull down if not used) Output: Video decoder output 2[3] (BT.656) Power supply for IO (3.3V/1.8V) Video decoder clock output GND for digital Input: Digital video input/OSD input (pull down if not used) Output: Video decoder output 2[4] (BT.656) Input: Digital video input/OSD input (pull down if not used) Output: Video decoder output 2[5] (BT.656) Input: Digital video input/OSD input (pull down if not used) Output: Video decoder output 2[6] (BT.656) Input: Digital video input/OSD input (pull down if not used) Output: Video decoder output 2[7] (BT.656) Remarks No.A2000-10/14 LC74900 Pin Type I/O type A Function Schmitt trigger CMOS input Equivalent circuit Applicable pins XRST,XPDWN,SCS_I2SEL,XMUTE B 8mA 3-STATE drive CMOS I/O GP0,GP1,GP2,STXD,INTO, DROUT0,DROUT1,DROUT2,DROUT3, DROUT4,DROUT5,DROUT6,DROUT7, DBOUT0,DBOUT1,DBOUT2,DBOUT3, DBOUT4,DBOUT5,DBOUT6,DBOUT7, DGOUT0,DGOUT1,DGOUT2,DGOUT3, DGOUT4,DGOUT5,DGOUT6,DGOUT7 DVSO,DHSO,DDEO,DEXR, PWM,POL,SP,STRB, CPV,OE,FLM,GRST C 8mA OpenDrain output CMOS input* SCK_SCL,SRXD_SDA D CMOS input SIOSEL,MODE2,MODE3,TEST,MODE0, DCKI,MODE1,DDEI,DVSI,DHSI, DCBIN0,DCBIN1,DCBIN2,DCBIN3, DCBIN4,DCBIN5,DCBIN6,DCBIN7, DYGIN0,DYGIN1,DYGIN2,DYGIN3, DYGIN4,DYGIN5,DYGIN6,DYGIN7 E Analog I/O REFPKV,VRT,REFNKV,VRB,AIN4, AIN3,AIN2,AIN1,SVO,LPFO F Oscillator circuit I/O XTALI,XTALO G 12mA 3-STATE drive CMOS output DCKO1 H 3.3V: 8mA 1.8V: 3mA 3-STATE drive CMOS I/O DCRIN0,DCRIN1,DCRIN2,DCRIN3, DCRIN4,DCRIN5,DCRIN6,DCRIN7 J 3.3V: 12mA 1.8V: 5mA 3-STATE drive CMOS output DCKO2 No.A2000-11/14 LC74900 I/O Data Timing (1) Input data timing tHI DCKI tSU tHD tLI tCK DVDD33/2 Input data DVDD33/2 Pin name Parameter Symbol tCK min 16.7 typ max unit ns Clock cycle DCKI Duty Input data setup time DCRIN*, DYGIN*, DCBIN*, DVSI, DHSI, DDEI (DVDD33 = 3.15V to 3.45V) (DVDD3318 = 3.15V to 3.45V) Input data hold time (DVDD33 = 3.15V to 3.45V) (DVDD3318 = 3.15V to 3.45V) 50 % tSU 3 ns tHD 2 ns * The recommended duty ratio of input clock is 50% (2) Output data timing tHO DCKO1 tAC tLO tCK DVDD33/2 Output data DVDD33/2 Pin name Parameter Symbol tCK min 16.7 typ max unit ns Clock cycle DCKO1 DROUT*, DGOUT*, DBOUT* DVSO, DHSO, DDEO, DEXR, POL, SP, STRB, CPV, OE, FLM, GRST Duty Output data delay time DVDD33 = 3.15V to 3.45V 50 % tAC -3 3 ns * DCKO1 output is not inverted. Output capacitance: 15pF tHO DCKO2 tAC tLO tCK DVDD3318/2 Output data DVDD3318/2 Pin name Parameter Symbol tCK min 37 typ max unit ns Clock cycle DCKO2 DCRIN*, DEXR, POL, SP STRB, CPV, OE, FLM, GRST, GP0, GP1, DVSO, DHSO DCRIN* Duty Output data delay time DVDD3318 = 3.15V to 3.45V DVDD33 = 3.15V to 3.45V Output data delay time DVDD3318 = 1.7V to 1.9V 50 % tAC -3 3 ns tAC -6 6 ns * DCKO1 output is not inverted. Output capacitance: 15pF No.A2000-12/14 LC74900 Connection Example of Parallel Output Mode (Panel/Video Decoder) * For details, see Application Note. CVBS 0.1μF A3.3V Ferrite AIN1 AIN2 AIN3 AIN4 open INTO CVBS input (4 to 1 select) PWM GRST FML OE CPV STRB SP POL DEXR DCKO1 DDEO DVSO DHSO DROUT0 DROUT1 DROUT2 DROUT3 DROUT4 DROUT5 DROUT6 DROUT7 DBOUT0 DBOUT1 DBOUT2 DBOUT3 DBOUT4 DBOUT5 DBOUT6 DBOUT7 DGOUT0 DGOUT1 DGOUT2 DGOUT3 DGOUT4 DGOUT5 DGOUT6 DGOUT7 A3.3V XMUTE XRST PLLAVDD33 open PDO PLLAVSS33 AGND XPDWN CL1 XTALI CL2 XTALO Rd DGND 27MHz fundamental Crystal Oscillator DVSS33 DGND DVDD3318 DVDD33 DVDD15 D3.3V or 1.8V D3.3V D1.5V Ferrite Ferrite Ferrite Digital power supply Ferrite PLL connection (Power supply, etc.) LCD backlight control Interrupt output AGND ADC connection (Power supply, Filter, etc.) 0.1μF AGND 10μF 0.1μF 10μF AGND SVO ADC0AVDD33 ADC1AVDD33 ADC0AVSS33 ADC1AVSS33 LPFO TCON REFPKV VRT VRB REFNKV Sync clock output Video decoder output ITU-R BT.656 8bit 8 DCKO2 DCRIN0-7 8 8 Digital video RGB 18bit input Panel output (R) (*)if 6bit outputs, DROUT1-0 is opened DCBIN0-7 DYGIN0-7 GP0 GP1 DCKI DDEI DVSI DHSI TEST Panel output (B) (*)if 6bit outputs, DROUT1-0 is opened DGND Operation mode control D3.3V MODE3 MODE2 MODE1 MODE0 SIOSEL GP2 SCS_I2SEL STXD SRXD_SDA SCK_SCL Panel output (G) (*)if 6bit outputs, DROUT1-0 is opened I2C bus interface Mute control (Active low level) Reset (Active low level) D3.3V No.A2000-13/14 LC74900 SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of March, 2012. Specifications and information herein are subject to change without notice. PS No.A2000-14/14