LC75100M

Ordering number : ENA1021 CMOS IC LC75100M Overview Digital Echo IC with Microphone Amplifier Circuit The LC75100M is a digital echo IC that incorporates a microphone amplifier and is ideal for use in minicompo and other audio systems. Functions • Digital echo IC incorporating a microphone amplifier. Specitications Absolute Maximum Rating at Ta = 25°C, VSS = 0V Parameter Maximum supply voltage Allowable power dissipation Operating ambient temperature Storage ambient temperature Symbol VDD max Pd max Topr Tstg VDD Ta≤70°C Pin Name Conditions Ratings 10.5 350 -20 to +70 -40 to +125 Unit V mW °C °C Allowable Operating Ranges (Operating Conditions) at Ta = 25°C Parameter Recommended supply voltage Operating supply voltage range Input high-level voltage Input low-level voltage Input pulse width Hold time Operating frequency VDD VDDopg VIH VIL tφW thold fopg Symbol VDD VDD 8.0 2.0 0 1.0 1.0 500 Pin Name min typ 9.0 10.0 3.5 0.5 V V μs μs kHz max unit V Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 31908HKIM 20071227-S00002 No.A1021-1/14 LC75100M Electrical Characteristics at Ta=25°C, VDD=9.0V, fin=1kHz, RL=10kΩ Parameter Quiescent current Clock frequency Symbol IDDO FCLK VDD OSC OSC Ex.R=22kΩ Mic-AMP NF Ex.R=0Ω Mic-AMP NF Ex.R=6.2kΩ Mic Gain=+36dB, THD=1%, ALC=OFF Total harmonic distortion 1 Total harmonic distortion 2 Output noise voltage Input impedance ALC attack time ALC release time THDM1 THDM2 VNOM ZiM TaA TaR Mic Gain=+36dB, ALC=OFF, VO=-10dBV Mic Gain=+36dB, ALC=ON, VO=-10dBV, VIN=0dBV Mic Gain=+36dB, JIS-A 37 1.82 Pin Conditions min typ 13 2.6 max 60 3.38 unit mA MHz Mic-AMP (Input=MICIN1/MICIN2, Output=MICOUT1/MICOUT2, VIN=-46dBV, VALC=VREF–1.414V, Mic-AMP NF Ex.R=6.2kΩ) Mic gain 1 Mic gain 2 Maximum output voltage VGM1 VGM2 VoTM +50 +33 1.75 0.3 1.5 -60 50 30 1.0 1.0 2.0 -55 62 +53 +36 +56 +39 dB dB Vrms % % dBV kΩ ms s Digital Echo (Input=IN1/IN2, Output=ECHOOUT, VIN=-10dBV, Delay Time=100ms, Mic volume 1/2=0dB, feedback volume=-∞) Delay time Output level deviation Maximum output voltage Total harmonic distortion Output noise voltage DT VGE VoE THDE VNOE ECHOOUT ECHOOUT ECHOOUT ECHOOUT ECHOOUT THD=10% Filter=A Filter Filter=A Filter FCLK=2.6MHz +2.5 1.5 0.5 -65 2.0 -55 100 +5.5 +8.5 ms dB Vrms % dBV Stereo Line (Input=LCHIN/RCHIN, Output=LCHOUT/RCHOUT, VIN=-10dBV, Line select=STEREO, Mic volume 1/2=ECHO volume=-∞) Output level deviation Maximum output voltage Total harmonic distortion Output noise voltage Vocal removal rate VGS VoS THDS VNOS VC LCHOUT/RCHOUT LCHOUT/RCHOUT LCHOUT/RCHOUT LCHOUT/RCHOUT LCHOUT/RCHOUT VIN=-10dBV THD=1% JIS-A, Stereo out JIS-A, ECHO OFF JIS-A, VIN=-10dBV -20 -2.5 1.5 0.03 -85 -18 0.1 -75 -16 -0.5 +1.5 dB Vrms % dBV dB Package Dimensions unit : mm (typ) 3263 15.2 36 19 10.5 7.9 1 (0.8) 0.8 0.3 18 0.25 SANYO : MFP36SDJ(375mil) 0.1 (2.25) 2.45max 0.65 No.A1021-2/14 LC75100M Pin Assignment VALC MICIN1 ALC1 MICNF1 MICOUT1 IN1 MICIN2 ALC2 MICNF2 MICOUT2 IN2 AAF1 AAF2 AAF3 GND CE DI CL 1 2 3 4 5 6 7 8 9 36 35 34 33 32 31 30 29 28 VDD LCHIN RCHIN FILTER SELOUT SELIN RCHOUT LCHOUT ECHOIN ECHOOUT LPF2 LPF1 D/A A/D NF VREF DC3V OSC Top view LC75100M 10 11 12 13 14 15 16 17 18 27 26 25 24 23 22 21 20 19 No.A1021-3/14 LC75100M System Configuration Diagram Key Control LC75100M Lch Vocal Cut Rch + Rch + Lch Mic1 Mic AMP Mic Volume + Mic Volume Mic AMP Mic2 + Digital ECHO ECHO Volume FEED Back Volume Block Diagram Rch Input Lch Input Rch output Lch output VCC 36 35 34 31 29 28 27 25 22 21 33 Selecter (Lch Mono) (Rch Mono) (L+R) (Vocal Cut) 32 30 26 24 23 20 19 LPF D/A A/D + Logic SRAM (16k_Bit) + + ECHO Volume Feed back Volume Mic Volume ALC Control Voltage Mic AMP Mic AMP Mic Volume + + LPF ALC 1 2 3 4 5 6 7 ALC 8 9 10 11 12 13 14 15 16 17 18 Mic Input1 Mic Input2 CL DA CE Analog GND No.A1021-4/14 LC75100M Pin Description Pin No. 1 2 7 Pin Name VALC MICIN1 MICIN2 1/2 VDD Voltage Internal Equivalent Circuit Description ALC detection voltage setting pin Mic signal input 1 Mic signal input 2 3 8 ALC1 ALC2 Auto level control pin 1 Auto level control pin 2 4 9 MICNF1 MICNF2 1/2 VDD Mic feedback signal input pin 1 Mic feedback signal input pin 2 5 10 MICOUT1 MICOUT2 1/2 VDD Mic signal output pin 1 Mic signal output pin 2 6 11 28 IN1 IN2 ECHOIN 1/2 VDD ECHO circuit signal input pin 1 ECHO circuit signal input pin 2 ECHO signal input pin 12 13 25 26 AAF1 AAF2 LPF1 LPF2 1/2 VDD AAF input pin 1 AAF input pin 2 LPF input pin 1 13 26 LPF input pin 2 12 25 Continued on next page. No.A1021-5/14 LC75100M Continued from preceding page. Pin No. 14 Pin Name AAF3 Voltage 1/2 VDD Internal Equivalent Circuit AAF input pin 3 Description 15 16 18 GND CE CL(SCL) 0V 0V/3.3V Analog GND CCB CE pin CCB CL pin/I2C bus SCL pin 17 DI(SDA) 0V/3.3V CCB DI pin/I2C bus SDA pin 19 OSC 0V/3.3V Oscillator circuit adjustment pin 20 DC3V 3.3V Power supply for logic block 21 VREF 1/2 VDD Internal reference voltage 22 NF 1/2 VDD A/D pin Continued on next page. No.A1021-6/14 LC75100M Continued from preceding page. Pin No. 23 24 A/D D/A Pin Name Voltage 1/2 VDD Internal Equivalent Circuit A/D pin D/A pin Description 27 29 30 ECHOOUT LCHOUT RCHOUT 1/2 VDD ECHO signal output pin Lch output Rch output 31 SELIN 1/2 VDD Selector input pin 32 SELOUT 1/2 VDD Selector output pin 33 FILTER 1/2 VDD Filter input pin 1 34 35 RCHIN LCHIN 1/2 VDD Rch input pin Lch input pin 34 35 36 VDD Supply voltage No.A1021-7/14 LC75100M Control Data (Serial Data Input) Format Various settings of the LC75100M can be configured with a CCB or I2C bus. When controlling the LC75100M via an I2C bus, set and hold the CE pin at low level. (1) CCB control 1 Control register • IN1 mode Address → 0 0 1 1 1 0 0 0 M1D2 M1D1 M1D0 M2D2 M2D1 M2D0 Test3 Test2 Test1 (7) Test 0 (1) Stereo Line Data (2) Ext Key Control (3) Mic1 Volume • IN2 mode Address → 0 0 1 1 1 0 0 1 ED2 ED1 ED0 DT2 DT1 DT0 FB2 FB1 (3) Mic2 Volume FB0 0 0 0 0 0 (4) Delay Time Control (6) Feedback Volume (5) ECHO Volume 0 Test0 KEY LD2 LD1 LD0 0 0 No.A1021-8/14 LC75100M 2 Serial data input • CL: Normal Hi tEL CE tES tEH CL tSU DI B0 tHD B1 B2 B3 A0 A1 A2 A3 LD2 LD1 LD0 TEST2 TEST1 TEST0 tLC Internal data • CL: Normal Low (2) I2C bus control I2C bus register The I2C (Inter IC) bus is a bus system developed by Philips Corporation. It controls the start and stop condition with SDA (Serial Data) and SCL (Serial Clock). The outputs of these signals are of open drain type and wired OR. SCL SDA S ACK ACK P S: Start condition/P: Stop condition/ACK: Acknowledge Data is transferred MSB first. One unit is made up of 8 bits. ACK is returned by the slave for acknowledgement. The slave IC reads the data on the rising edge of SCL. The master IC changes the data on the falling edge of SCL. 1 Control registers • Slave Address MSB 0 0 1 1 1 0 0 LSB 0 Note: The LC75100M can be used in the receive only mode if the LSB is set to 0. No.A1021-9/14 LC75100M • I2C Data Function Stereo line select Mic volume control Delay time control ECHO/Feedback volume Sub Address BINARY 0000 0001 0000 0010 0000 0011 0000 1000 HEX 01 02 03 04 D7 LD2 0 0 0 D6 LD1 M2D2 DT2 FB2 D5 LD0 M2D1 DT1 FB1 D4 KEY M2D0 DT0 FB0 Data D3 0 TEST3 0 0 D2 MID2 TEST2 ED2 0 D1 MID1 TEST1 ED1 0 D0 MID0 TEST0 ED0 0 *: All test bits must be set to 0. Control Data Description (common to both CCB and I2C bus) No (1) Control Block/Data Line Select LD2 LD1 LD0 LD2 0 0 0 0 1 1 1 1 LD1 0 0 1 1 0 0 1 1 LD0 0 1 0 1 0 1 0 1 Stereo output Lch Mono output Rch Mono output L+R/2 output Vocal cut output Reserve Reserve Reserve • Determines the line output. Description Related Data (2) External key control enable/disable key • Determines the path that uses the external key control. KEY 0 1 External Key Control Disabled Enabled (3) Mic volume gain data M1D2 M1D1 M1D0 M2D2 M2D1 M2D0 • Determines the gain of mic inputs 1 and 2. M1D2 M2D2 0 0 0 0 1 1 1 1 M1D1 M2D1 0 0 1 1 0 0 1 1 M1D0 M2D0 0 1 0 1 0 1 0 1 0dB -2dB -4dB -6dB -9dB -12dB -15dB -∞ Continued on next page. No.A1021-10/14 LC75100M Continued from preceding page. No (4) Control Block/Data Delay time data DT2 DT1 DT0 DT2 0 0 0 0 1 1 1 1 DT1 0 0 1 1 0 0 1 1 DT0 0 1 0 1 0 1 0 1 OFF 75ms 100ms 125ms 150ms 175ms 200ms Reserved • Determines the echo delay time. Description Related Data (5) Echo volume gain data ED2 ED1 ED0 • Determines the gain of the echo output. ED2 0 0 0 0 1 1 1 1 ED1 0 0 1 1 0 0 1 1 ED0 0 1 0 1 0 1 0 1 0dB -2dB -4dB -6dB -9dB -12dB -15dB -∞ (6) Feedback volume gain data FB2 FB1 FB0 • Determines the volume of the echo feedback. FB2 0 0 0 0 1 1 1 1 FB1 0 0 1 1 0 0 1 1 FB0 0 1 0 1 0 1 0 1 -2dB -4dB -6dB -8dB -∞ Reserve Reserve Reserve (7) IC test data TEST3 TEST2 TEST1 TEST0 • Used for testing the IC. TEST3 to TEST0 must all be set to 0. No.A1021-11/14 [I2C Control] 220 F 1F 10k 0.1 F 10k 0.22 F 1F 2.2 F 1F 1F 6k 0.1 F 1F 1F 10k 0.22 F 1F 2.2 F 1F 1F 6k 1000pF 1000pF 4700pF 4700pF 1000pF 0.01 F 100 F 0.1 F 0.01 F 0.01 F 22k [CCB Control] Recommended Circuit (Mic-Gain=-36dB) LC75100M No.A1021-12/14 LC75100M Setting the Mic Amplifier Gain The mic amplifier gain can be adjusted by the resistors connected to pins 3 and 34. Moreover, the low frequency region can be cut off by connecting a capacitor. The mic amplifer has a built-in ALC (Auto Level Control) and the output level can be controlled by applying the reference voltage to pin 1. 2 R2 R3 + R1 5 4 R4 C1 ALC VREF 3 (1) Setting the mic AMP gain • R1=562.3kΩ, R2=1.0kΩ [When Mic Gain=45dB] R4=(R1/Mic Gain)-R2 =562.3k/177.8-1k ≈2.2kΩ (2) Determining the fc fc = 1 2π(R1 + 1k)C1 (3) Setting the ALC operating voltage 1.0Vrms 1/2 VCC+1.41V 1/2 VCC VALC = 1/2 VCC-1.41V 1/2 VCC-1.41V 0V No.A1021-13/14 LC75100M SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. 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SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of March, 2008. Specifications and information herein are subject to change without notice. PS No.A1021-14/14