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LC75347E

LC75347E

  • 厂商:

    SANYO(三洋)

  • 封装:

  • 描述:

    LC75347E - Six-Channel Single-Chip Electronic Volume Control System - Sanyo Semicon Device

  • 数据手册
  • 价格&库存
LC75347E 数据手册
Ordering number : ENN*7378 CMOS LSI LC75347E Six-Channel Single-Chip Electronic Volume Control System Preliminary Overview The LC75347E is a 6-channel 97-step electronic volume control system IC that provides a 2-channel input selector, bass and treble tone controls, external output ports, and a zero-cross volume switching function. • Built-in analog ground reference voltage generator circuit • All settings are controlled by serial data transmitted over a CCB interface. Package Dimensions unit: mm 3148A-QIP44M [LC75347E] 13.2 1.0 10.0 13.2 0.35 0.2 10.0 Functions • Volume: 0 to –95 dB (in 1 dB steps) and –∞, for a total of 97 positions. Each of the six input channels can be controlled independently. • Bass and treble: Each band can be controlled over a ±12 dB range in 2 dB steps. The bass control provides peaking characteristics and the treble control provides shelving characteristics. • Selector: 2-channel input selector • Zero cross: Provides independent zero-cross detection for each of the 6 channels and a timer overflow detection circuit. • External muting: Mute in/mute out function using zerocross detection and dedicated pins. • External output ports: Provides 4 n-channel transistor open-drain outputs. 44 1 (1.0) 0.8 Features • Built-in buffer amplifiers reduce the number of external components to a minimum. • Fabricated in a silicon-gate CMOS process for minimal noise generation from internal switches. 0.1 2.8max (2.5) SANYO: QIP44M • CCB is a trademark of SANYO ELECTRIC CO., LTD. • CCB is SANYO’s original bus format and all the bus addresses are controlled by SANYO. Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein. SANYO Electric Co.,Ltd. Semiconductor Company TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN D1503TN (OT) No. 7378 -1/17 LC75347E Specifications Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V Parameter Maximum supply voltage Symbol VDD max VIN1 max Maximum input voltage VIN2 max Output current Allowable power dissipation Operating temperature Storage temperature IOUT Pdmax Topr Tstg VDD CE, DI, CL, MUTE OUTP1 to OUTP4 FL, FR, RL, RR, C, SBW, FLTON, FRTON, FLIN, FRIN OUTP1 to OUTP4 Ta ≤ 85°C *1. When mounted on a PCB Pin Conditions Ratings 11 –0.3 to +11 V VSS – 0.3 to VDD + 0.3 0 to 1 600 –40 to +85 –50 to +125 mA mW °C °C Unit V *1: PCB dimensions: 76.1 × 114.3 × 1.6 mm, PCB materials: glass epoxy Allowable Operating Ranges at Ta = –40 to +85°C, VSS = 0 V Parameter Supply voltage High-level input voltage Low-level input voltage Symbol VDD VIH VIL VDD CL, DI, CE, MUTE OUTP1 to OUTP4 CL, DI, CE, MUTE FL, FR, RL, RR, C, SBW, FLTON, FRTON, FLIN, FRIN CL CL, DI, CE CL, DI, CE CL 7.5 ≤ VDD ≤ 10.5 4.5 ≤ VDD < 7.5 Pin Conditions Ratings min 4.5 2.5 VSS VSS VSS 1 1 1 500 typ max 10.5 10.5 0.8 0.3 VDD Unit V V V Input amplitude Input pulse width Setup time Hold time Operating frequency VIN tøW tsetup thold fopg Vp-p µs µs µs kHz Electrical Characteristics at Ta = 25°C, VDD = 9 V, VSS = 0 V Parameter [Volume and Selector Blocks] Input resistance [Treble Band Equalizer Control Block] Control range Step resolution Internal feedback resistance [Bass Band Equalizer Control Block] Control range Step resolution Internal feedback resistance [Output Port Block] Low-level output voltage V0 OUTP1 to OUTP4 Rh = 10 kΩ, Vd = 5 V 0.5 V Geq Estep Rfeed max. boost/cut ±10 1 ±12 2 38.9 ±14 3 dB dB kΩ Geq Estep Rfeed max. boost/cut ±10 1 ±12 2 51.7 ±14 3 dB dB kΩ Rin FL, FR, RL, RR, C, SBW, FLTON, FRTON, FLIN, FRIN 50 kΩ Symbol Pin Conditions Ratings min typ max Unit Continued on next page. No. 7378 -2/17 LC75347E Continued from preceding page. Parameter [Overall Characteristics] Total harmonic distortion (RL, RR, C and SBW inputs, direct output) Total harmonic distortion (FL and FR inputs, direct output) THD1 VIN = 1 Vrms, f = 1 kHz, 80 kHz LPF Flat overall VIN = 1 Vrms, f = 1 kHz, 80 kHz LPF Flat overall FL and FR selected, direct output VIN = 1 Vrms, f = 1 kHz, 80 kHz LPF Flat overall FLTON and FRTON selected, output after passing though tone controls. 80 kHz LPF, Rg = 1 kΩ All controls flat overall A-WIGHT, Rg = 1 kΩ All controls flat overall 80 kHz LPF, Rg = 1 kΩ All controls flat overall A-WIGHT, Rg = 1 kΩ All controls flat overall 80 kHz LPF, Rg = 1 kΩ All controls flat overall A-WIGHT, Rg = 1 kΩ All controls flat overall VIN = 1 Vrms, f = 1 kHz, 80 kHz LPF All controls flat overall VIN = 1 Vrms, f = 1 kHz, Rg = 1 kΩ All controls flat overall VDD – VSS = +9 V CL, DI, CE, MUTE: VIN = 10.5 V,VDD = 10.5 V CL, DI, CE, MUTE: VIN = 0 V,VDD = 10.5 V –10 80 38 10 0.001 0.01 Symbol Conditions Ratings min typ max Unit THD2 0.002 0.01 % Total harmonic distortion (FLTON and FRTON inputs, FLOUT and FROUT outputs) THD3 0.003 0.01 Output noise voltage (RL, RR, C and SBW inputs, direct output) 6 2.5 7 µV 3 9 4 –95 dB dB mA µA µA VN1 Output noise voltage (FL and FR inputs, direct output) VN2 Output noise voltage (FLTON and FRTON inputs, FLOUT and FROUT outputs) VN3 Characteristics at maximum attenuation Crosstalk Current drain High-level input current Low-level input current Vomin CT IDD IIH IIL Pin Assignment BASS21 BASS22 BASS23 FRTON 33 FLTON 34 MUTE 35 TIM 36 VDD 37 CL 38 DI 39 CE 40 VSS 41 OUTP4 42 OUTP3 43 OUTP2 44 1 OUTP1 32 31 30 29 28 27 26 25 24 23 22 C 21 NC 20 RL 19 NC 18 RR LC75347E QIP44M VREF 17 NC 16 SBW 15 NC 14 SBWOUT 13 RROUT 12 RLOUT 11 COUT Top view SELR 9 FLOUT TRE2 2 TRE1 3 BASS11 4 BASS12 5 BASS13 6 SELL 7 FLIN 8 NC 10 FROUT NC: No Connect FRIN NC FR FL No. 7378 -3/17 LC75347E Equivalent Circuit/Application Circuit Example NC NC NC NC SBWOUT RROUT RLOUT 12 2.2 µF 22 21 20 19 18 17 SBW RR RL C 16 15 14 13 VREF 22 µF 20 kΩ 23 20 kΩ 2.2 µF 2.2 µF 1 µF 1 µF 1 µF 1 µF 2.2 µF 11 2.2 µF COUT 1 µF FRIN SELR 24 25 10 2.2 µF FROUT 1 µF 9 26 8 50 kΩ 1 µF 0.1 µF 0.1 µF FLOUT NC FLIN SELL FR 7 6 NC 1 µF 27 50 kΩ FL 28 BASS23 0.1 µF 29 CONTROL CIRCUIT LOGIC CIRCUIT ZERO-CROSS DETECTOR 5 BASS13 BASS22 0.1 µF 30 6.5 kΩ 6.5 kΩ 4 BASS12 CCB INTERFACE NO SIGNAL TIMER BASS21 2700 pF 31 32 33 1 µF 47 kΩ 50 kΩ 50 kΩ 3 2 BASS11 2700 pF 5V 10 kΩ TRE2 FRTON TRE1 1 1 MΩ OUTP1 34 FLTON MUTE 1 µF 35 36 0.033 µF 37 VDD 38 CL DI 39 40 CE 41 5V 42 OUTP4 10 kΩ 43 OUTP3 10 kΩ 44 OUTP2 10 kΩ TIM µCOM VSS No. 7378 -4/17 LC75347E Control System Timing and Data Format The stipulated serial data must be applied to the CL, DI, and CE pins to control the LC75347E. The data consists of 80 bits, of which 8 bits are address and 72 bits are data. CE B0 B1 B2 B3 A0 A1 A2 A3 D0 D1 D2 D3 D4 D5 D65 D66 D67 D68 D69 D70 D71 DI CL 1 µs min CE 1 µs min 1 µs min 1 µs min CL 1 µs min DI 1 µs ≤ TDEST • Address Code (B0 to A3) This IC has an 8-bit address code and can be used with the same specifications as other Sanyo CCB serial bus ICs. Address code (LSB) (82HEX) B0 0 B1 1 B2 0 B3 0 A0 0 A1 0 A2 0 A3 1 No. 7378 -5/17 LC75347E • Control Code Allocations Volume Control D0 D8 D16 D24 D32 D40 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 D1 D9 D17 D25 D33 D41 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 D2 D10 D18 D26 D34 D42 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 D3 D11 D19 D27 D35 D43 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 D4 D12 D20 D28 D36 D44 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D5 D13 D21 D29 D37 D45 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D6 D14 D22 D30 D38 D46 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D7 D15 D23 D31 D39 D47 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SBW setting RR setting RL setting C setting FRIN setting FLIN setting 0 dB –1 dB –2 dB –3 dB –4 dB –5 dB –6 dB –7 dB –8 dB –9 dB –10 dB –11 dB –12 dB –13 dB –14 dB –15 dB –16 dB –17 dB –18 dB –19 dB –20 dB –21 dB –22 dB –23 dB –24 dB –25 dB –26 dB –27 dB –28 dB –29 dB –30 dB –31 dB –32 dB –33 dB –34 dB –35 dB –36 dB –37 dB –38 dB –39 dB –40 dB –41 dB –42 dB –43 dB –44 dB –45 dB –46 dB Continued on next page. No. 7378 -6/17 LC75347E Continued from preceding page. D0 D8 D16 D24 D32 D40 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 D1 D9 D17 D25 D33 D41 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 1 D2 D10 D18 D26 D34 D42 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 1 D3 D11 D19 D27 D35 D43 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 D4 D12 D20 D28 D36 D44 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D5 D13 D21 D29 D37 D45 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 D6 D14 D22 D30 D38 D46 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D7 D15 D23 D31 D39 D47 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SBW setting RR setting RL setting C setting FRIN setting FLIN setting –47 dB –48 dB –49 dB –50 dB –51 dB –52 dB –53 dB –54 dB –55 dB –56 dB –57 dB –58 dB –59 dB –60 dB –61 dB –62 dB –63 dB –64 dB –65 dB –66 dB –67 dB –68 dB –69 dB –70 dB –71 dB –72 dB –73 dB –74 dB –75 dB –76 dB –77 dB –78 dB –79 dB –80 dB –81 dB –82 dB –83 dB –84 dB –85 dB –86 dB –87 dB –88 dB –89 dB –90 dB –91 dB –92 dB –93 dB –94 dB –95 dB –∞ No. 7378 -7/17 LC75347E Zero cross control D48 D49 D50 D51 D52 D53 0 1 SBW setting RR setting RL setting C setting FRIN setting FLIN setting Zero cross operation Zero cross operation is disabled (This setting takes effect on the fall of CE.) Operation Tone Switch Selection D54 0 1 0 1 D55 0 0 1 1 Setting The analog switches are set so that FL and FR bypass the tone circuit. The analog switches are set so that FL is connected to, and FR bypass the tone circuit. The analog switches are set so that FR is connected to, and FL bypass the tone circuit. The analog switches are set so that FL and FR are connected to the tone circuit. Bass D56 0 1 0 1 0 1 0 1 0 1 0 1 0 D57 1 0 0 1 1 0 0 0 1 1 0 0 1 D58 1 1 1 0 0 0 0 0 0 0 1 1 1 D59 0 0 0 0 0 0 0 1 1 1 1 1 1 FLTON setting FRTON setting +12 dB +10 dB +8 dB +6 dB +4 dB +2 dB 0 dB –2 dB –4 dB –6 dB –8 dB –10 dB –12 dB Treble D60 0 1 0 1 0 1 0 1 0 1 0 1 0 D61 1 0 0 1 1 0 0 0 1 1 0 0 1 D62 1 1 1 0 0 0 0 0 0 0 1 1 1 D63 0 0 0 0 0 0 0 1 1 1 1 1 1 FLTON setting FRTON setting +12 dB +10 dB +8 dB +6 dB +4 dB +2 dB 0 dB –2 dB –4 dB –6 dB –8 dB –10 dB –12 dB Tone Mode D64 0 1 0 1 D65 0 0 1 1 Setting FLTON and FRTON not changed Only FLTON changed Only FRTON changed Both FLTON and FRTON changed Output Ports Setting D66 D67 D68 D69 OUTP1 (VSS: 1, OPEN: 0) OUTP2 (VSS: 1, OPEN: 0) OUTP3 (VSS: 1, OPEN: 0) OUTP4 (VSS: 1, OPEN: 0) Test Mode D70 0 D71 0 Setting These bits are used for IC testing. They must be set to 0 during normal operation. No. 7378 -8/17 LC75347E Pin Functions Pin No. 7 24 20 18 22 16 Pin FLIN FRIN RL RR C SBW • Volume control inputs Function Notes VDD 9 10 11 12 13 14 FLOUT FROUT COUT RLOUT RROUT SBWOUT • Volume control outputs VDD FLOUT FROUT RLOUT RROUT COUT SBWOUT From TONE 28 26 FL FR • Selector volume inputs VDD FL RL 6 25 SELL SELR • Selector volume outputs VREF SELL SELR VDD • Zero cross circuit timer 36 TIM If a zero cross is not detected during the period from the completion of the data transfer to the point the timer overflows, the control data is enabled forcibly. VDD VDD • 0.5 × VDD voltage generator used for analog ground 23 VREF A capacitor of several ten µF must be connected between VREF and VSS to minimize power supply ripple. VREF 41 37 VSS VDD • Ground • Power supply • Chip enable 40 CE Data is written to the internal latch when this pin goes from high to low. The analog switches operate at that time. Data transfer is enabled when CE is high. VDD 39 38 DI CL • Serial data and clock inputs for the control data. Continued on next page. No. 7378 -9/17 LC75347E Continued from preceding page. Pin No. Pin Function Notes VDD • External control mute pin 35 MUTE Applying the VSS level to this pin forcibly sets the volume level for all channels to –∞. 34 33 FLTON FRTON • Tone control block inputs After passing through the tone control circuit, the audio signals are output to the selector amplifier. FLTON FRTON VDD VDD VREF 3 5 31 29 BASS11 BASS13 BASS21 BASS23 • Connections for the capacitors that form the bass filters VDD BASS11 BASS21 VDD BASS13 BASS23 4 30 BASS12 BASS22 VREF • Connections for the resistors that form the bass filters VDD 2 32 TRE1 TRE2 • Connections for the capacitors that form the treble filters VDD TRE1 TRE2 1 44 43 42 OUTP1 OUTP2 OUTP3 OUTP4 • N-channel transistor open-drain outputs When off, these outputs are in the high-impedance state. OUTP1 OUTP2 OUTP3 OUTP4 8 15 17 19 21 27 • Unused pins NC These pins must either be left open or connected to VSS. No. 7378 -10/17 LC75347E Internal Equivalent Circuits • Selector, Bass/Treble, VREF Amplifier, Output Ports FLTON 50 VREF SW1 FRTON is identical. Units (Resistance: kΩ) ±12 dB ±10 dB ±4 dB ±2 dB ±0 dB ±8 dB ±6 dB SW2 SW4 SW1 SW2 SW3 SW3 SW4 ±12 dB ±10 dB ±8 dB ±6 dB ±4 dB ±2 dB 8.473 3.373 4.246 5.346 6.730 8.473 12.840 10.666 3.373 4.246 5.346 6.730 TRE1 6.5 BASS11 Total= 51.674 VREF BASS12 Total= 38.861 BASS13 0.027 SELL FL 50 VREF For boost, set switches 1 and 3 to the on position, for cut, set switches 2 and 4 to the on position, and for 0 dB, set switches 2, 3 and 0 dB switch to the on position. VDD VREF1 OUTP1 VREF2 20 VREF 20 OUTP2 to 4 are identical. VREF3 10.666 ±0 dB No. 7378 -11/17 LC75347E • Volume Block Total resistance: 50 kΩ (Parallel resistors) FLIN 0dB R1= 5434 –1dB R2= 4845 –2dB R3= 4319 –3dB R4= 3850 –4dB R5= 3431 –5dB R6= 3058 –6dB R7= 2726 –7dB R8= 2429 –8dB R9= 2165 –9dB R10= 1930 –10dB R11= 1720 –11dB R12= 1533 –12dB R13= 1366 –13dB R14= 1218 –14dB R15= 1085 –15dB R16= 967 –16dB R17= 862 –17dB R18= 768 –18dB R19= 685 –19dB R20= 610 –20dB R21= 544 –21dB R22= 485 –22dB R23= 432 –23dB R24= 385 –24dB R25= 343 –25dB R26= 306 –26dB R27= 273 –27dB R54= 49 –54dB R53= 55 –53dB R52= 61 –52dB R51= 69 –51dB R50= 77 –50dB R78= 49 –78dB R49= 86 –49dB R77= 55 –77dB R48= 49 –48dB R76= 62 –76dB R47= 55 –47dB R75= 69 –75dB R46= 61 –46dB R74= 78 –74dB R45= 69 –45dB R73= 87 –73dB R44= 77 –44dB R72= 49 –72dB R43= 86 –43dB R71= 55 –71dB R96= 450 –∞ dB R42= 48 –42dB R70= 62 –70dB R95= 55 –95dB R41= 55 –41dB R69= 69 –69dB R94= 62 –94dB R40= 61 –40dB R68= 78 –68dB R93= 69 –93dB R39= 68 –39dB R67= 86 –67dB R92= 78 –92dB R38= 77 –38dB R66= 49 –66dB R91= 87 –91dB R37= 86 –37dB R65= 55 –65dB R90= 49 –90dB R36= 97 –36dB R64= 62 –64dB R89= 55 –89dB R35= 108 –35dB R63= 69 –63dB R88= 62 –88dB R34= 122 –34dB R62= 78 –62dB R87= 69 –87dB R33= 137 –33dB R61= 86 –61dB R86= 78 –86dB R32= 153 –32dB R60= 49 –60dB R85= 87 –85dB R31= 172 –31dB R59= 55 –59dB R84= 49 –84dB R30= 193 –30dB R58= 61 –58dB R83= 55 –83dB R29= 216 –29dB R57= 69 –57dB R82= 62 –82dB R28= 243 –28dB R56= 77 –56dB R81= 69 –81dB R55= 86 –55dB R80= 78 –80dB R79= 87 –79dB FLOUT R97 794 R98 796 R99 798 R100 800 R101 802 R102 804 R103 806 R104 808 R105 810 Resistor units: Ω FRIN, RL, RR, C and SBW are identical. VREF No. 7378 -12/17 LC75347E Calculating the Equalizer External Component Values 1. Bass Band Circuit Here we show the equivalent circuit and the formulas for calculating the capacitor and resistor values for a center frequency of 100 Hz. • Bass band equivalent circuit C1 R1 R2 C2 R3 • Sample calculation Specifications: Center frequency, f0 = 100 Hz Gain at maximum boost: G = 12 dB Assume R1 = 27 Ω, R2 = 38,834 Ω, and C1 = C2 = C. (1) Determine R3 from the fact that G = 12 dB. R2 G+12dB = 20 × LOG10 1 + 2R3 + R1 R2 R3 = (10 G/20 –1) 2 –R1 = 38834 – 27 (3.981 – 1) 2 ≠ 6500 Ω (2) Determine C from the fact that the center frequency, f0, is 100 Hz. f0 = 1 2π (R1 + R2) R3C1C2 1 2πf0 (R1 + R2) R3 1 2π × 100 (38834 + 27) × 6500 C= = ≠ 0.1 µF (3) Determine Q. Q= (R1 + R2) R3 2R3 + R1 · 1 (R1 + R2) R3 ≠ 1.22 No. 7378 -13/17 LC75347E 2. Treble Band Circuit The treble band circuit can provide shelving characteristics. Here we present the equivalent circuit when the circuit is providing boost and the circuit calculation formulas. • Treble band equivalent circuit C R1 R2 • Sample calculation Specifications: Set frequency, f = 26,000 Hz Gain at maximum boost: G+12 dB = 12 dB Assume R1 = 12,840 Ω and R2 = 38,834 Ω. Substituting the above values into the following formulas allows us to solve for C. G = 20 × LOG10 1 + R2 R12 + (1/ωC)2 C= 2πf 1 R2 10G/20 – 1 2 – R12 = 2π26000 1 38834 3.98 – 1 2 ≠ 2700 (pF) 2 – 12840 No. 7378 -14/17 LC75347E Usage Notes 1. Data Transmission after Power is First Applied The states of the internal analog switches are undefined when power is first applied. Applications should set up the initial data immediately after power is applied (after VDD rises above 4.5 V). Applications should also mute the outputs until the data has been set up and the outputs are stable. To establish the states of the internal latches, set the bits D64 and D65 to 1 in the first data transferred after power is first applied. 2. Zero Cross Switching Control Zero cross switching is used by setting up data in which the zero cross control bits specify zero cross detection mode (by setting bits D48 to D53 to 0) and transfer that data. Since these control bits are latched first, immediately after the data is transferred, that is, on the fall of the CE signal, zero cross control can be performed with a single data transfer operation when updating the volume control settings. If the zero cross control bits specify zero cross detection disabled mode (by setting bits D48 to D53 to 1), the volume is switched on the fall of the CE signal at the end of the data transfer. 3. Zero Cross Timer Setting When the input signal is less than the detection sensitivity of the zero cross comparator, or if only a low-frequency signal is being input, the state where the IC does not detect a zero cross will continue and the data will not be latched. The zero cross timer allows applications to set a time at which data will be latched forcibly if the state where no zero cross is detected continues. For example, to set a time of 25 ms: T = 0.69CR Since the internal pull-up resistor is about 1 MΩ: C= 25 × 10–3 0.69 × 1.0 × 106 0.036 µF Applications usually set a time in the range 10 to 50 ms. 4. Notes on Serial Data Transfer Cover the CL, DI, and CE pin signal lines with the ground pattern, or use shielded cables for these signals so that the high-frequency digital signals transmitted on these lines do not enter the analog signal system. No. 7378 -15/17 LC75347E Volume Control Step Characteristics VDD = 9 V VIN = 0 dBV f = 1 kHz 0 --10 --20 --30 --40 --50 --60 --70 --80 --90 3 2 Distortion vs. Frequency Characteristics (1) FROUT tone VDD = 9 V Distortion — % 0.01 7 5 Output — dB 3 2 VIN = --10 dBV VIN = 0 dBV --100 --100 --90 --80 --70 --60 --50 --40 --30 --20 --10 0 0.001 10 23 5 7 100 23 5 7 1k 23 5 7 10k 23 Step — dB 7 5 ILC05489 2 0.1 7 5 Frequency, f — Hz 5 7100k ILC05490 Distortion vs. Frequency Characteristics (2) SBWOUT output VDD = 9 V Distortion vs. Input Level Characteristics (1) FROUT tone output VDD = 9 V 3 Distortion — % 2 Distortion — % 3 2 0.01 7 5 3 2 0.001 7 --40 VIN= --10 dBV 0.001 VIN = 0 dBV 7 5 10 kH z 1 kHz 3 10 23 5 7 100 23 5 7 1k 23 5 7 10k 23 Frequency, f — Hz 0.1 5 7100k ILC05491 --30 --20 --10 0 10 ILC05492 Input level — dBV 3 2 Distortion vs. Input Level Characteristics (2) SBWOUT output VDD = 9 V Distortion vs. Supply Voltage (1) FROUT tone output VDD = 9 V 7 5 3 2 0.01 Distortion — % Distortion — % 7 5 3 2 0.01 7 5 3 2 0.001 7 5 3 --40 --35 --30 --25 --20 --15 --10 --5 0 10 kH z 1 z kH k 10 1 kH Hz z 0.001 7 5 5 10 7 8 9 10 11 12 ILC05494 Input level — dBV 7 5 ILC05493 0 --5 --10 Supply voltage — V Distortion vs. Supply Voltage (2) SBWOUT output VDD = 9 V Output level — dBV Bass Tone Control Characteristics VDD = 9 V VIN = --20 dBV 3 Distortion — % 2 10 --15 --20 --25 --30 --35 kH z 0.001 1 kHz 7 5 3 6 7 8 9 10 11 12 ILC05495 --40 10 23 5 7 100 23 5 7 1k 23 5 7 10k 23 Supply voltage — V Frequency, f — Hz 5 7100k ILC05496 No. 7378 -16/17 LC75347E 0 --5 --10 Treble Tone Control Characteristics VDD = 9 V VIN = --20 dBV Output level — dBV --15 --20 --25 --30 --35 --40 10 23 5 7 100 23 5 7 1k 23 5 7 10k 23 Frequency, f — Hz 5 7100k ILC05497 Zero Cross Circuit Off VDD = 9 V VIN = 0 dBV Setting: 0 dBV → mute SBWOUT output RROUT output Zero Cross Circuit On VDD = 9 V VIN = 0 dBV Setting: 0 dBV → mute SBWOUT output RROUT output CE input CE input ILC05498 ILC05499 Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer’s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer’s products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification” for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of December, 2003. Specifications and information herein are subject to change without notice. PS No. 7378 -17/17
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