LC75395E

Ordering number : EN5056A CMOS LSI LC75395E Single-Chip Electronic Volume Control System Overview The LC75395E is an electronic volume control that provides volume, balance, five-band equalization and input switching functions. These functions are controlled from serial input data. Package Dimensions unit: mm 3159-QFP64E [LC75395E] Functions • Volume control: The volume control provides 25 attenuation positions: from 0 dB to –17.5 dB in 1.25 dB steps, from –17.5 dB to –25 dB in 2.5 dB steps, from –25 dB to –36.25 dB in 3.75 dB steps and with settings for –41.25 dB, –50 dB, –60 dB and –∞. A balance function can be implemented by controlling the left and right channels independently. • Equalizer: The equalizer function supports ±10 dB control in 2 dB steps in each of the five bands. Of the five bands, four provide peaking characteristics, and one provides shelving characteristics. • Selector: The selector function selects one of four inputs for each of the left and right channels. An arbitrary amplification level can be set for each input signal using external components. • Serial data input: All controls can be set from serial input data (CCB format) SANYO: QIP64E Features • On-chip buffer amplifiers to minimize the number of external components • Silicon-gate CMOS process for minimal switching noise • On-chip circuit to generate the VDD/2 reference voltage • CCB is a trademark of SANYO ELECTRIC CO., LTD. • CCB is SANYO’s original bus format and all the bus addresses are controlled by SANYO. Specifications Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V Parameter Maximum supply voltage Maximum input voltage Allowable power dissipation Operating temperature Storage temperature Symbol VDD max VIN max Pd max Topr Tstg VDD CL, DI, CE, L1 to L4, R1 to R4, LTIN, RTIN, LVRIN, RVRIN Ta ≤ 85°C Conditions Ratings 12 VSS – 0.3 to VDD + 0.3 310 –30 to +85 –40 to +125 Unit V V mW °C °C SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN 63096HA (OT)/71895HA (OT) No. 5056-1/17 LC75395E Allowable Operating Ranges at Ta = 25°C, VSS = 0 V Parameter Supply voltage Input high level voltage Input low level voltage Input voltage amplitude Input pulse width Setup time Hold time Operating frequency Symbol VDD VIH VIL VIN tøW tSETUP tHOLD fopg VDD CL, DI, CE CL, DI, CE CL, DI, CE, L1 to L4, R1 to R4, LTIN, RTIN, LVRIN, RVRIN CL CL, DI, CE CL, DI, CE CL Conditions min 6.0 4.0 VSS VSS 1.0 1.0 1.0 500 typ max 11.0 VDD 1.0 VDD Unit V V V Vp-p µs µs µs kHz Electrical Characteristics at Ta = 25°C, VDD = 10 V, VSS = 0 V Parameter [Input Block] Input resistance Clipping level Output load resistance [Volume Control Block] Input resistance [Equalizer Control Block] Control range Step resolution Internal feedback resistance [Overall Characteristics] Total harmonic distortion Crosstalk Output at maximum attenuation THD (1) THD (2) CT VO min VN (1) Output noise voltage VN (2) Current drain Input high level current Input low level current IDD IIH IIL VIN = 1 Vrms, f = 1 kHz, with all controls flat overall VIN = 1 Vrms, f = 20 kHz, with all controls flat overall VIN = 1 Vrms, f = 1 kHz, with all controls flat overall Rg = 1 kΩ VIN = 1 Vrms, f = 1 kHz, with the main volume control at –∞ With all controls flat overall (IHF-A), Rg = 1 kΩ With all controls flat overall (DIN-AUDIO), Rg = 1 kΩ VDD – VSS = 11 V CL, DI, CE: VIN = 11 V CL, DI, CE: VIN = 0 V –10 0.0033 0.012 86 –84 3.9 5.4 25 33 10 % % dB dB µV µV mA µA µA Geq Estep Rfeed Max, boost/cut ±8 1 17 ±10 2 28 ±12 3 39 dB dB kΩ Rin LVRIN, RVRIN 21 35 49 kΩ Rin Vcl RL L1 to L4, R1 to R4 LSELO, RSELO: THD = 1.0% LSELO, RSELO 3 1 2.65 MΩ Vrms kΩ Symbol Conditions min typ max Unit Input Amplifier Characteristics at Ta = 25°C, VDD – VSS = 10 V Parameter Input offset voltage Input offset current Open-loop voltage gain 0 dB bandwidth Allowable load resistance Symbol VIO IIO AO fT RL 3 VSS ≤ VIN ≤ VDD Conditions min –10 ±10 80 2.5 typ max +10 Unit mV nA dB MHz kΩ No. 5056-2/17 LC75395E Equivalent Circuit Block Diagram and Sample Application Circuit A03544 Note: If at all possible, use bipolar capacitors for all capacitors that do not have a polarity specified. No. 5056-3/17 LC75395E Test Circuits 1. Total Harmonic Distortion A03545 No. 5056-4/17 LC75395E Test Circuits 2. Output Noise Voltage A03546 No. 5056-5/17 LC75395E Test Circuits 3. Crosstalk A03547 No. 5056-6/17 LC75395E Pin Assignment A03548 No. 5056-7/17 LC75395E Pin Functions Pin No. 12 11 10 37 38 39 9 8 7 40 41 42 6 5 4 43 44 45 3 2 1 46 47 48 Symbol LF1C1 LF1C2 LF1C3 RF1C1 RF1C2 RF1C3 LF2C1 LF2C2 LF2C3 RF2C1 RF2C2 RF2C3 LF3C1 LF3C2 LF3C3 RF3C1 RF3C2 RF3C3 LF4C1 LF4C2 LF4C3 RF4C1 RF4C2 RF4C3 The right channel F4 band control block. These are external capacitor connections. The left channel F4 band control block. These are external capacitor connections. A03549 Function The left channel F1 band control block. These are external capacitor connections. Note The right channel F1 band control block. These are external capacitor connections. The left channel F2 band control block. These are external capacitor connections. The right channel F2 band control block. These are external capacitor connections. The left channel F3 band control block. These are external capacitor connections. The right channel F3 band control block. These are external capacitor connections. 13 36 LTIN RTIN Tone control inputs These must be driven by low-impedance circuits. A03550 14 35 LSELO RSELO Input selector outputs A03551 64 49 LF5 RF5 F5 band control block. These are external capacitor connections. A03552 21 19 17 16 28 30 32 33 57 22, 26 27 L1 L2 L3 L4 R1 R2 R3 R4 VDD VSS AVSS Power supply Internal logic system ground Internal operational amplifier ground Signal inputs A03553 Continued on next page. No. 5056-8/17 LC75395E Continued from preceding page. Pin No. Symbol Function Note 56 Vref VDD/2 voltage generation block. A capacitor must be inserted between Vref and VSS to suppress power supply ripple. A04449 63 50 LVref RVref Common pins for the volume control, tone control and input switching blocks. Since capacitors inserted between LVref (or RVref) and VSS become the residual resistance when the volume control is set at maximum attenuation, the values of these capacitors must be chosen carefully. A voltage higher than VDD must never be applied. A03555 15 34 LINVIN1 RINVIN1 Inverting inputs for the operational amplifiers that set the input gain. A03556 62 51 LINVIN2 RINVIN2 Inverting inputs for the graphic equalizer operational amplifiers. Unnecessary frequency bands can be excluded and oscillation prevented by inserting arbitrary capacitors between the INVIN2 and TOUT pins. A03557 61 52 LTOUT RTOUT Tone control outputs A03558 60 53 LVRIN RVRIN Volume control inputs These must be driven by low-impedance circuits. A03559 58 55 LVROUT RVROUT Volume control outputs A03560 Chip enable 25 CE Data is read into the internal latches and the analog switches operate when this pin goes from high to low. Data transfer is enabled when this pin is high. A03561 24 23 18 20 29 31 54 59 DI CL NC NC NC NC NC NC Serial data and clock connections for chip control Unused pins No. 5056-9/17 LC75395E Input Block Internal Equivalent Circuit Diagram A03562 Volume Control Block Internal Equivalent Circuit Diagram A03563 No. 5056-10/17 LC75395E Equalizer Control Block Internal Equivalent Circuit (bands F1 to F4) A03564 External Capacitor Calculations The LC75395E supports four bands with peaking characteristics and one band with shelving characteristics. 1. Peaking Characteristics (bands F1 to F4) The external capacitor functions as the structural element of a simulated inductor. The equivalent circuit and the calculations required to achieve the desired center frequency are shown below. • Equivalent circuit for the simulated inductor A03565 No. 5056-11/17 LC75395E • Sample Calculation Specifications 1) Center frequency FO = 107 Hz 2) Q at maximum boost: Q+10 dB = 0.8 Œ Derive the sharpness (QO) of the simulated inductor itself. QO = (R1 + R4)/R1 × Q+10 dB ≠ 4.270  Derive C1. C1 = 1/2πFOR1QO ≠ 0.536 (µF) Ž Derive C2. C2 = QO/2πFOR2 ≠ 0.021 (µF) • Sample values for C1 and C2 Center frequency FO (Hz) 107 340 1070 3400 C1 (F) 0.536 µ 0.169 µ 0.054 µ 0.017 µ C2 (F) 0.021 µ 6663 p 2117 p 666 p 2. Shelving Characteristics (band F5) To achieve ±10 dB (in 2 dB steps) at the target frequency, use an external capacitor C3 which has an impedance of 650 Ω. No. 5056-12/17 LC75395E Control System Timing and Data Format The LC75395E is controlled by inputting stipulated data to the CE, CL, and DI pins. The data consists of a total of 40 bits, of which 8 bits are address and 32 bits are data. A03566 No. 5056-13/17 LC75395E A03730 A03731 No. 5056-14/17 LC75395E A03732 A03733 A03734 A03735 No. 5056-15/17 LC75395E A03736 A03737 A03738 A03739 Usage Notes 1. The states of the internal analog switches are undefined when power is first applied. Muting should be applied externally until control data has been transferred and stored. 2. The signal lines for the CL, DI and CE pins should either be covered by the pattern ground or be formed from shielded cable to prevent the high-frequency digital signals transmitted over these lines from entering the analog system. No. 5056-16/17 LC75395E s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. s Anyone purchasing any products described or contained herein for an above-mentioned use shall: Œ Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use:  Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of November, 1997. Specifications and information herein are subject to change without notice. No. 5056-17/17