LC75412WS

Ordering number : ENA1354 CMOS IC LC75412WS Overview Electronic Volume Controller for Car Audio Systems The LC75412WS are electronic volume controllers that enable control of volume, balance, fader, bass/treble, loudness, input switching, and input gain using only a small number of external components. Functions • Volume • Fader : 0dB to -79dB in 1dB steps, and -∞ (81 positions) Balance function with separate L/R control : Rear output or front output can be attenuated across 16 positions (in 1dB steps from 0dB to -2dB, 2dB steps from -2dB to -20dB, 10dB steps from -20dB to -30dB, and -45dB, -60dB, -∞) • Bass/treble : Each band can be controlled in 2dB steps from ±0dB to ±18dB. • Input gain : 0dB to +18.75dB (1.25dB steps) amplification is possible for the input signal. • Input switching : Six input signals can be selected for Left and for Right (five are singleended inputs and one is a differential input.) • Loudness : A tap is output from the -32dB position of a volume control resistor ladder. A loudness function can be implemented by connecting an external RC circuit. Specifications Absolute Maximum Ratings at Ta = 25°C, VSS = 0V Parameter Maximum supply voltage Maximum input voltage Operating temperature Symbol VDD max VIN max Topr VDD All input pins Conditions Ratings 11 VSS-0.3 to VDD+0.3 -40 to +85 Unit V V °C • • CCB is a registered trademark of SANYO Electric Co., Ltd. CCB is SANYO Semiconductor's original bus format. All bus addresses are managed by SANYO Semiconductor for this format. Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 11409HKIM 20081021-S00001 No.A1354-1/19 LC75412WS Allowable Operating Ranges at Ta = 25°C, VSS = 0V Ratings Parameter Supply voltage Input high-level voltage Input low-level voltage Input amplitude voltage Input pulse width Setup time Hold time Operating frequency Symbol VDD VIH VIL VIN TφW Tsetup Thold fopg CL CL, DI, CE CL, DI, CE CL VDD CL, DI, CE CL, DI, CE Conditions min 6.0 4.0 VSS VSS 1 1 1 500 typ max 10 10 1.0 VDD Unit V V V Vp-p μs μs μs kHz Electrical Characteristics at Ta = 25°C, VDD = 9V, VSS = 0V Parameter [Input block] Input resistance Minimum input gain Maximum input gain Step setting error L/R balance [Volume block] Input resistance Step setting error L/R balance [Tone block] Step setting error Bass control range Treble control range L/R balance [Fader block] Input resistance Step setting error Rfed ATerr LFIN, RFIN 0dB to -2dB -2dB to -20dB -20dB to -30dB -30dB to -60dB L/R balance [General] Total harmonic distortion THD (1) THD (2) Input crosstalk L/R crosstalk Maximum attenuated output CT CT Vomin (1) Vomin (2) Output noise voltage VN (1) VN (2) Current drain Input high-level current Input low-level current Maximum input voltage Common-mode rejection ratio IDD IIH IIL VCL CMRR CL, DI, CE, VIN = 9V CL, DI, CE, VIN = 0V THD = 1%, RL = 10kΩ flat overall, fIN = 1kHz VIN = 0dB, f = 1kHz -10 2.3 2.5 70 VIN = 0dBV, f = 1kHz VIN = -10dBV, f = 10kHz VIN = 1Vrms, f = 1kHz VIN = 1Vrms, f = 1kHz VIN = 1Vrms, f = 1kHz VIN = 1Vrms, f = 1kHz INMUTE, fader ∞ Flat overall, IHF-A filter Flat overall, 20 to 20kHzBPF 80 80 80 90 0.004 0.006 88 88 88 95 5 7 55 10 15 60 10 0.01 0.01 % % dB dB dB dB μV μV mA μA μA Vrms dB BAL 0dB to -60dB 25 50 100 ±0.5 ±1 ±2 ±3 ±0.5 kΩ dB dB dB dB dB ATerr Gbass Gtre BAL -8dB to +8dB max. boost/cut max. boost/cut ±15 ±15 ±18 ±18 ±1.0 ±21 ±21 ±0.5 dB dB dB dB Rvr ATerr BAL LVRIN, RVRIN loudness off 0dB to -40dB 0dB to -40dB 25 50 100 ±0.5 ±0.5 kΩ dB dB Rin Ginmin Ginmax ATerr BAL L1 to L4, L6, R1 to R4, R6 L1 to L4, L6, R1 to R4, R6 30 -1 +16.5 50 0 +18.75 70 +1 +21 ±0.6 ±0.5 kΩ dB dB dB dB Symbol Pin Name Conditions min Ratings typ max Unit No.A1354-2/19 LC75412WS Package Dimensions unit : mm (typ) 3190A 12.0 48 49 33 32 0.5 10.0 64 1 0.5 (1.25) (1.5) 17 16 0.18 0.15 1.7max 0.1 SANYO : SQFP64(10X10) Pin Assignment VDD R5M R5P Vref L5M R4 R3 R2 R1 R6 L5P L6 L1 L2 L3 L4 RSELO RVRIN RCT NC NC NC RF1C1 RF1C2 RF1C3 NC NC NC RF3C1 RF3C2 RF3C3 RTOUT 1 2 3 4 5 6 7 8 9 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 10.0 12.0 LSELO LVRIN LCT NC NC NC LF1C1 LF1C2 LF1C3 NC NC NC LF3C1 LF3C2 LF3C3 LTOUT LC75412WS 41 40 39 38 37 36 35 34 10 11 12 13 14 15 16 33 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 TIM RFIN TEST RROUT RFOUT LROUT MUTE RAVSS LFOUT DVSS LAVSS LFIN NC DI CE CL Top view No.A1354-3/19 0.33μF [BASS f0≈100Hz] 0.001μF 0.001μF 0.1μF 0.1μF [TREBLE f0≈10kHz] 10kΩ 1k Ω 1000pF 1μ F 10μF LF1C1 LF3C2 NC LF3C1 NC LF1C3 LF3C3 LF1C2 NC NC LTOUT LVRIN NC NC LCT 47 39 38 37 36 35 34 33 46 45 44 43 42 41 40 48 LSELO L5P 32 49 LFIN 10μF LFOUT LROUT PA PA L5M LVref 31 30 50 L4 LVref 51 1μF×7 L3 LVref 52 29 28 27 LAVSS TEST DVSS 26 10 μ F L2 53 LVref L1 Multiplexer ZERO CROSSDET LVref RVref Multiplexer ZERO CROSSDET CONTROL CIRCUIT LOGIC CIRCUIT 54 L6 55 CL CCB INTERFACE 25 24 23 22 CL DI CE MUTE RAVSS 1M Ω NO SIGNAL TIMMER 21 20 VDD 56 DI μCOM CE 22μF Vref 57 LC75412WS R6 58 R1 59 RVref R2 60 NC TIM 19 RVref Equivalent Circuit Block Diagram/Sample Application Circuit R3 RVref 61 1μF×7 R4 62 RROUT RVref 18 17 0.033μF PA R5M 63 RFOUT RFIN 10 μ F PA R5P 10 μ F 64 1 2 3 6 4 5 7 8 9 10 11 12 13 14 15 16 NC NC NC NC NC NC RCT RSELO RVRIN RF1C1 RF1C2 RF3C1 RF3C2 RTOUT RF1C3 RF3C3 1μ F 1000pF 1kΩ 10kΩ 10 μ F 0.1μF 0.1μF 0.001μF 0.001μF No.A1354-4/19 0.33μF [BASS f0≈100Hz] [TREBLE f0≈10kHz] LC75412WS Control Timing and Data Format To control the LC75412WS input specified serial data to the DI, CE, and CL pins. The data configuration consists of a total of 52 bits broken down into 8 address bits and 44 data bits. CE DI CL B0 B1 B2 B3 A0 A1 A2 A3 D0 D1 D2 D3 D4 D5 D38 D39 D40 D41 D42 D43 CE 1μs min 1μs min 1μs min 1μs min 1μs min CL DI 1μs≤TDEST 1) Address code (B0 to A3) The LC75412WS use 8-bit address code and can be used in common with ICs that support SANYO’s CCB serial bus. Address Code (LSB) B0 1 B1 0 B2 0 B3 0 A0 0 A1 0 A2 0 A3 1 (81HEX) 2) Control code allocation Input Switching Control D0 0 1 0 1 0 1 D1 0 0 1 1 0 0 D2 0 0 0 0 1 1 Setting L1 (R1) L2 (R2) L3 (R3) L4 (R4) L5 (R5) L6 (R6) D3 Bit for IC testing: Normally set to 0 Input Gain Control D4 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D5 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D6 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D7 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Operation 0dB +1.25dB +2.50dB +3.75dB +5.00dB +6.25dB +7.50dB +8.75dB +10.00dB +11.25dB +12.50dB +13.75dB +15.00dB +16.25dB +17.50dB +18.75dB No.A1354-5/19 LC75412WS Volume Control (0 to -50dB) D8 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 D9 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 D10 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 D11 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 D12 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 D13 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D14 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D15 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Operation 0dB -1dB -2dB -3dB -4dB -5dB -6dB -7dB -8dB -9dB -10dB -11dB -12dB -13dB -14dB -15dB -16dB -17dB -18dB -19dB -20dB -21dB -22dB -23dB -24dB -25dB -26dB -27dB -28dB -29dB -30dB -31dB -32dB -33dB -34dB -35dB -36dB -37dB -38dB -39dB -40dB -41dB -42dB -43dB -44dB -45dB -46dB -47dB -48dB -49dB -50dB Continued on next page. No.A1354-6/19 LC75412WS Continued from preceding page. Volume Control (-51 to -∞dB) D8 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 *1 D9 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 1 D10 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 1 D11 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 D12 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 D13 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 D14 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D15 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Operation -51dB -52dB -53dB -54dB -55dB -56dB -57dB -58dB -59dB -60dB -61dB -62dB -63dB -64dB -65dB -66dB -67dB -68dB -69dB -70dB -71dB -72dB -73dB -74dB -75dB -76dB -77dB -78dB -79dB -∞ *1: ‘0’ or ‘1’ No.A1354-7/19 LC75412WS Tone Control D16 D24 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D17 D25 1 1 0 1 0 0 1 1 0 0 0 1 1 0 0 1 0 1 1 D18 D26 0 0 0 1 1 1 0 0 0 0 0 0 0 1 1 1 0 0 0 D19 D27 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 D40 D41 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 Bass Treble +18dB +16dB +14dB +12dB +10dB +8dB +6dB +4dB +2dB 0dB -2dB -4dB -6dB -8dB -10dB -12dB -14dB -16dB -18dB D20 0 D21 0 D22 0 D23 0 Setting Set to 0 Fader Volume Control D28 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D29 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D30 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D31 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Operation 0dB -1dB -2dB -4dB -6dB -8dB -10dB -12dB -14dB -16dB -18dB -20dB -30dB -45dB -60dB -∞ No.A1354-8/19 LC75412WS Channel Selection Control D32 1 0 1 D33 0 1 1 Setting RCH LCH L/R simultaneously Fader Rear/Front Control D34 0 1 Setting Rear Front Loudness Control D35 0 1 Setting OFF ON Zero-Cross Control D36 0 1 D37 0 1 Setting Data write through zero-cross detection Zero-cross detection stopped (data write at falling edge of CE) Zero-Cross Signal Detection Block Control D38 0 1 0 1 D39 0 0 1 1 Setting Selector Volume Tone Fader Test Mode Control D42 0 D43 0 Setting For IC testing. Always set to 0. No.A1354-9/19 LC75412WS Pin Functions Pin L1 L2 L3 L4 L6 R1 R2 R3 R4 R6 L5M L5P R5M R5P Pin No. 54 53 52 51 55 59 60 61 62 58 50 49 63 64 • Differential input pins. • Single-end input pins. Function Equivalent circuit VDD LVref RVref VDD M VDD P LVref RVref LSELO RSELO 48 1 • Input selector output pins. VDD LCT RCT 46 3 • Loudness pins. Connect high-pass compensation CR between LCT (RCT) and LVRIN (RVRIN), and connect low-pass compensation CR between LCT (RCT) and GND. VDD LVRIN RVRIN 47 2 • Volume and equalizer input pins. VDD LF1C1 LF1C2 LF1C3 RF1C1 RF1C2 RF1C3 42 41 40 7 8 9 • Equalizer F1 band filter configuration capacitor connection pins. Connect capacitor between LF1C1 (RF1C1) and LF1C2 (RF1C2) LF1C2 (RF1C2) and LF1C3 (RF1C3) VDD VDD LF3C1 LF3C2 LF3C3 RF3C1 RF3C2 RF3C3 36 35 34 13 14 15 • Equalizer F3 band filter configuration capacitor connection pins. Connect capacitor between LF3C1 (RF3C1) and LF3C2 (RF3C2) LF3C2 (RF3C2) and LF3C3 (RF3C3) VDD FnC1 FnC3 VDD FnC2 Continued on next page. No.A1354-10/19 LC75412WS Continued from preceding page. Pin NC NC NC NC NC NC NC NC NC NC NC NC NC TEST Pin No. 45 44 43 39 38 37 21 12 11 10 6 5 4 28 • Dedicated IC test pin. • Normally this pin is used connected to GND. • No connect pin. Function Equivalent circuit VDD LTOUT RTOUT 33 16 • Equalizer output pins. VDD LFIN RFIN 32 17 • Fader block input pins. • Drive at low impedance. VDD LFOUT LROUT RFOUT RROUT 31 30 18 19 • Fader output pins. Attenuation is possible separately for the front end and rear end. The attenuation amount is the same for L and R. VDD Vref 57 • Connect a capacitor of a few tens of μF between Vref and AVSS (VSS) as a VDD/2 voltage generator, current ripple countermeasure. VDD LVref RVref VDD DVSS LAVSS RAVSS MUTE 56 27 29 22 23 • External muting control pin. • Setting this pin to VSS level sets forcibly fader volume block to -∞ level. • Power supply pin. • Logic system ground pin. • Analog system ground pins. VDD Continued on next page. No.A1354-11/19 LC75412WS Continued from preceding page. Pin TIM Pin No. 20 Function • Timer pin when there is no signal in the zero-cross circuit. Forcibly set data when there is no zero-cross signal, from the time the data is set until the timer ends. Equivalent circuit VDD CL DI CE 26 25 24 • Input pin for serial data and clock used for control. VDD • Chip enable pin. Data is written to the internal latch and the analog switches are operated when the level changes from High to Low. Data transfer is enabled when the level is High. Internal Equivalent Circuit Block Diagram Selector Block Equivalent Circuit Block Diagram R3=22.65kΩ L5P R4=25kΩ LVref L5M L4 R1=22.65kΩ 50kΩ LVref L3 50kΩ LVref L2 50kΩ LVref L1 50kΩ LVref L6 50kΩ LVref INMUTE SW 15.00dB 16.25dB Total resistance: 50kΩ Same for right channel LVref 17.50dB 18.75dB 12.50dB 13.75dB 10.00dB 11.25dB 7.50dB 8.75dB 5.00dB 6.25dB R2=25kΩ 0dB 1.25dB 2.50dB 3.75dB 6.702kΩ 5.804kΩ 5.026kΩ 4.352kΩ 3.769kΩ 3.264kΩ 2.826kΩ 2.447kΩ 2.119kΩ 1.835kΩ 1.589kΩ 1.376kΩ 1.192kΩ 1.032kΩ 0.894kΩ 5.774kΩ LVref LSELO No.A1354-12/19 LC75412WS Volume Block Equivalent Circuit Block Diagram 0dB& -∞ASW=1kΩ Others ASW=3kΩ LVRIN R1=5434Ω R2=4845Ω R3=4319Ω R4=3850Ω R5=3431Ω R6=3058Ω R7=2726Ω R8=2429Ω R9=2165Ω R10=1930Ω R11=1720Ω R12=1533Ω R13=1366Ω R14=1218Ω R15=1085Ω R16=967Ω R17=862Ω R18=768Ω R19=685Ω R20=610Ω R21=544Ω R22=485Ω R23=432Ω R24=385Ω R25=343Ω R26=306Ω R27=273Ω 0dB -1dB -2dB -3dB -4dB -5dB -6dB -7dB -8dB -9dB -10dB -11dB -12dB -13dB -14dB -15dB -16dB -17dB -18dB -19dB -20dB -21dB -22dB -23dB -24dB -25dB -26dB -27dB R28=243Ω R29=216Ω R30=193Ω R31=172Ω R32=153Ω R33=839Ω R34=748Ω R35=667Ω R36=594Ω R37=530Ω R38=472Ω R39=421Ω R40=375Ω R41=334Ω R42=298Ω R43=266Ω R44=237Ω R45=211Ω R46=188Ω R47=168Ω R48=149Ω R49=133Ω R50=119Ω R51=106Ω R52=94Ω R53=84Ω R54=75Ω -28dB -29dB -30dB -31dB -32dB -33dB -34dB -35dB -36dB -37dB -38dB -39dB -40dB -41dB -42dB -43dB -44dB -45dB -46dB -47dB -48dB -49dB -50dB -51dB -52dB -53dB -54dB R55=133Ω R56=119Ω R57=106Ω R58=94Ω R59=84Ω R60=75Ω R61=134Ω R62=119Ω R63=106Ω R64=95Ω R65=84Ω R66=75Ω R67=134Ω R68=119Ω R69=106Ω R70=95Ω R71=85Ω R72=75Ω R73=134Ω R74=120Ω R75=107Ω R76=95Ω R77=85Ω R78=76Ω R79=67Ω R80=552Ω -55dB To tone block -56dB -57dB -58dB -59dB -60dB -61dB -62dB -63dB -64dB -65dB -66dB -67dB -68dB -69dB -70dB -71dB -72dB -73dB -74dB -75dB -76dB -77dB -78dB -79dB -∞ Total resistance of 1.256kΩ under tap (LOUD OFF) Total resistance of 7.662kΩ under tap (LOUD ON) Total resistance of 48.746kΩ over tap LCT 1MΩ R86 1500Ω R81 1227Ω R82 1230Ω R83 1233Ω R84 1236Ω R85 Same for right channel LVref No.A1354-13/19 LC75412WS Tone Control Block Equivalent Circuit Diagram From Volume Block LTOUT SW2 SW1 SW3 SW1 SW2 SW3 0.655kΩ 2.189kΩ 2.756kΩ 3.470kΩ 4.368kΩ 5.498kΩ 6.923kΩ 8.715kΩ 4dB 10.972kΩ 2dB 13.813kΩ 0dB 18dB SW4 0.655kΩ 18dB 2.189kΩ 16dB 2.756kΩ 14dB 3.470kΩ 12dB 4.368kΩ 10dB 5.498kΩ 8dB 6.923kΩ 6dB 8.715kΩ 4dB 10.972kΩ 2dB 13.813kΩ 0dB SW4 16dB 14dB 12dB 10dB 8dB 6dB 3.90kΩ LF1C1 LF1C2 LF1C3 LF3C1 3.90kΩ LF3C2 LF3C3 Total resistance: 59.359kΩ Same for right channel During boost, SW1 and SW3 are ON, during cut SW2 and SW4 are ON, and when 0dB, 0dB SW and SW2 and SW3 are ON. No.A1354-14/19 LC75412WS F1/F3 Band Circuit The equivalent circuit and the formula for calculating the external CR with a mean frequency of 1kHz are shown below. • F1/F3 band equivalent circuit block diagram R1 C1 R2 C2 R3 • Calculation example Specification Mean frequency : f0 = 1kHz Gain during maximum boost : G+18dB = 18dB Let us use R1 = 0.665kΩ, R2 = 58.704kΩ, and C1 = C2 = C. G+18dB = 20× LOG 1 + 10 ( R2 2R3+ R1 ) 1) Calculate R3 with G+18dB = 18dB: R3 = ⎜ ⎛ ⎞ R2 − R1 ⎟ ÷ 2 = 3900Ω G/20 ⎝ 10 − 1 ⎠ 1 2π (R1 + R2)R3C1C2 1 2πf0 (R1 + R2)R3 = 1 2π × 1000 39359 × 3900 = 0.010 × 10 −6 2) Calculate C with the center frequency f0 = 1kHz f0 = C= ≅ 0.01μF 3) Calculate Q: Q= R3(R1 + R2 ) 1 × (2R3 + R1) ≅ 1.789 (R1 + R2)R3 No.A1354-15/19 LC75412WS Fader Volume Block Equivalent Circuit Block Diagram S1 LFIN 5.437kΩ 4.846kΩ 8.169kΩ 6.489kΩ 5.154kΩ 4.094kΩ 3.252kΩ 2.583kΩ 2.052kΩ 1.630kΩ 1.295kΩ 3.419kΩ 1.300kΩ 0.231kΩ 0.050kΩ 0dB -1dB -2dB -4dB -6dB -8dB -10dB -12dB -14dB -16dB -18dB -20dB -30dB -45dB -60dB -∞dB Total resistance: 50kΩ Same for right channel When FADER = "1", S2 and S3 are ON. When FADER = "0", S1 and S4 are ON. S3 S4 LROUT S2 LFOUT LVref When -∞ data is sent to the main volume, S1 and S2 become open, and S3 and S4 simultaneously become ON. No.A1354-16/19 LC75412WS Usage Cautions (1) Data transmission at power ON The status of internal analog switches is unstable at power ON. Therefore, perform muting or some other countermeasure until the data has been set. (2) Description of zero-cross switching circuit operation The LC75412WS have a function to switch zero-cross comparator signal detection locations, enabling the selection of the optimum detection location for blocks whose data is to be updated. Basically, the switching noise can be minimized by inputting the signal immediately following the block whose data is to be updated to the zero-cross comparator, so it is necessary to switch the detection location every time. Selector Volume Tone Fader Switch Zero-cross comparator LC75412WS Zero-Cross Detection Circuit (3) Zero-cross switching control method The zero-cross switching control method consists of setting the zero-cross control bits to the zero-cross detection mode (D36, D37 = 0), and specifying the detection blocks (D38, D39) before transmitting the data. These control bits are latched immediately following data transfer, that is to say beforehand in sync with the falling edge of CE, so when updating data of volumes, etc., it is possible to perform mode setting and zero-cross switching with one data transfer. An example of control when updating the data of the volume block is shown below. D36 0 D37 0 D38 1 D39 0 Zero-cross detection mode setting Volume block setting (4) Zero-cross timer setting If the input signal becomes lower than the zero-cross comparator detection sensitivity, or if only low-frequency signals are input, zero-cross detection continues to be impossible, and data is not latched during this time. The zero-cross timer can set a time for forcible latch during such a status when zero-cross detection is not possible. For example, to set 25ms, using T = 0.69CR and C = 0.033μF, we obtain R= 25×10-3 0.69×0.033×10-6 ≈1.1MΩ Normally, a value between 10ms and 50ms is set. No.A1354-17/19 LC75412WS (5) Cautions related to serial data transfer 1) To ensure that the high-frequency digital signals transferred to the CL, DI, and CE pins do not spill over to the analog signal block, either guard these signal lines with a ground pattern, or perform transmission using shielded wires. 2) The data format of the LC75412WS uses 8-bit addresses and 44-bit data. When sending data using multiples of 8 (when sending 48 bits), use the method described in Figure 1. Method for Receiving Data Using Multiple of 8 of LC75412WS X X X X D0 D1 D2 D3 ••••• D36 D37 D38 D39 D40 D41 D42 D43 Dummy data Input switching control Test mode control X: don’t care Figure 1 (6) Note on usage of external muting See Figure 2, to control muting with an external switch. If a microcontroller is used for the control, it is likely that an overvoltage is applied to the microcontroller via the MUTE pin because the MUTE pin is connected internally to VDD. To avoid such problems, add the resister R2 as shown in Figure 3 to resistor-divide the voltage at the MUTE pin. VDD VDD R1 Switch MUTE R1 MUTE R2 Figure 2 Figure 3 As an example, the relationship between the voltages at the MUTE pin and the values of R2 when VDD is 9 volts is shown below. The characteristic curve shown in the figure is a standard one. 10 Relationship between R2 values and MUTE pin voltages when VDD is 9 volt Ta=25°C 8 MUTE pin voltage - V 6 4 2 0 0 50 100 150 200 R2 - kΩ *VIH (High detection voltage) at the MUTE pin must always be 4V or higher regardless of the supply voltage to be used. No.A1354-18/19 Microcontroller LC75412WS SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. 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SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of January, 2009. Specifications and information herein are subject to change without notice. PS No.A1354-19/19