LC75421

Ordering number : ENN6866A CMOS IC LC75421M Electronic Volume Controller for Cars Overview The LC75421M is an electronic volume controller that enables control of volume, balance, fader, bass/treble + super bass, input switching, and input and output level control functions using only a small number of external components. Features • On-chip buffer amplifier cuts down number of external components • Low switching noise generated by on-chip switch due to use of silicon gate CMOS process • On-chip reference voltage circuit for analog ground • Controls performed with serial input (CCB) Functions • Volume: 0 dB to –79 dB in 1-dB steps, and –∞ (81 positions) Balance function with separate L/R control • Fader: rear output or front output can be attenuated across 16 positions (in 2-dB steps from 0 dB to 20 dB, 5-dB steps from –20 dB to –25 dB, 10-dB steps from –25 dB to –45 dB, and –60 dB, –∞) • Bass/treble: A tone control circuit can be configured using an external RC, with 15-position control from 0 dB to ±11.9 dB in 1.7-dB steps possible for both bass and treble • Input gain: 0 dB to +18.75 dB (1.25-dB steps) amplification is possible for the input signal. • Output gain: Fader output can be selected among 0 dB, +6.5 dB, and +8.5 dB. • Input switching: Five input signals can be selected for Left and for Right • Super bass: Step control with 11 positions is possible, with peaking characteristics (type T) Package Dimensions unit: mm 3263-MFP36SDJ (375 mil) 15.2 [LC75421M] 19 36 10.5 7.9 1 (0.8) 0.8 0.3 18 0.25 SANYO: MFP36SDJ (375 mil) • CCB is a trademark of SANYO ELECTRIC CO., LTD. • CCB is SANYO’s original bus format and all the bus addresses are controlled by SANYO. Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein. SANYO Electric Co.,Ltd. Semiconductor Company TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 90503TN (OT) / 20901RM (OT) No. 6866-1/24 0.1 (2.25) 2.45max 0.65 LC75421M Pin Assignment DI 1 CE 2 VSS 3 LROUT 4 LFOUT 5 LFIN 6 LOUT 7 LSB 8 LBASS2 9 LBASS1 10 LTRE 11 LIN 12 LSELO 13 L5 14 L4 15 L3 16 L2 17 L1 18 36 CL 35 VDD 34 RROUT 33 RFOUT 32 RFIN 31 ROUT 30 RSB 29 RBASS2 28 RBASS1 LC75421M 27 RTRE 26 RIN 25 RSELO 24 R5 23 R4 22 R3 21 R2 20 R1 19 Vref Top view No. 6866-2/24 LC75421M Equivalent Circuit Block Diagram PA PA µCOM PA VDD VSS CE CL DI 2.2 µF PA 1 µF ROUT 7.68 kΩ 1500 pF 1 µF 2.2 µF 2.2 µF 3 4 2 1 36 35 34 RROUT LROUT 5 LFOUT 33 RFOUT 68 Hz] LFIN 1 µF LOUT 0.15 µF 0.15 µF LSB LBASS2 9 0.082 µF 7.68 kΩ 0.082 µF 10 Control circuit Control circuit LBASS1 Control circuit 28 29 6 32 RFIN 100 Hz] [S-BASS f0 CCB interface 7 31 3.7 kΩ 0.15 µF 0.15 µF 3.7 kΩ RSB RBASS2 0.082 µF 0.082 µF RBASS1 8 30 10 kHz] [BASS f0 1500 pF LTRE 11 RVref LVref 27 RTRE [TREBLE f0 1 µF LIN 12 26 RIN 13 LSELO 25 RSELO 14 L5 15 L4 16 L3 17 L2 18 L1 19 Vref 20 R1 21 R2 22 R3 23 R4 24 R5 22 µF 1 µF 1 µF 1 µF 1 µF 1 µF 1 µF 1 µF 1 µF 1 µF 1 µF No. 6866-3/24 2.2 µF LC75421M Specifications Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V Parameter Maximum supply voltage Maximum input voltage Allowable power dissipation Operating temperature Storage temperature Symbol VDD max VIN max Pdmax Topr Tstg VDD CE, DI, CL Input pins other than CE, DI, CL Ta ≤ 85°C, when mounted on board Conditions Ratings 11 –0.3 to 11 VSS – 0.3 to VDD + 0.3 550 –40 to +85 –50 to +125 Unit V V mW °C °C Allowable Operating Ranges at Ta = –40 to +85°C, VSS = 0 V Parameter Supply voltage Input high-level voltage Input low-level voltage Input amplitude voltage Input pulse width Setup time Hold time Operating frequency Symbol VDD VIH VIL VIN tøW tsetup thold fopg VDD CL, DI, CE CL, DI, CE CL, DI, CE, LIN, RIN, L1 to L5, R1 to R5, LFIN, RFIN CL CL, DI, CE CL, DI, CE CL Pin Name Conditions Ratings min 7.5 4.0 VSS VSS 1 1 1 500 typ max 10 10 1.0 VDD Unit V V V Vp-p µs µs µs kHz Electrical Characteristics at Ta = 25°C, VDD = 8 V, VSS = 0 V Parameter Maximum input gain Step resolution Input resistance Clipping level Output load resistance Symbol Ginmax Gstep Rin Vcl RL L1, L2, L3, L4, L5 R1, R2, R3, R4, R5 LSELO, RSELO LSELO, RSELO THD = 1.0%, f = 1 kHz 10 Pin Name Conditions Ratings min typ +18.75 +1.25 50 2.90 max Unit dB dB kΩ Vrms kΩ Volume Block Parameter Input resistance Symbol Rin Pin Name LIN, RIN Conditions Ratings min typ 50 max Unit kΩ Fader Volume Block Parameter Symbol Pin Name Conditions STEP = 0 dB to –20 dB Step resolution ATstep STEP = –20 dB to –25 dB STEP = –25 dB to –45 dB Step error Output load resistance Output impedance ATerr RL RO LFOUT, LROUT RFOUT, RROUT RL = 10 kΩ, f = 1 kHz VIN = 1 Vrms STEP = 0 dB to –45 dB STEP = –45 dB to –60 dB –2 –3 10 46 Ratings min typ 2 5 10 0 0 +2 +3 dB kΩ Ω dB max Unit No. 6866-4/24 LC75421M Bass Band Control Block Parameter Control range Step resolution Internal feedback resistance Symbol Gbass Estep Rfeed Pin Name Conditions MAX. Boost/Cut Ratings min ±10 1 typ ±11.9 1.7 45.084 max ±14 3 Unit dB dB kΩ Treble Band Control Block Parameter Control range Step resolution Internal feedback resistance Symbol Gtre Estep Rfeed Pin Name Conditions MAX. Boost/Cut Ratings min ±10 1 typ ±11.9 1.7 56.084 max ±14 3 Unit dB dB kΩ Super Bass Block (Type T) Parameter Control range Step resolution Internal feedback resistance Symbol Crange Estep Rfeed Pin Name Conditions MAX. Boost Ratings min typ +20 +2.0 66.6 max Unit dB dB kΩ General Parameter Total harmonic distortion Crosstalk Maximum attenuated output Output noise voltage Input high-level current Input low-level current Symbol THD CT Vomin VN-1 VN-2 IIH IIL Conditions VIN = 1 Vrms, f = 1 kHz, flat overall VIN = 1 Vrms, f = 1 kHz, flat overall, Rg = 1 kΩ VIN = 1 Vrms, f = 1 kHz, main volume –∞ Fflat overall, (IHF-A), RG = 1 kΩ Flat overall, (DIN-AUDIO), RG = 1 kΩ CL, DI, CE VIN = 8 V CL, DI, CE VIN = 0 V –10 Ratings min typ 0.003 80.5 –80 8 10 10 max 0.01 Unit % dB dB µV µV µA µA No. 6866-5/24 LC75421M Control Timing and Data Format To control the LC75421M, input specified serial data to the CE, CL, and DI pins. The data configuration consists of a total of 52 bits broken down into 8 address bits and 44 data bits. CE DI CL 1 µs 1 µ s 1 µ s min min min 1 µs min 1 µs min B0 B1 B2 B3 A0 A1 A2 A3 D0 D1 D2 D3 D4 D5 D38 D39 D40 D41 D42 D43 CE CL DI 1 µs ≤ TDEST BBBBAAAA 01230123 10000001 Address code DDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDDD 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 Volume control Fader step control 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 –∞ dB –60 dB –45 dB –35 dB –25 dB –20 dB –18 dB –16 dB –14 dB –12 dB –10 dB –8 dB –6 dB –4 dB –2 dB 0 dB Bass control Boost 1 1 1 0 STEP15 0 1 1 0 STEP14 1 0 1 0 STEP13 0 0 1 0 STEP12 1 1 0 0 STEP11 0 1 0 0 STEP10 1 0 0 0 STEP9 0 0 0 0 STEP8 1 0 0 1 STEP7 0 1 0 1 STEP6 1 1 0 1 STEP5 0 0 1 1 STEP4 1 0 1 1 STEP3 0 1 1 1 STEP2 1 1 1 1 STEP1 Cut Fader rear/front control 0 Rear 1 Front Input switch control (1) Input switch control (2) Input mute switch control 0 OFF 1 ON TEST mode Input gain control 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 dB +1.25 dB +2.50 dB +3.75 dB +5.00 dB +6.25 dB +7.50 dB +8.75 dB +10.00 dB +11.25 dB +12.50 dB +13.75 dB +15.00 dB +16.25 dB +17.50 dB +18.75 dB Channel selection 0 1 0 1 0 0 1 1 Initial setting Lch Rch L/R simultaneous Treble control Boost 1 1 1 0 STEP15 Super bass control 0 1 1 0 STEP14 1 0 1 0 STEP13 0 0 0 0 STEP0(FLAT) 0 0 1 0 STEP12 1 0 0 0 STEP1 1 1 0 0 STEP11 0 1 0 0 STEP2 0 1 0 0 STEP10 1 1 0 0 STEP3 1 0 0 0 STEP9 0 0 1 0 STEP4 0 0 0 0 STEP8 1 0 1 0 STEP5 1 0 0 1 STEP7 0 1 1 0 STEP6 0 1 0 1 STEP6 1 1 1 0 STEP7 1 1 0 1 STEP5 0 0 0 1 STEP8 0 0 1 1 STEP4 1 0 0 1 STEP9 1 0 1 1 STEP3 0 1 0 1 STEP10(BOOST max) 0 1 1 1 STEP2 1 1 1 1 STEP1 Cut Output gain control 0 0 1 1 0 0 dB 1 0 dB 0 +6.5 dB 1 +8.5 dB Caution: Be sure to set D36 to D38 and D40 to D43 to “0” for the TEST bit of the IC. No. 6866-6/24 LC75421M Volume Control D16 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 D17 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D18 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 D19 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 D20 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 D21 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D22 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D23 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Operation 0dB –1dB –2dB –3dB –4dB –5dB –6dB –7dB –8dB –9dB –10dB –11dB –12dB –13dB –14dB –15dB –16dB –17dB –18dB –19dB –20dB –21dB –22dB –23dB –24dB –25dB –26dB –27dB –28dB –29dB –30dB –31dB –32dB –33dB –34dB –35dB –36dB –37dB –38dB –39dB –40dB –41dB –42dB –43dB –44dB –45dB –46dB –47dB –48dB –49dB –50dB Continued on next page. No. 6866-7/24 LC75421M Continued from preceding page. D16 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 D17 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 D18 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 0 D19 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 D20 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 D21 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 D22 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D23 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Operation –51dB –52dB –53dB –54dB –55dB –56dB –57dB –58dB –59dB –60dB –61dB –62dB –63dB –64dB –65dB –66dB –67dB –68dB –69dB –70dB –71dB –72dB –73dB –74dB –75dB –76dB –77dB –78dB –79dB –∞dB Input Switch Control (L1, L2, L3, L4, L5, R1, R2, R3, R4, R5) D28 0 1 0 1 0 D29 0 0 1 1 0 D32 1 1 1 1 0 Operation L1 (R1) ON L2 (R2) ON L3 (R3) ON L4 (R4) ON L5 (R5) ON No. 6866-8/24 LC75421M Pin Functions Pin No. 18 17 16 15 14 20 21 22 23 24 13 25 Pin Name L1 L2 L3 L4 L5 R1 R2 R3 R4 R5 LSELO RSELO • Input selector output pins • Input signal pins Function Equivalent circuit VDD Ln Rn Vref VDD SELO VDD 10 9 28 29 LBASS1 LBASS2 RBASS1 RBASS2 • Bass band filter configuration capacitor and resistor connection pins VDD BASS1 VDD BASS2 VDD 8 7 30 31 LSB LOUT RSB ROUT • Super bass band filter configuration capacitor and resistor connection pins VDD SB VDD OUT VDD 5 4 33 34 LFOUT LROUT RFOUT RROUT • Fader output pins. The front side and rear side can be attenuated separately. The attenuation is the same for both Left and Right. Continued on next page. No. 6866-9/24 LC75421M Continued from preceding page. Pin No. Pin Name Function Equivalent circuit VDD 11 27 LTRE RTRE • Capacitor connection pin for configuring treble filter TRE VDD • Connect a capacitor of a few tens of µF between Vref and AV SS (V SS ) as a analog ground 0.5 × V DD voltage generator, current ripple countermeasure. 19 Vref Vref 3 35 VSS VDD • Ground pin • Power supply pin • Chip enable pin 2 CE Data is written to the internal latch and the analog switches are operated when the level changes from High to Low. Data transfer is enabled when the level is High. VDD 1 36 DI CL • Serial data pin and clock input pin for control No. 6866-10/24 LC75421M Equivalent Circuit Input Block Diagram L1 50 k L2 50 k L3 50 k L4 50 k L5 50 k +5.00 dB 3.769 k +6.25 dB 3.264 k +7.50 dB 2.826 k +8.75 dB 2.447 k +10.00 dB 2.119 k +11.25 dB 1.835 k +12.50 dB 1.589 k +13.75 dB 1.376 k +15.00 dB 1.192 k +16.25 dB 1.032 k +17.50 dB 0.894 k +18.75 dB 5.774 k +3.75 dB 4.352 k +2.50 dB 5.026 k +1.25 dB 5.804 k 0 dB 6.702 k LSEL0 TOTAL = 50 k LVref Same for right channel Unit: (Resistance: Ω) No. 6866-11/24 LC75421M Volume Block Equivalent Circuit Diagram LIN 0 dB R1 = 5434 R2 = 4845 R3 = 4319 R4 = 3850 R5 = 3431 R6 = 3058 R7 = 2726 R8 = 2429 R9 = 2165 R10 = 1930 R11 = 1720 R12 = 1533 R13 = 1366 R14 = 1218 R15 = 1085 R16 = 967 R17 = 862 R18 = 768 R19 = 685 R20 = 610 R21 = 544 R22 = 485 R23 = 432 R24 = 385 R25 = 343 R26 = 306 R27 = 273 –1 dB –2 dB –3 dB –4 dB –5 dB –6 dB –7 dB –8 dB –9 dB –10 dB –11 dB –12 dB –13 dB –14 dB –15 dB –16 dB –17 dB –18 dB –19 dB –20 dB –21 dB –22 dB –23 dB –24 dB –25 dB –26 dB –27 dB R28 = 243 R29 = 216 R30 = 193 R31 = 172 R32 = 153 R33 = 137 R34 = 122 R35 = 108 R36 = 97 R37 = 86 R38 = 77 R39 = 68 R40 = 61 R41 = 54 R42 = 48 R43 = 86 R44 = 77 R45 = 69 R46 = 61 R47 = 55 R48 = 49 R49 = 87 R50 = 77 R51 = 69 R52 = 61 R53 = 55 R54 = 49 –28 dB –29 dB –30 dB –31 dB –32 dB –33 dB –34 dB –35 dB –36 dB –37 dB –38 dB –39 dB –40 dB –41 dB –42 dB –43 dB –44 dB –45 dB –46 dB –47 dB –48 dB –49 dB –50 dB –51 dB –52 dB –53 dB –54 dB R55 = 87 R56 = 77 R57 = 69 R58 = 61 R59 = 55 R60 = 49 R61 = 87 R62 = 78 R63 = 69 R64 = 62 R65 = 55 R66 = 49 R67 = 87 R68 = 78 R69 = 69 R70 = 62 R71 = 55 R72 = 49 R73 = 87 R74 = 78 R75 = 69 R76 = 62 R77 = 55 R78 = 49 R79 = 44 R80 = 359 –55 dB –56 dB –57 dB –58 dB –59 dB –60 dB –61 dB –62 dB –63 dB –64 dB –65 dB –66 dB –67 dB –68 dB –69 dB –70 dB –71 dB –72 dB –73 dB –74 dB –75 dB –76 dB –77 dB –78 dB –79 dB –∞ dB To Treble Block 794 R81 796 R82 798 R83 800 R84 802 R85 804 R86 Same for right channel Unit: (Resistance: Ω) LVref No. 6866-12/24 LC75421M Treble/Bass/Super Bass Band Block Equivalent Circuit Diagram From Volume Block SW3 SW1 Same for right channel Unit: (Resistance: Ω) ±11.9 dB ±10.2 dB ±11.9 dB ±10.2 dB SW2 SW4 SW1 SW2 SW4 SW3 ±8.5 dB ±6.8 dB ±5.1 dB ±3.4 dB ±1.7 dB ±8.5 dB ±6.8 dB ±5.1 dB ±3.4 dB ±1.7 dB 9.195 k 0 dB 2.908 k 3.661 k 4.608 k 5.802 k 7.304 k 9.195 k 11.576 k 2.908 k 3.661 k 4.608 k 5.802 k 7.304 k 11.030 k LTRE Total = 56.084 k LBASS1 0.030 k Total = 45.084 k 11.576 k LBASS2 No. 6866-13/24 LOUT +20 dB +18 dB +16 dB +14 dB +12 dB +10 dB +8 dB +4 dB +2 dB ±6 dB 1.916 k 2.412 k 3.037 k 3.823 k 4.813 k 6.059 k 7.628 k 9.603 k 12.089 k 15.220 k 0 dB Same for right channel Units: (Resistance: Ω) Total = 66.6 k LSB During boost, SW1 and SW3 are ON, during cut, SW2 and SW4 are ON, when 0 dB, 0 dB SW and SW2 and SW3 are ON. 0 dB LC75421M Fader Volume Block Equivalent Circuit Diagram LFIN S1 S2 0 dB 10.284 k 8.169 k 6.489 k 5.154 k 4.094 k 3.252 k 2.583 k Total = 50 k 2.052 k 1.630 k 1.295 k 2.188 k 1.923 k 0.608 k 0.231 k 0.050 k –2 dB –4 dB –6 dB +8.5 dB –8 dB S3 S4 +6.5 dB 0 dB LFOUT LROUT 26.342 k 4.866 k 50 k 18.792 k –10 dB –12 dB –14 dB –16 dB –18 dB 26.342 k –20 dB –25 dB –35 dB –45 dB –60 dB –∞ dB Same for right channel Unit: (Resistance: Ω) +6.5 dB 4.866 k +8.5 dB 18.792 k 50 k When FADER = “1”, S2 and S3 are ON When FADER = “0”, S1 and S4 are ON 0 dB LVref When –∞ data is sent to the main volume, S1 and S2 become open, and S3 and S4 simultaneously become ON. No. 6866-14/24 LC75421M Tone Circuit Constant Calculation Examples Super Bass Band Circuit The equivalent circuit and the formula for calculating the external RC with a mean frequency of 68 Hz are shown below. • Super bass band equivalent circuit block diagram R1 C1 R2 C2 R3 • Calculation example Specification Mean frequency: f0 = 68 Hz Gain during maximum boost: G = 20 dB Let us use R1 = 0, R2 = 66.6 kΩ, and C1 = C2 = C. We obtain R3 from G = 20 dB. G+20 dB = 20 × LOG10 1 + R2 2R3 R3 = R2 2 10 G+20dB/20 –1 = 66600 ≠ 3.7 KΩ 2 × (10 – 1) We obtain C from mean frequency f0 = 68 Hz. f0= 1 2π R3R2C1C2 1 2πf0 R3R2 C= = 1 2π × 68 66600 × 3700 ≠ 0.15 µF We obtain Q. R3R2 Q= 2R3 1 ≠ 2.1 R3R2 No. 6866-15/24 LC75421M Treble Band Circuit The shelving characteristics can be obtained for the treble band. The equivalent circuit and calculation formula during boost are indicated below. R1 C R2 • Calculation example 1 Specification Set frequency: f = 10000 Hz Gain during maximum boost: G + 14 dB = 14 dB Let us use R1 = 11.030 kΩ and R2 = 45.054 kΩ. The above constants are inserted in the following formula. R2 R1 + (1 / ωC)2 2 G = 20 × LOG10 1 + C= 1 R2 2πf ( G/20 )2 – R12 10 – 1 1 45054 2 ) – 110302 2π10000 ( 5.01–1 = ≠ 6800(pF) Simulation Results Setting 14 dB 12 dB 10 dB 8 dB 6 dB 4 dB 2 dB f = 10 kHz 13.95 11.98 10 8 6 4 2 f = 1 kHz 7.42 6.96 6.34 5.5 4.43 3.13 1.64 No. 6866-16/24 LC75421M • Calculation example 2 Specification Set frequency: f = 10000 Hz Gain during maximum boost: G + 11.9 dB = 11.9 dB Let us use R1 = 11.030 kΩ and R2 = 45.054 kΩ. The above constants are inserted in the following formula. R2 R1 + (1 / ωC)2 2 G = 20 × LOG10 1 + C= 2πf ( 1 R2 )2 – R12 1011.9/20 – 1 1 45054 2 ) – 110302 3.94–1 = 2π10000 ( ≠ 1500(pF) Simulation Results Setting 11.9 dB 10.2 dB 8.5 dB 6.8 dB 5.1 dB 3.4 dB 1.7 dB f = 10 kHz 11.92 10.64 9.17 7.52 5.74 3.88 1.96 f = 1 kHz 0.00 0.00 0.00 0.00 0.00 0.00 0.00 No. 6866-17/24 LC75421M Bass Shelving Circuit The equivalent circuit and calculation formula during boost are shown below. • Bass band equivalent circuit diagram R1 C1 R2 C2 R3 • Calculation example 1 Specification Mean frequency: f0 = 40 Hz Gain during maximum boost: G + 14 dB = 14 dB Let us use R1 = 0 kΩ, R2 = 45.054 kΩ, C1 = 2.2 µF, and C1 >> C2. We obtain R3 from G = 14 dB. G+14 dB = 20 × LOG10 R2 + R3 R3 R3 = R2 10 G/20 –1 = 45054 ≠ 11 KΩ 5.01 – 1 We obtain C2 from mean frequency f0 = 40 Hz. f0= 1 2π R3R2C1C2 1 (2πf0) R2R3C1 2 C2 = = 1 (2π × 40) × 45054 × 11000 × (2.2 × 10–6) 2 ≠ 0.015 µF Simulation Results Setting 14 dB 12 dB 10 dB 8 dB 6 dB 4 dB 2 dB f = 100 Hz 13.55 11.73 9.8 7.89 5.94 3.97 1.99 f = 1 kHz 3.65 3.51 3.31 3 2.55 1.92 1.07 No. 6866-18/24 LC75421M • Calculation example 2 Specification Mean frequency: f0 = 40 Hz Gain during maximum boost: G = 12 dB Let us use R1 = 0 kΩ, R2 = 45.054 kΩ, C1 = 2.2 uF, and C1 >> C2. We obtain R3 from G = 12 dB. G+12 dB = 20 × LOG10 R2 + R3 R3 R3 = R2 10G/20 –1 = 45054 ≠ 15 KΩ 3.98 – 1 We obtain C2 from mean frequency f0 = 40 Hz. f0= 1 2π R3R2C1C2 1 (2πf0)2 R2R3C1 C2 = = 1 (2π × 40)2 × 45054 × 15000 × (2.2 × 10–6) ≠ 0.01 µF Simulation Results Setting 14 dB 12 dB 10 dB 8 dB 6 dB 4 dB 2 dB f = 100 Hz 11.73 10.29 8.74 7.11 5.41 3.65 1.85 f = 1 kHz 4.27 4.07 3.78 3.38 2.82 2.09 1.15 No. 6866-19/24 LC75421M (4) Bass Peaking Circuit The equivalent circuit and the formula for calculating the external RC with a mean frequency of 100 Hz are shown below. • Bass band equivalent circuit diagram R1 C1 R2 C2 R3 • Calculation example Specification Mean frequency: f0 = 100 Hz Gain during maximum boost: G = 11.9 dB Let us use R1 = 0, R2 = 45.084 kΩ, and C1 = C2 = C. We obtain R3 from G = 11.9 dB. G+11.9 dB = 20 × LOG10 1 + R2 2R3 R3 = R2 2 1011.9dB/20 –1 = 45084 ≠ 7.68 KΩ 2 × (3.936 – 1) We obtain C from mean frequency f0 = 100 Hz. f0= 1 2π R3R2C1C2 1 2πf0 R3R2 C= = 1 2π × 100 45084 × 7680 ≠ 0.082 µF We obtain Q. Q= R3R2 • 2R3 1 ≠ 1.66 R3R2 Simulation Results Setting 11.9 dB 10.2 dB 8.5 dB 6.8 dB 5.1 dB 3.4 dB 1.7 dB f = 100 Hz 11.88 10.38 8.79 7.14 5.42 3.66 1.85 f = 1 kHz 0.00 0.00 0.00 0.00 0.00 0.00 0.00 No. 6866-20/24 LC75421M Usage Cautions (1) Upon power application, the internal analog switch status is undefined. Use an external countermeasure such as muting until data is set. (2) When performing initial data setting after applying power, send the initial data once, and then send the initial setting data. (3) To ensure that the digital frequency signal sent to the CL, DI, and CE pins do not spill over to the analog signal block, either guard these signal lines with a ground pattern, or perform transmission using shielded wires. No. 6866-21/24 Attenuation — dB Attenuation — dB Input gain block Input gain block Main volume control block Main volume control block Step setting — dB Graphic equalizer block Fader block Step setting — dB Graphic equalizer block Main Volume Control Step Characteristics Fader Step Characteristics Fader block LC75421M Total harmonic distortion, THD — % Output level — dB Input gain block Input gain block Main volume control block Main volume control block Graphic equalizer block Frequency, f — Hz Step setting — dB Graphic equalizer block Fader block Input Gain Step Characteristics THD — Frequency Characteristics Fader block THD METER No. 6866-22/24 LC75421M THD — Input Level Characteristics Total harmonic distortion, THD — % Total harmonic distortion, THD — % THD — Supply Voltage Characteristics Input level, VIN — dBV Graphic equalizer block Main volume control block Input gain block Input gain block Supply voltage — V Graphic equalizer block Main volume control block Fader block THD METER Fader block THD METER Bass Control Characteristics Treble Control Characteristics Level — dB Frequency, f — Hz Level — dB Frequency, f — Hz Super Bass Characteristics Level — dB Frequency, f — Hz No. 6866-23/24 LC75421M Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer’s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer’s products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products (including technical data, services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be exported without obtaining the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification” for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of September, 2003. Specifications and information herein are subject to change without notice. PS No. 6866-24/24