LV1605M

Ordering number : ENN*7809 Preliminary SANYO Semiconductors DATA SHEET Monolithic Linear IC LV1605M Overview Analog Signal Processor for CD Players The LV1605M implements the analog signal processing and servo control required by compact disc players, and, when combined with a CD DSP such as the LC78604E or LC78605E, can implement a CD player with a minimal parts count. The LV1605M also provides a gain switching pin to allow it to support playback of CD-RW discs. Functions IV amplifier, RF amplifier (with AGC and hold function on defect detection), APC, FE (with VCA), TE (with VCA and auto-balance), focus servo amplifier (with offset canceller and hold function on defect detection), tracking servo amplifier (with offset canceller and hold function on defect detection), spindle servo amplifier (with gain switching function and hold function on defect detection), sled servo amplifier (with on/off function and hold function on defect detection), focus detection (DRF and FZD), track detection (HFL and TES), defect detection, shock detection, and disc mode gain switching function. Features • The LV1605M provides the following automatic adjustment functions. — Focus offset, auto canceller: FE (pin 21) — Tracking offset, auto canceller: TE (pin 7) — E/F balance automatic adjustment — RF level AGC function — Tracking servo gain RF level following function — Focus servo gain RF level following function • Focus search smoothing setting pin: FSC (pin 58) • Focus search mode switching pin: FSS (pin 54) • Play disc mode (normal or CD-RW) switching pin: RW (pin 44) Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft's control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications. SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein. SANYO Electric Co.,Ltd. Semiconductor Company TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 22704TN (OT) No. 7809-1/24 LV1605M Specifications Absolute Maximum Ratings at Ta=25°C, pins 33, 57=GND Parameter Maximum supply voltage Allowable power dissipation Operating temperature Storage temperature Symbol VCC max Pd max Topr Tstg Pins 32, 51 Conditions Ratings 5 200 –25 to +70 –40 to +125 Unit V mW °C °C Operating Condition at pins 33, 57=GND Parameter Recommended supply voltage Allowable operating supply voltage range Symbol VCC VCCop Conditions Ratings 3.3 3.0 to 3.6 Unit V V * Operating Supply Voltage at Limit of Operating Temperature, pins 33, 57=GND Parameter Operating ambient temperature Allowable operating supply voltage range Symbol Topr2 VCCop2 Conditions Ratings –10 to +75 3.0 to 3.6 Unit °C V Package Dimensions unit : mm 3159A 17.2 14.0 48 49 33 32 14.0 64 1 0.8 (1.0) (2.7) 0.35 17 16 0.15 3.0max 0.1 SANYO : QIP64E (14 × 14) 17.2 0.8 No. 7809-2/24 LV1605M Electrical Characteristics/Operating Characteristics at Ta=25°C, with VCC (pins 32, 51)=3.3V, GND (pins 33, 57)=0V Parameter Current drain (active mode) Current drain (sleep mode) Reference voltage Interface: CE - Vtp Interface: CE - Vtn Interface: CL - Vtp Interface: CL - Vtn Interface: DAT - Vtp Interface: DAT - Vtn Interface: Maximum CL frequency RF amplifier: RFSM no signal voltage RF amplifier: Minimum gain (normal) RF amplifier: Minimum gain (CD-RW) Focus amplifier: FDO gain MIN (Normal) Focus amplifier: FDO gain MIN (CD-RW) Focus amplifier: FDO gain MAX (Normal) Focus amplifier: FDO gain MAX (CD-RW) Focus amplifier: FDO offset (Normal) Focus amplifier: FDO offset (CD-RW) Focus amplifier: Offset when off (Normal) Focus amplifier: Offset when off (CD-RW) Focus amplifier: Offset adjustment step Focus amplifier: F search voltage H1 Focus amplifier: F search voltage L1 Focus amplifier: F search voltage H2 Focus amplifier: F search voltage L2 Tracking amplifier: TE gain MAX (CD) Tracking amplifier: TE gain MAX (CD-R) Tracking amplifier: TE gain MAX (CD-RW) Tracking amplifier: TE gain MIN (CD) Tracking amplifier: TE gain MIN (CD-R) Tracking amplifier: TE gain MIN (CD-RW) Tracking amplifier: ∆TE (200k) Tracking amplifier: TGL offset (Normal) Tracking amplifier: TGL offset (CD-RW) Tracking amplifier: THLD offset (Normal) Tracking amplifier: THLD offset (CD-RW) Tracking amplifier: Off 1 offset Tracking amplifier: Off 2 offset Tracking amplifier: Offset adjustment step Tracking amplifier: Balance range - high Tracking amplifier: Balance range - low Symbol ICCO ICCs VREF CEvtp CEvtn CLvtp CLvtn DATvtp DATvtn CLmax RFSMo RFSMgmin1 RFSMgmin1 FDg1 FDg2 FDg1 FDg2 FDost1 FDost2 FDofost1 FDofost2 FEstep FSmax1 FSmin1 FSmax2 FSmin2 TEgmax1 Tegmax2 Tegmax3 TEgmin1 Tegmin2 Tegmin3 ∆TE200k TGLost1 TGLost2 THLDost1 THLDost2 OFF1ost OFF2ost TEstep BAL-H BAL-L RW=H, L FIN1, FIN2: 100kΩ-input, PH1=2.65V RW=H, freq-200kHz, RFSM FIN1, FIN2: 100kΩ-input, PH1=2.65V RW=L, freq-200kHz, RFSM FIN1, FIN2: 100kΩ-input, FIN1=–FIN2, RW=H, FDO, SCI=VR, PH1=2.65V, freq-10kHz, FD FIN1, FIN2: 100kΩ-input, FIN1=–FIN2, RW=H, FDO, SCI=VR, PH1=2.65V, freq-10kHz, FD FIN1, FIN2: 100kΩ-input, FIN1=–FIN2, RW=H, FDO, SCI=VR, PH1=1.0V, freq-10kHz, FD FIN1, FIN2: 100kΩ-input, FIN1=–FIN2, RW=L, FDO, SCI=VR, PH1=1.0V, freq-10kHz, FD The difference from the reference voltage, RW=high, servo on, FH=VR The difference from the reference voltage, RW=low, servo on, FH=VR The difference from the reference voltage, RW=high, servo off, FH=VR The difference from the reference voltage, RW=low, servo off, FH=VR FE FDO, FSS=ground, the difference from VR FDO, FSS=ground, the difference from VR FDO, FSS=VCC, the difference from VR FDO, FSS=VCC, the difference from VR freq-10kHz, E, F: 180kΩ-input, E=–F, PH1=1.0V, RW=H, TE freq-10kHz, E, F: 180kΩ-input, E=–F, PH1=1.0V, RW=H, TE freq-10kHz, E, F: 180kΩ-input, E=–F, PH1=1.0V, RW=L, TE f=10kHz, E, F: 180kΩ-input, E=–F, PH1=2.65V, RW=H, TE f=10kHz, E, F: 180kΩ-input, E=–F, PH1=2.65V, RW=H, TE f=10kHz, E, F: 180kΩ-input, E=–F, PH1=2.65V, RW=L, TE E, F:180kΩ-input, RW=H, E=–F, TE, ∆TE200k=TE (10kHz) – TE(200kHz) Servo: on, TH=VR, TGL=H, RW=H, TO Servo: on, TH=VR, TGL=H, RW=L, TO THLD mode, RW=high, the difference from VR, TA THLD mode, RW=low, the difference from VR, TA TOFF=H, TO TOF2 off (IF), TO TE ∆gain E/F input, TB=3.3V ∆gain E/F input, TB=0V –250 –450 –120 –120 –120 –120 +23.0 +11.5 +17.5 –300 –450 –100 –100 Conditions AVCC (pin32) + DVDD (pin51), pin55=3.3V AVCC (pin32) + DVDD (pin51), pin55=0V VR CE CE CL CL DAT DAT 500 0.60 0.5 12.5 –3.5 1.15 4.5 16.5 +0.5 +12.5 +6.5 +18.5 0 0 0 0 18 0.25 –0.25 0.25 0 +21.75 +18.75 +33.75 +15.0 +12.0 +27.25 12.0 0 0 0 0 0 0 40 +3.5 –3.5 +250 +450 +120 +120 +120 +120 +31.5 +18.5 +26.0 +300 +450 +100 +100 1.70 8.5 20.5 +4.5 1.50 Ratings min 5 typ 16 7.5 1.65 1.9 1.2 1.9 1.2 1.9 1.2 1.80 max 30 Unit mA mA V V V V V V V kHz V dB dB dB dB dB dB mV mV mV mV mV V V V V dB dB dB dB dB dB dB mV mV mV mV mV mV mV dB dB Continued on next page. No. 7809-3/24 LV1605M Continued from preceding page. Parameter Tracking servo switching threshold TOFF-VTH Tracking gain switching threshold TGL-VTH PH BH DRF DRF DRF FZD FZD HFL HFL HFL TES TES TES TES JP JP No signal voltage No signal voltage Detection voltage Output voltage - high Output voltage - low Detection voltage 1 Detection voltage 2 Detection voltage Output voltage - high Output voltage - low Detection voltage LH Detection voltage HL Output voltage - high Output voltage - low Output voltage - high Output voltage - low Symbol TOFFvth TGLvth PHo BHo DRFvth DRF-H DRF-L FZD1 FZD2 HFLvth HFL-H HFL-L TES-LH TES-HL TES-H TES-L JP-H JP-L SPD12ost SPD8ost SPDof SPD-H12 SPD-L12 SPD-H8 SPD-L8 SLDost SLDost SLDof RWvth SCIo SCIvthH SCIvthL DEFvth DEF-H DEF-L LDS LDDof The LDS voltage such that LDD=1.65V LDD +100 +2.85 TJP=3.3V, at SLD TJP=0V, at SLD The difference from VR at SPD, 12cm mode The difference from VR at SPD, 8cm mode The difference from VR at SPD, off mode The difference from offset 12, 12cm mode, CLV=3.3V The difference from offset 12, 12cm mode, CLV=0V The difference from offset 8, 8cm mode, CLV=3.3V The difference from offset 8, 8cm mode, CLV=0V The difference from TO at SLEQ The difference from VR when SLEQ=VR Off mode RW SCI, the difference from VR SCI, the difference from VR SCI, the difference from VR With RFSM=2.0V, the difference between the Defect: Detection voltage Defect: Output voltage - high Defect: Output voltage - low APC: Reference voltage APC: Off voltage LF2 voltage on disc defect detection and the LF2 voltage when RF=2.0V. 2.4 3.0 0 +170 +3.15 +0.5 +240 V V mV V +0.10 +0.35 +0.60 V –70 –180 –180 +1.0 –70 +20 –140 –100 –100 –120 +0.3 –0.8 +0.1 TESI, the difference from VR TESI, the difference from VR –0.15 +0.02 +2.3 FE, the difference from VR FE, the difference from VR The difference from VR at RF +2.4 0 The difference from RFSM The difference from RFSM The difference from VR at RFSM Conditions Ratings min +1.0 +1.0 –0.9 +0.4 –0.40 +2.7 –0.65 +0.65 –0.2 +3.15 0 +0.2 0 –0.18 +3.15 0 –0.085 +0.085 +3.15 0 +1.0 –1.0 0 0 0 +0.5 –0.5 +0.23 –0.23 0 0 0 +1.65 0 +80 –80 +70 +280 +280 +2.3 +70 +140 –20 +100 +100 +120 +0.8 –0.3 +0.36 +0.5 +0.5 –0.02 +0.15 +0.5 typ max +2.05 +3.05 –0.4 +0.9 0 Unit V V V V V V V V V V V V V V V V V V mV mV mV V V V V mV mV mV V mV mV mV Spindle amplifier: Offset12 Spindle amplifier: Offset8 Spindle amplifier: Offset off Spindle amplifier: Output voltage H12 Spindle amplifier: Output voltage L12 Spindle amplifier: Output voltage H8 Spindle amplifier: Output voltage L8 Sled amplifier: SLEQ offset Sled amplifier: Offset SLD Sled amplifier: Offset off Disc switching: RW-VTH Anti-shock: No signal voltage Anti-shock: Detection voltage - high Anti-shock: Detection voltage - low No. 7809-4/24 LV1605M Pin Functions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 Pin name FIN2 FIN1 E F TB TE– TE TESI SCI TH TA TD– TD JP TO FD FD– FA FA– FHO FE FE– FH SP SPG SP– SPD SLEQ SLD SL– SL+ DVCC DGND TGL TOFF TES TJP HFL CLV INTI CL DAT CE RW CLK DEF DRF RFSM RF– PH1 AVCC NC FAJON FSS PON LF2 AGND FSC BH1 REFI VR LDD LDS TC O O I I I I I I O I O I I I I I I I O O O O I I O O O O O I O I I I/O I I I I I Pickup photodiode connection Pickup photodiode connection. The TE signal is generated by subtraction with the F pin. Pickup photodiode connection TE signal DC component input The TE signal gain is set by connecting a resistor between this pin and the TE pin. TE signal output TES (tracking error sense) comparator input. Apply a bandpass filter to the TE signal and input the result to this pin. Shock detection input Tracking gain time constant setting TA amplifier output Used for the tracking phase compensation constant formed between the TD and VR pins. Tracking phase compensation constant connection Tracking jump signal (kick pulse) amplitude setting Tracking control signal output Focusing control signal output Used for the focusing phase compensation constant formed between the FD and FA pins. Used for the focusing phase compensation constant formed between the FD- and FA- pins. Used for the focusing phase compensation constant formed between the FA and FE pins. Focus gain time constant setting FE signal output The FE signal gain is set by connecting a resistor between this pin and the FE pin. Focus gain time constant setting CLV input signal single-end output Spindle 12 cm mode gain setting resistor connection Used for the spindle phase compensation constant in conjunction with the SPD pin. Spindle control signal output Sled phase compensation constant setting Sled control signal output Input for the sled advance signal from the microcontroller. Input for the sled advance signal from the microcontroller. Digital system VCC Digital system ground Input for tracking gain control signal from the DSP. The gain is low when TGL is high. Input for tracking gain control signal from the DSP. The gain is off when TOFF is high. Outputs for the TES signal to the DSP. Input for the tracking jump signal from the DSP The high frequency level (HFL) signal is used to judge whether the position of the main beam is over a pit or over a mirror area. CLV error signal from the DSP Forced defect detected state signal input Microcontroller command clock input Microcontroller command data input Microcontroller command chip enable input Gain switching input. RW=high: CD mode, RW=low: CD-RW mode. Reference clock input. The DSP 130kHz clock signal is input to this pin. Disc defect detection output Defect RF: RF level detection output RF output In conjunction with the RFSM pin, sets the RF gain and is used for the EFM signal 3T compensation constant setting. RF signal peak hold capacitor connection Analog system VCC. NC (no connection) Focus offset adjustment mode switching. FAJON=low: normal mode, FAJON=high: constant voltage FD mode. Focus search select (FSS): focus search mode (± or + search relative to the reference voltage) switching. Power On. PON=high: active mode, PON=low: sleep mode Disc defect detection time constant setting Analog system ground Focus search smoothing capacitor connection RF signal bottom hold capacitor connection Reference voltage bypass capacitor connection Reference voltage output APC circuit output APC circuit input Tracking signal peak hold capacitor connection Description Pickup photodiode connection. The RF signal is generated by adding to the FIN1 pin, and the FE signal is generated by subtracting. No. 7809-5/24 LV1605M Switching Characteristics Relationships Between Control Pin Voltages and Operating Modes (VCC (pins 32, 51)=3.3V, GND (pins 33, 57=0V) TGL (pin 34) Tracking gain switching Mode High gain Low gain Min 0V 3.05V Max 0.5V 3.3V TOFF (pin 35) Tracking servo on/off switching Mode Tracking servo: on Tracking servo: off Min 0V 2.05V Max 0.5V 3.3V INTI (pin 40) Forces the defect detection signal to the high level Mode Defect detected signal forced to high function: on Defect detected signal forced to high function: off Min 0V 2.0V Max 1.0V 3.3V RW (pin 44) RF and servo system high gain (+12 dB) switching Mode CD mode CD-RW mode Min 2.0V 0V Max 3.3V 1.0V Gain increase Low Hi FAJON (pin 53) Focus offset adjustment mode switching Mode Sony coupler mode Coupler other than Sony mode Min 2.0V 0V Max 3.3V 1.0V FSS (pin 54) Focus search mode switching Mode Search ± relative to the reference voltage Search only in the + direction relative to the reference voltage Min 3.0V 0V Max 3.3V 0.5V PON (pin 55) Sleep mode switching Mode Active mode Sleep mode Min 3.0V 0V Max 3.3V 0.5V No. 7809-6/24 LV1605M Equivalent Circuit FAJON AGND AVCC RFS– 49 48 RFSM 47 DRF 46 DEF 45 CLK BAL VCA Microcontroller interface 44 RW 43 CE 42 DAT 41 CL 40 INTI T. servo & T. logic 39 CLV 38 HFL 37 TJP F. servo & F. logic Spindle servo Sled servo 36 TES 35 TOFF 34 TGL HOLD FD 16 17 FD– 18 FA 19 FA– 20 FHO 21 FE 22 FE– 23 FH 24 SP 25 SPG 26 SP– 27 SPD 28 SLEQ 29 SLD 30 SL – REFI PON LDD FSC BH1 64 FIN2 1 FIN1 2 I/V E3 F4 TB 5 TE – 63 APC 62 61 60 REF 59 58 57 56 55 54 53 52 51 RF Amp 50 RF DET VCA 6 TE 7 TESI 8 SCI 9 TH 10 TA 11 TD– 12 TD 13 JP 14 TO 15 PH1 LDS FSS LF2 NC VR TC 33 DGND 31 SL+ 32 DVCC A13932 No. 7809-7/24 LV1605M Test Circuit AVCC 10µF + 10µF + + 0.01µF + 0.01µF AGND 0.01µF 47µF AVCC AGND 0.01µF 0.33µF 0.01µF 1µF FAJON AVCC + + 15kΩ RFS– REFI PON LDD FSC BH1 PH1 LDS FSS LF2 NC VR 64 F2I F1I EI FI 0.01µF 10kΩ 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 RFSM FIN2 100kΩ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 FD– 18 FA 19 FA– 20 FHO 21 FE 22 – FE 23 FH 24 SP 25 SPG 26 SP– 27 SPD 28 SLEQ 29 SLD 30 SL– 31 SL+ 32 DVCC FIN1 100kΩ 47 DRF 46 DEF 45 44 43 42 CLK RW CE DAT CL INTI CLV HFL TJP TES TOFF TGL DGND CLOCK E 180kΩ F 180kΩ TB TE– 10kΩ TE TESI SCI REF LV1605M 41 40 39 38 37 36 35 34 33 TH 3300pF TA 62kΩ 62kΩ 3300pF TD– TD JP REF 2.2kΩ TO FD 33kΩ 20kΩ 33kΩ 20kΩ 0.01µF + 22kΩ 15kΩ 33kΩ 100pF 56kΩ 15kΩ REF 10µF DVDD REF DGND A13933 Operational Description • APC (Automatic laser power control) This circuit is provided to control the pickup laser power. The laser on/off state is set by the microcontroller. • RF amplifier (eye pattern output) The (A + C) component of the pickup photodiode output current is input to FIN2 (pin 1), and the (B + D) component is input to FIN1 (pin 2). The input current is converted to a voltage. That signal is passed through the AGC circuit and output from the RFSM amplifier output RFSM pin (pin 48). The internal AGC circuit has a variable gain range of ±3 dB, and its time constant can be changed by adjusting the value of the external capacitor connected to PH1 (pin 50). The bottom level of the EFM signal (the RFSM output) is controlled, and the response of this function can be changed by adjusting the value of the external capacitor connected to BH1 (pin 59). The center value of the range of the AGC circuit is set by the value of the resistor inserted between RFSM (pin 48) and RFS- (pin 49). If required, these pins can also be used for EFM signal 3T compensation. When playing CD-RW discs, the input gain is increased when the IC receives a signal from the DSP that sets RW (pin 44) low. No. 7809-8/24 15kΩ TC 1pF LV1605M • Focus Servo The focus error signal is acquired by detecting the difference (B+D) – (A+C) of the (A+C) and (B+D) signals from the pickup. This focus error signal is then passed through the VCA circuit, whose gain following is controlled by the RF AGC circuit, and is output from FE (pin 21). The gain applied to the focus error signal is set by the value of the resistor connected between FE (pin 21) and FE– (pin 22). When playing CD-RW discs, the input gain is increased when the IC receives a signal from the DSP that sets RW (pin 44) low. Offset cancellation is applied to the FE amplifier. This offset cancellation operation is provided to cancel the offset of the IC's internal I-V amplifier and other circuits. Adjustment of this function is started by issuing a FOCUS-OFFSET ADJUST START command and completes about 130ms later. The FOCUS-OFFSET ADJUST OFF command is provided to return the IC's state to the state preceding the offset cancellation operation. The FA amplifier is provided as a pickup phase compensation amplifier, and it's equalizer curve is set with an external capacitor and resistor. This amplifier has a muting function, and mutes the output either when an F-SERVO OFF command is issued in VCC ON mode or during an F-SEARCH operation. Issue either a LASER ON or an FSERVO ON command to turn focus search on. The FH amplifier modifies the servo response characteristics on disc defect detection with SCI (pin 9). The FD amplifier includes both a phase compensation circuit and a focus search signal synthesis function. A focus search operation is started with the F-SEARCH command, a ramp waveform is generated using an internal clock, and the operation completes in about 560ms. Focus is detected (focus zero cross detection) using the focus error signal created from that waveform, and the focus servo is turned on. The amplitude of the ramp waveform is set by the value of the resistor connected between FD (pin 16) and FD- (pin 17). FSC (pin 58) is used to smooth the focus search ramp waveform; a capacitor for this purpose is connected between FSC and REF. FSS (pin 54) is the focus search mode switching pin; if FSS is shorted to VCC, the IC performs a + search relative to the reference voltage, and if FSS is left open or shorted to ground, the IC performs a ± search. FAJON (pin 53) is the focus offset adjustment mode switching pin, and is normally shorted to ground. Short this pin to VCC to set the IC to operate in Sony coupler mode. • Tracking servo The photodiode output current is input to E (pin 3) and F (pin 4). The input current is I-V converted, and the voltage signal passes through first the balance adjustment VCA circuit and then the VCA circuit, whose gain following is controlled by the RF AGC circuit, and is output from TE (pin 7). The value of the resistor connected between TE(pin 6) and TE (pin 7) sets the tracking error gain. When playing CD-RW discs, the input gain is increased when the IC receives a signal from the DSP that sets RW (pin 44) low. Furthermore, in E/F balance mode, the gain is lowered by 3 dB when the tracking signal peak value is over VREF + 0.6V. Offset cancellation is applied to the TE amplifier. This offset cancellation operation completes in about 60ms. The TRACK-OFFSET ADJUST OFF command is provided to return the IC's state to the state preceding the offset cancellation operation. The TH amplifier detects either the TGL signal from the DSP or the JP signal, and changes the servo response characteristics according to the internally generated THLD signal and other signals. The tracking servo switches to THLD mode internally on disc defect detection. This operation can be avoided by simply shorting DEF (pin 46) to ground (the low level). A bandpass filter that extracts just the mechanical shock (skip detection) component from the tracking error signal is formed externally at SCI (pin 9), and if injected, the gain is increased automatically when a shock (skip) is detected. The LV1605M includes an internal resistor so that a low-pass filter can be formed at the TA output (pin 11). The TD amplifier is a circuit provided for servo loop phase compensation. Its characteristics are set with an external RC circuit. This amplifier has a muting function, and the muting function operates either when VCC is turned on and when a TRACK-SERVO OFF command has been issued. This muting function is released when a TRACK-SERVO ON command is issued. The TOFF amplifier immediately following TD (pin 13), functions to turn off the servo according to the TOFF signal from the DSP. The TO amplifier includes a function for synthesizing JP pulses, and the JP pulse is set with JP (pin 14). (THLD is detected internally.) No. 7809-9/24 LV1605M • Sled servo The response characteristics are set with SLEQ (pin 28). The amplifier that follows SLEQ (pin 28) provides a muting function; that muting function is turned on by the SLED OFF command. The sled is advanced by applying a current input to SL- (pin 29) and SL+ (pin 30). In particular, connect the SLEQ pin to a microcontroller output port via a resistor, and set the sled advance gain by the value of that resistor. Note that an offset in the SLD output will occur if there is a discrepancy between the values of the SL- (pin 29) and SL+ (pin 30) resistors. The muting function also operates on disc defect detection. • Spindle servo A servo circuit to hold the disc at a constant linear speed is formed in conjunction with the DSP. The IC receives a signal from the DSP at CLV (pin 39) and outputs a signal from SPD (pin 27). The equalizer characteristics are set with SP (pin 24), SP- (pin 26), and SPD (pin 27). The 12cm mode amplifier gain is set by the resistor connected between SPG (pin 25) and the reference voltage. In 8cm mode, the amplifier is buffered internally and independent of SPG (pin 25). Note that the gain must first be set for 8cm mode and then set for 12cm mode. Note that circuit can be forcibly set to the 8cm mode gain regardless of the 8/12cm mode setting by setting SPG (pin 25) to the open state. The muting function operates on disc defect detection. • TES and HFL (traversal signals) When the pickup moves from the outside of the disc towards the inside, the EF output from the pickup is connected so that the HFL and TES signals have the phase relationship shown in the figure. The TES comparator is a negative polarity comparator with respect to the TESI input, and has a hysteresis of about ±100mV. A bandpass filter used to extract only the required signal components from the TE signal is formed externally. 2.1V RFSM 1.47V 1.1V HFL TES TE A13934 • DRF (optical amplitude judgment) A peak hold function using the PH1 (pin 50) capacitor is applied to the EFM signal (RFSM output). This circuit outputs a high level when the RFSM peak value exceeds about 1.45V. The PH1 (pin 50) capacitor is related to the settings for both the DRF detection time constant and the RF AGC response. DRF 2.1V RFSM FE Pickup position Point where focus is achieved 1.45V 1.1V A13935 No. 7809-10/24 LV1605M • Focus judgment The pickup is judged to get in focus when the Scurve reaches the REF level after the level REF + 0.2 V has been detected in the focus error signal Scurve. REF+0.2V Point where focus is achieved A13936 • Disc defect detection The mirror surface detection level is held by the capacitor connected to LF2 (pin 56), and a high level is output from DEF (pin 46) if the dropout level in the EFM signal (RFSM output) rises above 0.35V. When DEF (pin 46) goes high, the tracking servo goes to THLD mode. To prevent the tracking servo from going to THLD mode when a disc defect is detected, either short DEF (pin 46) or short LF2 (pin 56) to ground. This prevents the DEFECT output from being issued. EFM signal (RFSM output) LF2(Pin 56) 0.35V DEF(Pin46) A13937 • Microcontroller interface Since the Reset (Nothing) command initializes the LV1605M, it must be used with care. The LV1605M's command acceptance (mode switching) timing is such that the mode switches on the (130kHz) clock cycle following the CE (RWC) falling edge. Therefore, a low-level period in the CE signal of at least 10 µs is required when issuing consecutive commands. The 130kHz clock is required for this reason. The various LV1605M instructions can be issued by setting CE high and then, in synchronization with the CL clock, issuing the command from the microcontroller, LSB first, to DAT (pin 42). Note that commands are executed starting at the fall of the CE signal. Timing Chart CE(RWC) CL(CQCK) DAT(COIN) LSB MSB A13938 * Items in parentheses are DSP pin names. No. 7809-11/24 LV1605M • Reset circuit The power on reset is cleared when VCC rises above about 2.0V. • Notes on PCB pattern design Since noise may enter RFSM (pin 48) from CLV (pin 39), shielding must be run between these lines. • VCC, REF, GND, and NC pins AVCC (pin 51): Analog system DVCC (pin 32) Digital system AGND (pin 57): Analog system DGND (pin 33): Digital system NC (pin 52): No connect VR (pin 61): Reference voltage Command Table MSB 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 0 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 LSB 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 RESET FOCUS START FOCUS-OFFSET ADJUSTMENT START FOCUS-OFFSET ADJUSTMENT OFF TRACK-OFFSET ADJUSTMENT START TRACK-OFFSET ADJUSTMENT OFF LASER ON: F-SERVO ON LASER OFF: F-SERVO ON LASER OFF: F-SERVO OFF SPINDLE 8CM SPINDLE 12CM SPINDLE OFF SLED ON SLED OFF E/F BALANCE START TRACK-SERVO OFF TRACK-SERVO ON Adjustment not performed q q q q Command During a reset During the power on state DSP RESET (Nothing) FOCUS START#1 No. 7809-12/24 LV1605M Notes on Microcontroller Software Implementation • Command relationships Since the IC internal registers are cleared after either a FOCUS START or an E/F BALANCE START command is issued, applications must issue a 11111110 (= FEh (hexadecimal)) command after either of those commands. Reason: Those two commands are executed at point (1) in the timing chart below. However, after that, if a CE signal such as that shown below is input, the data will be executed again as the same command at point (2) in the timing chart. 1 At least 2µs CE At least 1µs CL At least 1µs DAT LSB 0 0 0 0 0 1 1 1 0 1 0 0 0 0 MSB 0 : FOCUS START command 1 : E/F BALANCE START command A13939 2 At least 10µs At least 2µs When either a TRACK-OFFSET ADJUST START or a FOCUS-OFFSET ADJUST START command is issued after either a VCC ON (POWER ON RESET), RESET, or a corresponding OFFSET ADJUST OFF command, the wait time shown below is required. (Note that this applies in the state where the 130kHz clock is input.) TRACK-OFFSET ADJUST START: At least 4ms FOCUS-OFFSET ADJUST START: At least 4ms • Notes on E/F balance adjustment The E/F balance adjustment must be performed not on a disc mirror area, but on a disc pit area. Also, since track kick operations are not performed during the EF balance adjustment, care must be taken that a stable TE signal is acquired. (For example, by performing sled advance operations from the microcontroller.) No. 7809-13/24 LV1605M Pin Internal Equivalent Circuits Pin No. Pin Equivalent circuit VCC 1 (2) 1 2 FIN2 FIN1 500Ω GND 80kΩ 250kΩ A13940 VCC 500Ω 3 4 E F 3 (4) 100kΩ 7pF 1kΩ 500Ω 10pF GND VCC A13941 5 TB 5 500Ω GND VCC A13942 6 17 22 26 28 TE– FD– FE– SP– SLEQ (6,17,22, 26,28,30) 6 500Ω GND A13943 Continued on next page. No. 7809-14/24 LV1605M Continued from preceding page. Pin No. Pin Equivalent circuit VCC 500Ω 7 10 21 23 TE TH FE FH 7 (21) 30kΩ 500Ω 500Ω 500Ω 33kΩ 10 (23) 66kΩ GND VCC A13944 8 500Ω 8 36 TESI TES 500Ω 36 200kΩ VCC GND A13945 1kΩ 9 34 SCI TGL 1kΩ 9 50kΩ 50kΩ 34 GND VREF VCC A13946 11 12 TA TD– 500Ω 12 500Ω 10kΩ 11 GND A13947 Continued on next page. No. 7809-15/24 LV1605M Continued from preceding page. Pin No. Pin Equivalent circuit VCC 13 TD 13 500Ω 10kΩ 500Ω 10kΩ GND VCC A13948 9 14 JP 500Ω 500Ω 20kΩ 10kΩ GND VCC A13949 10pF 15 TO 500Ω 12 40kΩ GND VCC A13950 16 27 58 FD SPD FSC 500Ω 16 (27,58) GND A13951 Continued on next page. No. 7809-16/24 LV1605M Continued from preceding page. Pin No. Pin Equivalent circuit VCC 15pF 500Ω 500Ω 500Ω 18 20 GND VCC 19 18 19 20 FA FA– FHO 240kΩ 40kΩ GND A13952 VCC 500Ω 500Ω 500Ω 500Ω 25 24 25 SP SPG 24 500Ω 5pF GND 50kΩ VCC A13953 29 10kΩ 10kΩ 30 31 500Ω 10kΩ 500Ω 50kΩ 29 30 31 SLD SL– SL+ 500Ω GND VCC A13954 35 35 TOFF 500Ω GND A13955 Continued from preceding page. No. 7809-17/24 LV1605M Continued from preceding page. Pin No. Pin Equivalent circuit VCC 37 TJP 37 60kΩ 500Ω 40kΩ GND VCC A13956 38 46 47 HFL DEF DRF 38 (46,47) 500Ω 50kΩ A13957 GND VCC 10kΩ 39 CLV 39 80kΩ 500Ω 500Ω 24 GND V VCC A13958 40 40 INTI 1kΩ 1kΩ GND A13959 Continued from preceding page. No. 7809-18/24 LV1605M Continued from preceding page. Pin No. Pin Equivalent circuit VCC 41 42 43 45 CL DAT CE CLK 41 (42,43,45) 500Ω GND VCC A13960 44 RW 44 500Ω GND A13961 VCC 1kΩ 1kΩ 1kΩ 48 50 59 RFSM PH1 BH1 1kΩ 1kΩ 500Ω 48 1kΩ GND VCC 59 VCC 50 GND GND A13962 VCC 49 49 RF– 500Ω 500Ω 5kΩ 500Ω 10kΩ 5kΩ GND A13963 Continued from preceding page. No. 7809-19/24 LV1605M Continued from preceding page. Pin No. Pin Equivalent circuit VCC 53 FAJON 53 500Ω GND VCC A13964 50kΩ 54 FSS 54 10kΩ 50kΩ GND VCC A13965 55 55 PON 100kΩ 91kΩ 50kΩ 12kΩ GND VCC A13966 56 56 LF2 50kΩ 50kΩ 1kΩ GND A13967 Continued from preceding page. No. 7809-20/24 LV1605M Continued from preceding page. Pin No. Pin Equivalent circuit VCC 50kΩ 5pF 60 61 REFI VR 60 500Ω 1kΩ 25kΩ 50kΩ 1kΩ 61 GND VCC 20kΩ A13968 180kΩ 62 LDD 200Ω 62 2.5kΩ GND V VCC A13969 50kΩ 63 LDS 50kΩ 500Ω 63 GND VCC A13970 1kΩ 64 64 TC GND A13971 No. 7809-21/24 LV1605M Application Circuit DVSS 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 DVSS S1 S2 S3 S4 S5 S6 REMOTE PUIN S7 COM1 COM2 COM3 DVDD 49 50 51 52 53 54 55 56 57 58 59 AVSS 60 61 62 63 AVDD 64 10kΩ FMAMB CLOSE CLK (130kHz) CQCKB DVSS FSEQ CLVC TOFF COIN EFMI RWC RWB DEFI DRF JPO TES 1 330Ω 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 DVSS 5.6kΩ 10pF 4.7kΩ 6.8kΩ 1pF 48 RFSM 49 RFS– AVCC + 0.001µF 47 DRF 46 DEF 45 CLK 44 RW 43 CE 42 DAT 41 CL 40 INTI 39 CLV 38 HFL 37 TJP 36 TES TGL HFL DVDD TUNERIN MONI3 MONI2 MONI1 TUNERSB CDRESB AD1 AD2 AD3 AVSS PDO ISET FR AVDD SLCD LC78605E COM4 XIN32K 32 XOUT32K 31 XVDD 30 XIN16M 29 XOUT16M 28 XVSS 27 R-CHO 26 LRVSS 25 LRVDD 24 L-CHO 23 MODE 22 AMUTEB 21 DMUTEB 20 SL– 19 SL+ 18 DVDD 17 DVCC 35 TOFF 34 TGL 33 DGND 100kΩ DVCC 32 SL+ 31 1µF 50 PH1 51 AVCC 52 NC 53 FAJON 3300pF SL– 30 SLD 29 SLEQ 28 100kΩ P-OP 10kΩ 0.22µF 4.7µF 10kΩ 180kΩ 47pF P-OP 1kΩ REF REF 0.1µF REF 8.2kΩ 0.33µF REF REF 0.01µF 47µF + 54 FSS 55 PON 0.01µF SPD 27 – SP 26 56 LF2 57 AGND LV1605M SPG 25 SP 24 FH 23 FE– 22 FE 21 FHO 20 – FA 19 FA 18 FD– 17 56kΩ 33kΩ 3300pF AGND 0.01µF + 4.7µF REF + 58 FSC 59 BH1 60 REFI 0.33µF AVCC 10µF + AVCC LASER 10Ω 0.47µF MONI + 0.01µF + 10µF + 61 VR 62 LDD 63 LDS TESI FIN2 FIN1 TD– 20kΩ 18000pF 1.5kΩ 3300pF 68kΩ 15kΩ 0.001µF TO TH TD FD TB TE TA JP 1 100kΩ 100kΩ 100kΩ 2 100kΩ 3 180kΩ 4 180kΩ 5 6 4.7kΩ 7 0.033µF 8 9 0.047µF 4.7kΩ 10 0.1µF 11 3300pF 12 13 14 3.9kΩ 15 P-OP 16 1500pF E F AGND 22kΩ 0.1µF TE– 0.01µF 64 TC SCI 33kΩ 0.1µF 150kΩ REF PICK UP 220kΩ 0.1µF REF REF 2.2kΩ 27kΩ 39kΩ P-OP A13972 No. 7809-22/24 LV1605M Product Package Allowable operating supply voltage VCCop max VCCop min1 VCCop min2 Recommended supply voltage Current drain Automatic adjustment function Adjustment position: FE Focus offset adjustment Maximum adjustment time Adjustment position: FD 270ms Adjustment position: FE 30ms Adjustment position: FE 30ms Adjustment position: FE 30ms (The adjustment range is four times that of the LA9242M) 130ms Adjustment position: TE Tracking offset adjustment Maximum adjustment time Adjustment position: TO 30ms Adjustment position: TE 30ms Adjustment position: TE 30ms Adjustment position: TE 30ms (The adjustment range is four times that of the LA9242M) 60ms E/F balance automatic adjustment RF level AGC function RF amplitude at the recommended supply voltage RF amplitude at VCCmin RF hold on disc defect detection Tracking servo gain RF level following function Focus servo gain RF level following function Focus search time Playback speed Tracking signal output (Track kick during E/F balance adjustment) Focus search smoothing capacitor pin: FSC E/F balance setting range adjustment pin: TBC Focus search mode switching pin: FSS HFL detection Vth DRF current capacity APC reference voltage The LCD voltage such that LDD=3V 2.3V About 100µA 2× Built in × × × 2.1V About 250µA 1.8Vp-p 1.8Vp-p 1.5Vp-p 1.5Vp-p 1.4Vp-p q q q q q 5.0V 32mA 5.5V 5.5V 5.5V 5.5V 3.6V 3.6V: t=–25 to +75°C 3.6V: t=–25 to +75°C 3.2V: t=–25 to +75°C 3.2V: t=–25 to +75°C 3.0V: t=–10 to +75°C 3.4V: t=–5 to +75°C 5.0V 32mA 3.0V: t=–10 to +75°C 3.0V: t=–10 to +75°C 5.0V 32mA 5.0V 34mA 3.3V 16mA LA9230M QIP-64E LA9240M QIP-64E LA9241M QIP-64E LA9242M QIP-64E LV1605M QIP-64E 1.3Vp-p × q × About 280ms 1.2Vp-p: VCC=3.4V × q × About 560ms 4× No output provided q q q 0.9Vp-p: VCC=3.0V × q × About 560ms 4× No output provided q q q 2.1V About 250µA 0.9Vp-p: VCC=3.0V × q × About 560ms 4 × (normal mode) No output provided q q q 2.1V About 250µA 1.3Vp-p: VCC=3.0V q q q About 560ms 4× No output provided q × q 1.47V About 100µA 170mV: typ 180mV: typ 180mV: typ 190mV: typ 190mV: typ (The LDS voltage such that LDD=1.65V) Pin 52 q q q No connect pins RW disc playback support Hold function for focus, spindle, and sled servos during disc defect detection Tracking hold function during disc defect detection Pins 46, 47, 48, and Pin 48 55 × × q × × q Pins 23 and 48 × × q Pins 23 and 48 q × q No. 7809-23/24 LV1605M Specifications of any and all SANYO products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer's products or equipment. SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all semiconductor products fail with some probability. It is possible that these probabilistic failures could give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire, or that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO products(including technical data,services) described or contained herein are controlled under any of applicable local export control laws and regulations, such products must not be expor ted without obtaining the expor t license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written permission of SANYO Electric Co., Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only ; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of February, 2004. Specifications and information herein are subject to change without notice. PS No. 7809-24/24