LV25400W_0712

Ordering number : E*NA0633A Bi-CMOS LSI LV25400W Overview For Automotive Applications DSP Tuner Front End The LV25400W is a tuner front end IC that supports the Sanyo SDRS400 car radio DSP. The LV25400W supports worldwide radio standards including the FM bands used in US, Europe, and Japan as well as the LW, MW, SW, and FM weather bands. It adopts an image canceling mixer for the FM mixer and incorporates a fast PLL locking function to support RDS. The LV25400W also supports automatic alignment using CCB bus control. It requires external EEPROM. The LV25400W can implement a DSP tuner at low cost with a minimal number of external components. Functions • AM, FM, FE, IF, and PLL circuits Specifications Maximum Ratings at Ta = 25°C Parameter Maximum supply voltage Symbol VCC 8V VCC 5V CCB bus maximum input voltage CCB bus maximum output voltage Allowable power dissipation Operating temperature Storage temperature VIN max VO Pd max Topr Tstg Conditions OSC_VCC (2), FE_VCC (58) XTAL_VCC (13), VCCD (22), VCCA (40) Pin 18, 19, 20 Pin 21 Ta ≤ 85°C *1 Ratings 9.0 6.0 -0.3 to +5.0 -0.3 to +6.5 840 -40 to +85 -50 to +125 Unit V V V V mW °C °C *1 : Ratings vary with characteristics of the circuit board (materials, size, etc.) on which the device is to be mounted. • • CCB is a registered trademark of SANYO Electric Co., Ltd. CCB is SANYO Semiconductor's original bus format. All bus addresses are managed by SANYO Semiconductor for this format. Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 51607 MS PC No.A0633-1/42 LV25400W Recommended Operating Conditions at Ta = 25°C Parameter Recommended supply voltage Symbol VCC 8V VCC 5V Operating supply voltage range VCC 8Vop VCC 5Vop CCB bus high-level input voltage CCB bus low-level input voltage CCB bus high-level input current CCB bus low-level input current DO low-level output voltage DO high-level output voltage VIH VIL IIH IIL VOL VOH Connected to an LC75040. CE, DI, CL CE, DI, CL CE, DI, CL ; VI5.5V CE, DI, CL ; VI0V Conditions OSC_VCC (2), FE_VCC (58) XTAL_VCC (13), VCCD (22), VCCA (40) Ratings 8.0 5 7.5 to 8.5 4.5 to 5.5 2.5 to 5.0 0 to 0.8 10 or less 10 or less 0.38 or less 2.1 or more Unit V V V V V V µA µA V V Reception Frequencies Parameter FM reception frequencies FM weather band reception frequencies AM reception frequencies fAMLW fAMMW fAMSW LW MW SW 144 to 288 520 to 1710 2.94 to 22.0 kHz kHz MHz Symbol fFM fFM-WB JPN, US, EUR Conditions Frequency ratings 76 to 108.1 162.4 to 162.55 Unit MHz MHz No.A0633-2/42 LV25400W Power on/Power off Timing and the Power on Reset Recommended Operating Ratings at Ta = 25°C, GND = 0V Parameter Operating supply voltage Symbol Vcop H Vcop L Internal logic voltage VREG3 VREG4 Power application time (8.0 V → 5.0 V) Internal register retention voltage T7 Vhmin3 Vhmin4 Internal register reset voltage Internal register reset power supply rise time Power application time (5.0 V → 8.0 V) T14 10 100 msec Voff tPOR Pin 23 : Design reference value Pin 24 : Design reference value Pin 13, 22, 40 : Design reference value Pin 13, 22, 40 : Design reference value Pin 2, 54, 55, 58 Pin 13, 22, 40 Pin 23 Pin 24 Conditions Ratings min 7.5 4.5 2.7 3.7 10 2.2 2.2 0 0.05 0.2 3 typ max 8.5 5.5 3.3 4.3 100 Unit V V V V msec V V V msec Vcop_H Vcop_L VREG4 VREG3 Voff tPOR T7 T14 No.A0633-3/42 LV25400W AC Characteristics Operating Characteristics at Ta = 25°C, VCC = 8.0V, VDD = 5.0V, unless otherwise specified. Ratings for publications * : These measurements are made using the Yamaichi Electronics IC51-0644-807 IC socket. An IHF bandpass filter is used as the audio filter. FM Characteristics - FM Front End Mixer Input (No dummy) Applied voltage Pin 25/26 Pin 32 Pin 50 Parameter Symbol Conditions Pin 64 CCB Command IN3-1 IN3-2 IN1 IN2 min typ max unit DC Characteristics Current drain-8V FM Current drain-5V FM Current drain-8V FM ICCO-8V FM ICCO-5V FM ICCO-8V FM2 No input, FM mode I2+I54+I55+I58 No input, FM mode I13+I22+I40 No input, FM mode, IFAGC-Wide = OFF I2+I54+I55+I58 Current drain-5V FM Regulator bias 3V Regulator bias 4V FM antenna dump output current Crystal oscillator frequency Crystal oscillator level Crystal oscillator buffer level S-meter DC output * : Adjust the shifter bits with a 50dBµV input. VSMFM-3 VSMFM-4 VSMFM-5 Total gain from mixer to DIV IF amplifier GMXDIV VSMFM-2 VXTAL VXTAL OSC OUT2 VSMFM-1 10dBµV, the pin 38 DC output, no modulation 30dBµV, the pin 38 DC output, no modulation 50dBµV, the pin 38 DC output, no modulation 70dBµV, the pin 38 DC output, no modulation 90dBµV, the pin 38 DC output, no modulation FM_MIX_IN,DIV_OUT_IF (pin 31) Ratio of the input to output signal levels 98.1MHz mod = off, 70dBµV-Input DIV IF amplifier gain GDIVIF IF_N_IN1 (pin 45), DIV_OUT_IF (pin 31) Ratio of the input to output signal levels 10.7MHz mod = off, 88dBµV-Input 1dB compression point driver IF 1DB POINT DIF IF_N_IN1 (pin 45), DIV_OUT_IF (pin 31) Ratio of the input to output signal levels 10.7MHz mod = off Narrow IF AGC grain (FM) GIFAGCNF1 FM_ANALOG_IN (pin 45), 10.7OUTN (pin 29) Ratio of the input to output signal levels 10.7MHz mod = off 100dBµV-Input [D32-28 to 25] = 1011, With 0V applied to pin 26 Narrow IF AGC grain (FM) GIFAGCNF2 FM_ANALOG_IN (pin 45), 10.7OUTN (pin 29) Ratio of the input to output signal levels 10.7MHz mod = off 80dBµV-Input [D32-28 to 25] = 1011, With 3V applied to pin 26 Continued on next page. 3 62 50 38 25 16.9 21.4 25.9 dB 0 62 50 38 25 -3.1 -0.6 1.9 dB 3 62 50 38 25 111 dB 3 62 50 38 25 4.5 7.5 10.5 dB 1.5 62 50 38 25 18.5 21.5 24.5 dB 3 62 50 38 25B 3.7 4 4.3 V 3 62 50 38 25B 3.1 3.4 3.7 V 3 62 50 38 25B 2.10 2.15 2.20 V 3 62 50 38 25B 0.95 1.25 1.55 V 3 62 50 38 25B 0.65 0.95 1.25 V D2-5, 6, 7 = [110] (reference value) D2-5, 6, 7 = [110] 3 3 62 62 48 48 25 25 25 25 15 115 165 30 mVrms mVrms FXTAL ICCO-5V FM2 VREG3V VREG4V IANTD-F No input, FM mode I13+I22+I40 The pin 23 voltage The pin 24 voltage With 6.0V applied to pin 64 The pin 63 output current D2-5, 6, 7 = [110] 3 62 48 25 25 4.5 MHz 3 3 0 0 6 15 15 15 13 13 13 25 25 25 25 25 25 2.7 3.6 5 3 4 8 3.3 4.4 12 V V mA 3 15 13 27 25 23 32 37 mA 3 15 13 27 25 36 46 51 mA 3 15 13 25 25 31 40 46 mA 3 15 13 25 25 38 48 56 mA No.A0633-4/42 LV25400W Continued from preceding page. Applied voltage 25/26 pin 32 pin 50 pin Parameter Symbol Conditions 64 pin CCB Command IN3-1 IN3-2 IN1 IN2 min typ max unit 1dB complession point FM-Narrow 1DB POINT NF FM_ANALOG_IN (pin 45), 10.7OUTN (pin 29) 10.7MHz mod = off [D32-28 to 25] = 1011, With 0V applied to pin 26 0 62 50 38 25 105 dBµV Wide IF AGC grain (FM) GIFAGCWF1 FM_HD_IN (pin 48), HD_OUTN (pin 27) Ratio of the input to output signal levels 10.7MHz mod = off 100dBµV-Input [D2-15 to 12] = 1011, With 0V applied to pin 25 0 62 50 38 25 -3.5 -1 1.5 dB Wide IF AGC grain (FM) GIFAGCWF2 FM_HD_IN (pin 48), HD_OUTN (pin 27) Ratio of the input to output signal levels 10.7MHz mod = off 80dBµV-Input [D2-15 to 12] = 1011, With 3V applied to pin 25 3 62 50 38 25 16.5 21 25.5 dB 1dB compression point FM - wide 1DB POINT WF FM_HD_IN (pin 48), HD_OUTP (pin 27) 10.7MHz mod = off [D2-15 to 12] = 1011 0 62 50 38 25 104 dBµV Image cancellation ratio (US) Image cancellation ratio (JPN) FM wide AGC on sensitivity F1 IR US IR JPN 98.1MHz reference, the amount rejected at +21.4MHz 83MHz reference, the amount rejected at -21.4MHz [D1-26, 27] = 01 1.5 1.5 62 69 50 50 38 38 25 25 17 15 dB dB WAGC ON-F1 fr = 102.1MHz FM-Wide AGC-Bit [D32-3 to 0] = 0000 : minimum keyed-AGC-Bit [D32-11 to 8] = 0000 : minimum 0 0 62 50 38 13 78 85 92 dBµV FM wide AGC on sensitivity F2 WAGC ON-F2 fr = 102.1MHz FM-Wide AGC-Bit [D32-3 to 0] = 1111 : maximum keyed-AGC-Bit [D32-11 to 8] = 0000 : minimum 0 0 62 50 38 15 92 99 106 dBµV FM narrow AGC on sensitivity F1 FM narrow AGC on sensitivity F2 Practical sensitivity NAGC ON-F1 fr = 98.1MHz FM-Narrow AGC-Bit [D32-7 to 4] = 0000 : minimum 0 3 62 50 38 16 66.5 73.5 80.5 dBµV NAGC ON-F2 fr = 98.1MHz FM-Narrow AGC-Bit [D32-7 to 4] = 1111 : maximum 0 3 62 50 38 18 82.5 89.5 96.5 dBµV S/N-31 Connected to an LA1787 (MPX, left channel output) *HCC OFF 98.1MHz, 31dBµV, fm = 1kHz, 22.5kHz-mod 61/62pin input 3 62 50 38 25 30 dB Signal-to-noise ratio S/N-90 Connected to an LA1787 (MPX, left channel output) 98.1MHz, 90dBµV, fm = 1kHz, 22.5kHz-mod 61/62pin input 0 62 50 38 25 54 57 dB No.A0633-5/42 LV25400W AM Characteristics : AM, AMANT inputs Applied voltage Pin 25/26 Pin 32 Pin 50 Parameter Symbol Conditions Pin 64 CCB Command IN3-1 IN3-2 IN1 IN2 min typ max unit DC Characteristics Current drain-8V AM Current drain-5V AM AM antenna dump output current AC Characteristics First AM amplifier gain Narrow IF AGC grain (AM) GIFAGCNA1 GAMP1 ICCO-8V AM ICCO-5V AM IANTD-A No input, AM mode I2+I54+I55+I58 No input, AM mode I13+I22+I40 When pin 50 is connected to ground The ANT-D (pin 52) output current FM_N_IN1 (pin 45) IF_OUT (pin 43), after CF matching, 10.7MHz mod = off 74dBµV = Input AM_ANALOG_IN (pin 37), 10.7OUTN (pin 29) Ratio of the input to output signal levels 10.7MHz mod = off 100dBµV-Input [D32-28 to 25] = 1011, With 0V applied to pin 26 Narrow IF AGC grain (AM) GIFAGCNA2 AM_ANALOG_IN (pin 37), 10.7OUTN (pin 29) Ratio of the input to output signal levels 10.7MHz mod = off 80dBµV-Input [D32-28 to 25] = 1011, With 3V applied to pin 26 1dB compression point AM - narrow 1DB POINT NA AM_ANALOG_IN (pin 37), 10.7OUTN (pin29) 10.7MHz mod = off [D32-28 to 25] = 1011, With 0V applied to pin 26 Wide IF AGC grain (AM) GIFAGCWA1 AM_HD_IN (pin 39), HD_OUTN (pin 27) Ratio of the input to output signal levels 10.7MHz mod = off 100dBµV-Input [D2-15 to 12] = 1011, With 0V applied to pin 25 Wide IF AGC grain (AM) GIFAGCWA2 AM_HD_IN (pin 39), HD_OUTN (pin 27) Ratio of the input to output signal levels 10.7MHz mod = off 80dBµV-Input [D2-15 to 12] = 1011, With 3V applied to pin 25 1dB compression point AM - wide 1DB POINT WA AM_HD_IN (pin 39), HD_OUTP (pin 27) 10.7MHz mod = off [D2-15 to 12] = 1011, With 0V applied to pin 25 AM wide AGC on sensitivity A1 WAGC ON-A1 AM-ANT-IN = 1.4MHz, mod = off The input level such that the ANT_D (pin 52) level becomes 0.5V. AM wide AGC sensitivity control setting (D32-3 to D32-0) : 0000 (the minimum value) AM wide AGC on sensitivity A2 WAGC ON-A2 AM-ANT-IN = 1.4MHz, mod = off The input level such that the ANT_D (pin 52) level becomes 0.5V. AM wide AGC sensitivity control setting (D32-3 to D32-0) : 1101 Continued on next page. 3 33 44 26 29 92 97 102 dBµV 3 33 44 26 27 78.5 83.5 88.5 dBµV 0 33 44 26 26 104 dBµV 3 33 44 26 26 17.5 22 26.5 dB 0 33 44 26 26 -2.5 0 2.5 dB 0 33 44 26 26 105 dBµV 3 33 44 26 26 18 22.9 27 dB 0 33 44 26 26 -1.6 0.9 3.4 dB 0 33 44 26 26 5.2 6.2 7.2 dB 3 33 15 26 26 3.5 6 9 mA 3 33 15 26 26 21 28 34 mA 3 33 15 26 26 32 44 54 mA No.A0633-6/42 LV25400W Continued from preceding page. Applied voltage Pin 25/26 Pin 32 Pin 50 Parameter Symbol Conditions Pin 64 CCB Command IN3-1 IN3-2 IN1 IN2 min typ max unit AM narrow AGC on sensitivity A1 NAGC ON-A1 AM-ANT-IN = 1MHz, mod = off The input level such that the ANT_D (pin 52) level becomes 0.5V. AM narrow AGC sensitivity control setting (D32-7 to D32-4) : 0000 (the minimum value) 3 33 44 26 30 60 65 70 dBµV AM narrow AGC on sensitivity A2 NAGC ON-A2 AM-ANT-IN = 1MHz, mod = off The input level such that the ANT_D (pin 52) level becomes 0.5V. AM narrow AGC sensitivity control setting (D32-7 to D32-4) : 1111 (the maxim value) 3 33 44 26 32 75 80 85 dBµV Total AM gain AMGAIN 1MHz, 60dBµV, mod = off, the ration of the AM_ANT input and the 10.7OUTN (pin 29) output levels 3 33 44 26 32 33.5 39 44.5 dB Practical sensitivity S/N-33 With an LA1787 connected With a 1MHz, 33dBµV, fm = 1kHz, 30% modulation ANT input and the IF AGC voltage = 3V add. 3 33 44 26 32 20 dB THD_1 THD-74 With an LA1787 connected 80% modulation ANT input and the IF AGC voltage adjusted so that the IFAGCOUT level is 100dBµV. Adjusted With a 1MHz, 74dBµV, fm = 1kHz, 33 44 26 32 0.7 1.2 % THD_2 THD-77 With an LA1787 connected 80% modulation ANT input and the IF AGC voltage adjusted so that the IFAGCOUT level is 100dBµV. Adjusted With a 1MHz, 77dBµV, fm = 1kHz, 33 44 26 32 0.7 1.2 % Signal-to-noise ratio S/N-74 With an LA1787 connected 80% modulation ANT input and the IF AGC voltage adjusted so that the IFAGCOUT level is 100dBµV. Adjusted With a 1MHz, 74dBµV, fm = 1kHz, 33 44 26 32 52.5 56 dB No.A0633-7/42 LV25400W DC Characteristics Operating Characteristics at Ta = 25°C, VCC = 8.0V, VDD = 5.0, GND = 0, VSS = 0, unless otherwise specified. Ratings for publications * : These measurements are made using the Yamaichi Electronics IC51-0644-807 IC socket. *: Undefined FM: No input CCB Command IN3-1 IN3-2 Pin No. Parameter Symbol Conditions min typ max unit IN1 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 FE_GND OSC_VCC OSC_B OSC_C VT FET_GND PLL-LPF FM FET AM FET CPAM CPFM GND (Digital) VCC (X'TAL) X'tal IN X'tal OUT GND (X'TAL) X'tal-Buffer-OUT CE DI CL DO VCC 5V (Digital) PLL VDD (3V REG) PLL VDD (4V REG) AGC-Control-IN (HD) AGC-Control-IN (Analog) IFAGC-OUTN (HD) IFAGC-OUTP (HD) IFAGC-OUTN (Analog) IFAGC-OUTP (Analog) DIV-IF-OUT VSM-DC 2.7V REG IFAGC-IN (Analog-Bypass) IFAGC-IN (HD-Bypass) GND (Analog) IFAGC-IN (Analog) VSM-AC IFAGC-IN (HD) VCC 5V (Analog) AM-Narrow-AGC-IN Address SW/DAC-Monitor AM-1st-IF-OUT 4.9V REG IF-Narrow-IN IF-Narrow-IN(Bypass) AM-Wide-AGC (Bypass) V1FM V2FM V3FM V4FM V5FM V6FM V7FM V8FM V9FM V10FM V11FM V12FM V13FM V14FM V15FM V16FM V17FM V18FM V19FM V20FM V21FM V22FM V23FM V24FM V25FM V26FM V27FM V28FM V29FM V30FM V31FM V32FM V33FM V34FM V35FM V36FM V37FM V38FM V39FM V40FM V41FM V42FM V43FM V44FM V45FM V46FM V47FM 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 IN2 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 0 8 2.65 7.45 0 0 * * * * * 0 5 2.7 4.1 0 3.45 BUS BUS BUS 0 Note 1 5 3.1 4.15 Input Input 2.75 2.75 2.75 2.75 1.95 0 2.7 2.45 2.45 0 2.45 0 2.45 5 * 3.1 7.5 4.7 2.6 2.6 1.5 5 5 8 V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V Continued on next page. No.A0633-8/42 LV25400W Continued from preceding page. CCB Command IN3-1 IN3-2 Pin No. Parameter Symbol Conditions min typ max unit IN1 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 IF-Wide-IN IF-Wide-IN (Bypass) AM-RF-AGC AM-RF-AGC (Bypass) AM-ANT-D FM-Narrow-AGC-IN FM/AM-MIX-OUT FM/AM-MIX-OUT ANT-DAC RF-DAC VCC (8V) AM-MIX-IN AM-MIX-IN FM-MIX-IN FM-MIX-IN FM-RF-AGC FM-ANT-D V48FM V49FM V50FM V51FM V52FM V53FM V54FM V55FM V56FM V57FM V58FM V59FM V60FM V61FM V62FM V63FM V64FM 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 13 IN2 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 25 0 0 0 2.05 2.05 1 1 0.3 0.3 8 8 8 8 8 0.2 0.2 3 3 0.2 8 Note 1 : Pull-up voltage V V V V V V V V V V V V V V V V V AM: No input CCB Command IN3-1 IN3-2 Pin No. Parameter Symbol Conditions min typ max unit IN1 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 FE_GND OSC_VCC OSC_B OSC_C VT FET_GND PLL-LPF FM FET AM FET CPAM CPFM GND (Digital) VCC (X'TAL) X'tal IN X'tal OUT GND (X'TAL) X'tal-Buffer-OUT CE DI CL DO VCC 5V (Digital) PLL VDD (3V REG) PLL VDD (4V REG) AGC-Control-IN (HD) AGC-Control-IN (Analog) IFAGC-OUTN (HD) V1AM V2AM V3AM V4AM V5AM V6AM V7AM V8AM V9AM V10AM V11AM V12AM V13AM V14AM V15AM V16AM V17AM V18AM V19AM V20AM V21AM V22AM V23AM V24AM V25AM V26AM V27AM 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 IN2 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 0 8 2.65 7.45 0 0 * * * * * 0 5 2.7 4.1 0 3.45 BUS BUS BUS 0 Note 1 5 3.1 4.15 Input Input 2.75 8 V V V V V V V V V V V V V V V V V V V V V V V V V V V Continued on next page. No.A0633-9/42 LV25400W Continued from preceding page. CCB Command IN3-1 IN3-2 Pin No. Parameter Symbol Conditions min typ max unit IN1 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 IFAGC-OUTP (HD) IFAGC-OUTN (Analog) IFAGC-OUTP (Analog) DIV-IF-OUT VSM-DC 2.7V REG IFAGC-IN (Analog-Bypass) IFAGC-IN (HD-Bypass) GND (Analog) IFAGC-IN (Analog) VSM-AC IFAGC-IN (HD) VCC 5V (Analog) AM-Narrow-AGC-IN Address SW/DAC-Monitor AM-1st-IF-OUT 4.9V REG IF-Narrow-IN IF-Narrow-IN (Bypass) AM-Wide-AGC (Bypass) IF-Wide-IN IF-Wide-IN (Bypass) AM-RF-AGC AM-RF-AGC (Bypass) AM-ANT-D FM-Narrow-AGC-IN FM/AM-MIX-OUT FM/AM-MIX-OUT ANT-DAC RF-DAC VCC (8V) AM-MIX-IN AM-MIX-IN FM-MIX-IN FM-MIX-IN FM-RF-AGC FM-ANT-D V28AM V29AM V30AM V31AM V32AM V33AM V34AM V35AM V36AM V37AM V38AM V39AM V40AM V41AM V42AM V43AM V44AM V45AM V46AM V47AM V48AM V49AM V50AM V51AM V52AM V53AM V54AM V55AM V56AM V57AM V58AM V59AM V60AM V61AM V62AM V63AM V64AM 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 15 IN2 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 0 0 0 0 0 0 2.75 2.75 2.75 1.95 5 2.7 2.2 2.1 0 2.2 5 2.1 5 * 3.1 4.8 4.7 2.65 2.65 2.25 2.4 2.4 6.45 0.8 V V V V V V V V V V V V V V V V V V V V V V V V V 0.4 8 8 8 8 8 2.65 2.65 1.5 1.5 7 V V V V V V V V V V V V CCB Command IN3-1 IN3-2 Parameter Symbol Conditions min typ max unit IN1 19 TUNER OFF V33 37 IN2 25 25 0.03 V No.A0633-10/42 LV25400W CCB Command IN3-1 IN3-2 Parameter Symbol Conditions min typ max unit IN1 15 ANT-DAC ALL_OFF (000000000) D10_SETP (100000000) D11_SETP (010000000) D12_SETP (001000000) D13_SETP (000100000) D14_SETP (000010000) D15_SETP (000001000) D16_SETP (000000100) D17_SETP (000000010) D18_SETP (000000001) ALL_ON (111111111) RF-DAC ALL_OFF (111111111) D0_SETP (100000000) D1_SETP (010000000) D2_SETP (001000000) D3_SETP (000100000) D4_SETP (000010000) D5_SETP (000001000) D6_SETP (000000100) D7_SETP (000000010) D8_SETP (000000001) ALL_ON (111111111) DAC570 DAC571 DAC572 DAC573 DAC574 DAC575 DAC576 DAC577 DAC578 DAC579 DAC57A (DAC57_1)-(DAC57_0) (DAC57_2)-(DAC57_0) (DAC57_3)-(DAC57_0) (DAC57_4)-(DAC57_0) (DAC57_5)-(DAC57_0) (DAC57_6)-(DAC57_0) (DAC57_7)-(DAC57_0) (DAC57_8)-(DAC57_0) (DAC57_9)-(DAC57_0) 15 15 15 15 15 15 15 15 15 15 15 13 13 13 13 13 13 13 13 13 13 13 1 2 3 5 7 9 11 13 15 17 18 25 25 25 25 25 25 25 25 25 25 25 105 3 5 15 35 120 310 730 1.5 3.05 6.25 285 20 35 65 125 250 490 960 1.9 3.75 7.55 mV mV mV mV mV mV mV mV V V V DAC560 DAC561 DAC562 DAC563 DAC564 DAC565 DAC566 DAC567 DAC568 DAC569 DAC56A (DAC56_1)-(DAC56_0) (DAC56_2)-(DAC56_0) (DAC56_3)-(DAC56_0) (DAC56_4)-(DAC56_0) (DAC56_5)-(DAC56_0) (DAC56_6)-(DAC56_0) (DAC56_7)-(DAC56_0) (DAC56_8)-(DAC56_0) (DAC56_9)-(DAC56_0) 13 13 13 13 13 13 13 13 13 13 13 1 2 3 5 7 9 11 13 15 17 18 25 25 25 25 25 25 25 25 25 25 25 105 3 5 15 35 120 310 730 1.5 3.05 6.25 285 20 35 65 125 250 490 960 1.9 3.75 7.55 mV mV mV mV mV mV mV mV V V V 15 15 15 15 15 15 15 15 15 15 Package Dimensions unit : mm (typ) 3190A 12.0 48 49 33 32 0.5 10.0 64 1 0.5 (1.25) (1.5) 17 16 0.18 0.15 1.7max 0.1 SANYO : SQFP64(10X10) 10.0 12.0 IN2 No.A0633-11/42 LV25400W Pin Functions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 FE_GND OSC_VCC OSC_B OSC_C PLL-VT FET_GND PLL-LPF_AM FM_FET_OUT AM_FET_OUT AM_CP FM_CP DGND XTAL_VCC XTAL-IN XTAL-OUT XTAL_GND XTAL_OSC_OUT2 CE DI CL DO VCCD5V VREG 3V VREG 4V AGC_DAC_I AGC_DAC_S HD-Radio out N HD-Radio out P 10.7M OUT N 10.7M OUT P DIV_OUT_IF VSM_DC Pin Pin No. 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 VREG2.7V AM_ANALOG_IN Bypass AM_HD_IN Bypass AGND AM ANALOG IN VSM_AC AM HD IN (35k CF) VCCA5V AM_N-AGC pick-up Address-SW IF_OUT VREG4.9V IF-N_IN1 (CF = 180k) IF-N_IN2 (180k_Bypass) AM-W-AGC IF-W_IN1 (CF = 500k) IF-W_IN2 (500k_Bypass) AM-RF-AGC AM RF-AGC (Bypass) AM-ANT-D FM N-AGC-IN MIX-OUT MIX-OUT ANT-DAC RF-DAC FE_VCC8V AM-MIX-IN2 (Bypass) AM-MIX-IN1 FM-MIX-IN1 FM-MIX-IN2 FM-ANT D FM-RF-AGC Pin No.A0633-12/42 LV25400W Functions AM/FM front-end AGC block FM Image rejection Mixer (IQ-MIX) FM IQ-MIX phase adjust (For the Japanese FM band) AM Double balance Mixer Pin diode drive AGC output (AM/FM) Wide AGC sensitivity setting (AM/FM) Narrow AGC sensitivity setting (AM/FM) Keyed AGC adjust (FM) AM RF AGC Local oscillator Local osc divider (FM/AM) Local osc divider (AM) ANT/RF DAC (FM) AM 1st IF AMP block 1st-IF amplifier 10.7M (Narrow) FM IF block S-meter shifter IF Limiter Amplifier 6 stage S-meter (DC for keyed AGC) (FM) IF output Driver for DSP/iBoc (10.7MHz output) IF-AGC block IF AGC Amplifier (control Voltage from DSP) IF output Driver for DSP/iBoc IF Buffer Output for Diversity IF Gain Adjust IF AGC Amp-OFF-Sw PLL Fast lock PLL Filter SW other Tuner off 2.7V Regurator adjust 1 bit SW 2 bit DAC 1 bit SW 10.7MHz IF 10.7MHz IF 4 bit DAC For the analog system and the iBoc system ; 1 bit each 5 bit DAC 4 bit DAC 4 bit DAC 4 bit DAC 4 bit DAC 155MHz to 262MHz Division by 1, 2, or 3 Division by 10, 8, 6, or 4 9 bit DAC Gain switching : 1 bit 2 bit DAC No.A0633-13/42 FM RF amplifier circuit 8V MIX COIL IF Buffer 53 52 51 50 49 57 RF DAC AM AGC AM antenna circuit AM RF amplifier circuit BPF 60 59 58 56 55 54 Block Diagram FM RF tuning circuit 64 63 62 61 1 Wide AGC Narrow AGC AM Mixer/ FM IQ-Mixer ANT-D ANT DAC RF AGC 48 47 46 CF10.7MHz_500k 8V 3 VCO FM AGC ANT-D Wide AGC AM 1st AMP Keyed AGC Singal Meter 2 Coil tuning circuit 4 5 PLL RF AGC Narrow AGC ECL1 1/1,1/2 1/3 ECL2 1/4,1/6 1/8,1/10 45 4.9V REG CF10.7MHz_180k 44 43 6 NMOS Tr swallow counter AM RFAGC compalate S-Meter Shifter IF gain variation correction (narrow output) IF gain variation correction (wide output) 7 8 9 10 11 12 13 14 15 16 Computer Control Bus XTAL OSC 3V REG charge pump POWER ON RESET IN 1 IN 2 IN 3-1 IN 3-2 Limitter AMP 42 41 S-METER (main/sub) LV25400W P-CTR phase det R-CTR 40 39 IF AGC AMP AM AMP FM AMP AM AMP FM AMP 5V CF10.7MHz_50k 38 37 36 35 HD IF AGC AMP Analog IF AGC Buffer AMP L P F L P F TUNER adjustment AM/FM W-AGC AM/FM N-AGC FM keyed-AGC AM RFAGC Amp sens Xtal filter_16kHz 5V Xtal 4.5MHz 34 4V REG 33 2.7V REG 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 No.A0633-14/42 5V LV25400W Equivalent Circuits Pin No. 1 2 3 4 Pin FE.GND OSC VCC FM/AM OSC_B FM/AM OSC_C Dedicated oscillator system power supply Oscillator connections VCC(2pin) 500Ω 4 333Ω 500Ω Description 8V GND (F.E.) 8V VCC (VCO.) Equivalent Circuit 3 5kΩ 5kΩ 5 6 7 8 9 10 11 Tuning voltage output Low-pass filter output FET ground AM filter FM mode FET AM mode FET AM charge pump FM charge pump FM mode : A PLL filter is formed on pins 8 through 11. (Pins 9 and 10 are left open.) AM mode : A PLL filter is formed on pins 7, 9, and 10. In this mode, a low-pass filter is formed by the internal impedance (10kΩ) and an external capacitor. VT 30kΩ tentative 220pF 5 VT VCC PIN58 3kΩ VDD PIN23 1kΩ 5kΩ 6 FET-GND 0.01µF 7 AM-FILTER 8 FMFET 9 10 AMFET 1µF 11 CPAM 0.033µF CPFM 1.3kΩ 2200pF 2.2kΩ 12 13 14 15 DIGITAL GND XTAL VCC X'tal-OSC-IN X'tal-OSC-OUT Dedicated crystal oscillator system power supply Connect a 4,5MHz crystal element between pins 14 and 15. Connect a 10pF capacitor between pin 14 and ground, and connect a 150pF capacitor between pin 15 and ground. 5kΩ 500Ω 1.5kΩ 1.5kΩ 500Ω AMP 5kΩ 333Ω 17 ES6 1.5kΩ 35pF 1.5kΩ 1.5kΩ 1.5kΩ AMP 333Ω VCC(PIN13) 5V VCC (XTAL) 1kΩ 500Ω AMP 333Ω 1kΩ 20kΩ ALC to PLL 8pF 4pF 2pF 14 15 Continued on next page. No.A0633-15/42 LV25400W Continued from preceding page. Pin No. 16 17 Pin XTAL GND XTAL OSC2 ground Crystal oscillator output 2 for use by a 2-tuner clock 500Ω Description Dedicated crystal oscillator system Equivalent Circuit 17 1kΩ 18 CE Used to enable serial data input (DI) to the LV25400W or force the output to the high level during serial data output. 3V P-MOS P-MOS P-MOS 18 P-MOS N-MOS N-MOS N-MOS N-MOS VSS(PIN12) 19 DI Input for the serial data transferred to the LV25400W from the controller. 3V P-MOS P-MOS P-MOS 19 P-MOS N-MOS N-MOS N-MOS N-MOS VSS(PIN12) Continued on next page. No.A0633-16/42 LV25400W Continued from preceding page. Pin No. 20 Pin CL Description Clock used for synchronization when serial data is input to the LV25400W (DI) or when serial data is output (DO). 3V Equivalent Circuit P-MOS P-MOS P-MOS 20 P-MOS N-MOS N-MOS N-MOS N-MOS VSS(PIN12) 21 DO Output for serial data output to the controller by the LV25400W. Note : The pull-up resistor must be in the range 10kΩ to 50kΩ. 500Ω 21 VSS(PIN12) 500Ω VSS(PIN12) 22 23 VCCD PLL VREG (VDD) - 3V Digital system power supply Regulator output for the PLL circuit 3V 5V VCC (Digital) VCC(8V) VCC(22pin) PLL VDD DAC 23 5kΩ 41.7kΩ Continued on next page. No.A0633-17/42 LV25400W Continued from preceding page. Pin No. 24 Pin Swallow counter VREG - 4V counter - 4V Description Regulator output for the PLL swallow VCC(8V) Equivalent Circuit VCC(22pin) swallow 4V 24 41.7kΩ 25 AGC_DAC_I IF AGC control bias is supplied from the LC75040 (for iBoc). 5.6V 200kΩ 100kΩ 25 26 AGC_DAC_S IF AGC control bias is supplied from the LC75040 (for the analog system). 5.6V 200kΩ 100kΩ 26 27 28 HD_OUTN HD_OUTP Wideband IF (10.7MHz) signal differential output to the LC75040 for iBoc use. 500Ω VCC(40pin) VCC(40pin) 300Ω 200Ω 300Ω 500Ω 27 28 Continued on next page. No.A0633-18/42 LV25400W Continued from preceding page. Pin No. 29 30 Pin 10.7OUTN 10.7OUTP Description Narrowband IF (10.7MHz) signal differential output to the LC75040 for analog use. 500Ω Equivalent Circuit VCC(40pin) VCC(40pin) 300Ω 200Ω 300Ω 500Ω 29 30 31 DIV_OUT_IF Driver 10.7MHz signal buffer output VCC(58pin) 200Ω 31 26kΩ 200Ω 10kΩ 32 S-meter (DC) Current driver S-meter output AC components are removed with an external capacitor. VCC(40pin) 300Ω 38 10kΩ 33 Vref 2.7V 2.7V regulator VCC(PIN40) 1kΩ 30kΩ 333Ω 33 Continued on next page. No.A0633-19/42 LV25400W Continued from preceding page. Pin No. 34 37 Pin AM ANALOG_IN Bypass AM ANALOG_IN Description AM analog signal system related input (AM narrowband 10.7MHz IF signal) 37 34 Equivalent Circuit VCC(40pin) 20kΩ 300Ω 300Ω 35 39 AM HD_IN Bypass AM HD_IN iBoc and AM analog signal system related input (AM narrowband 10.7MHz IF signal) 39 35 VCC(40pin) 20kΩ 300Ω 300Ω 36 38 ANALOG GND S-meter AC output pin FM mode: S-meter AC signal output VCC(PIN40) 38 300Ω 7kΩ 40 41 VCCA AM Narrow-AGC Pick-Up Analog system power supply AM narrow AGC detection 5V VCC (Analog) 41 500Ω 500Ω 10kΩ 42 Address_SW When two tuners are used, one of the two ICs' pin 42 is connected to ground, need changes the address. 1kΩ 42 Continued on next page. No.A0633-20/42 LV25400W Continued from preceding page. Pin No. 43 Pin AM 1stIF_AMP_OUT Description First AM IF amplifier output Equivalent Circuit VCC_58PIN 333kΩ 50Ω 43 44 VREG4.9V 4.9V regulator VCC(PIN40) 1kΩ 44 50kΩ 34kΩ 1kΩ 15kΩ 45 46 IF-N_IN1 IF-N_IN2 First AM IF amplifier input Driver 10.7MHz signal buffer input FM limiter amplifier input 45 46 500Ω 500Ω 500Ω 500Ω 300Ω 2pF 300Ω 500Ω V 270Ω 2pF 500Ω 500Ω 47 AM W-AGC Used for wide AGC pickup. There is a built-in amplifier. 47 1kΩ 10kΩ 1kΩ Continued on next page. No.A0633-21/42 LV25400W Continued from preceding page. Pin No. 48 49 Pin FM IF-W_IN1 FM IF-W_IN2 48 49 Description Wideband FM IF AGC clamp input Equivalent Circuit VCC(40pin) 20kΩ 10kΩ 10kΩ 50 51 AM RF-AGC AM RF-AGC-Bypass RF AGC rectifying capacitor Determines the distortion for low-frequency modulation. Increasing the size of C50 and C 51 : Distortion → Improves Response → Becomes slower Reducing the size of C50 and C 51 : Distortion → Degrades Response → Becomes faster C59 1 µF + 500Ω 500Ω 51 1kΩ 5KΩ 1KΩ VCC(PIN 58) 15KΩ 1kΩ 750Ω 100Ω 500Ω C64 10µF 50 + 52 AM ANT-D Provides the PIN diode drive current. I52 = 6mA This is the antenna dumping current. VCC_8V 200Ω 52 500Ω Continued on next page. No.A0633-22/42 LV25400W Continued from preceding page. Pin No. 53 Pin FM Narrow AGC Description Used for narrow AGC pickup. There is a built-in amplifier. Equivalent Circuit AGC AMP 2.5kΩ 53 1kΩ 10kΩ 2.2V 54 55 AM/FM 1st-MIX OUT FM/AM mixer output (common) 54 55 FM MIX AM MIX 56 57 ANT DAC RF DAC 9-bit D/A converter 1kΩ 1kΩ 57 56 1kΩ 58 59 60 VCCA AM MIX-IN2 (Bypass) AM MIX-IN1 AM mixer input Input impedance : 10kΩ VCC8V FM FE/AM VCC(PIN58) 2.5kΩ 10kΩ 60 110Ω 110Ω 59 10kΩ 12kΩ 61 62 FM MIX-IN1 FM MIX-IN2 FM mixer input FM wide AGC pickup Input impedance : 10kΩ 60 FM MIX AGC AMP 61 500Ω 10kΩ 10kΩ 500Ω 2.2V Continued on next page. No.A0633-23/42 LV25400W Continued from preceding page. Pin No. 63 Pin FM ANT D Description Pin 63 : The antenna driving current flows when the RF AGC voltage reaches (VCC - Vbe). Equivalent Circuit VCC 75kΩ 300Ω 63 300Ω 64 FM RF AGC RF AGC voltage VCC 500Ω 500Ω 500Ω 12kΩ 500Ω 64 30kΩ No.A0633-24/42 LV25400W SANYO Serial Bus Data Timing CE CL DI DO : Chip enable : Clock : Data input : Data output (pin information only) CE tCL CL VIH VIL VIH DI VIL tSU tHD VIH tCH VIH ≈ ≈ VIL VIH ≈ VIH tEL tES VIH tEH ≈≈≈ VIL ≈≈ tLC ≈≈ Internal data latch ≈≈ Old New 〈〈 When CL is stopped at the L level 〉〉 CE tCH CL VIH DI VIL Internal data latch tSU tHD VIL VIH VIL VIH tCL VIH ≈ ≈≈ VIL VIH VIH ≈≈ tEL tES ≈≈≈ ≈≈ tEH tLC ≈≈ Old New 〈〈 When CL is stopped at the H level 〉〉 Parameter Data setup time Data hold time Clock L-level time Clock H-level time CE wait time CE setup time CE hold time Data latch change time Data input high-level voltage Data input low-level voltage Symbol tSU tHD tCL tCH tEL tES tEH tLC VIH VIL CL, DI, CE CL, DI, CE 2.5 -0.3 Pin DI, CL DI, CL CL CL CE, CL CE, CL CE, CL Conditions min 0.45 0.45 0.45 0.45 0.45 0.45 0.45 0.45 5.0 0.8 typ max unit µs µs µs µs µs µs µs µs V V No.A0633-25/42 LV25400W Serial Data I/O Procedures The LV25400W uses the SANYO audio IC serial bus format. Data is input and output using a CCB (Computer Control Bus). The LV25400W adopts an 8-bit address version of the CCB format. I/O mode [1] IN1 IN1B [2] IN2 IN2B [3] IN3 IN3B Address B0 0 0 1 1 1 0 B1 0 1 0 1 0 0 B2 0 0 0 0 0 0 B3 1 1 1 1 1 1 A0 0 0 0 0 0 0 A1 1 1 1 1 1 1 A2 0 0 0 0 1 1 A3 0 0 0 0 0 0 • 32 bits of data are input • IN1B is the 2-tuner mode address (when pin 42 is tied to ground) • Control data input mode. PLL setup • 32 bits of data are input • IN2B is the 2-tuner mode address (when pin 42 is tied to ground) • The tuner block is set up in control data input (serial data input) mode. • 32 bits of data are input - There is a sub-address • IN3B is the 2-tuner mode address (when pin 42 is tied to ground) Contents • Control data input mode. PLL setup I/O mode determined CE CL DI B0 B1 B2 B3 A0 A1 A2 A3 First Data IN1/2 ≈≈ No.A0633-26/42 ≈ ≈ LV25400W DVS 0 1 AM/FM Program-CTR Stop Program-CTR Normal 0 FM operation 1 AM AM oscillator divisor control OSD D2 OSD D1 Divisor 0 0 Divisor by 10 1 0 Divisor by 8 0 1 Divisor by 6 1 1 Divisor by 4 IN1 setting A A A A B B B B IN 32103210 00101000 Address Code D1-31 MSB 0 D1-30 0 D1-29 0 D1-28 MODE D1-27 DELAY_ADJ1 D1-26 DELAY_ADJ0 D1-25 WB D1-24 OSC_DIV D1-23 R3 D1-22 R2 D1-21 R1 D1-20 R0 D1-19 DVS D1-18 AM/FM D1-17 OSC D2 D1-16 OSC D1 D1-15 P15 D1-14 P14 D1-13 P13 D1-12 P12 D1-11 P11 D1-10 P10 D1-09 P09 D1-08 P08 D1-07 P07 D1-06 P06 D1-05 P05 D1-04 P04 D1-03 P03 D1-02 P02 D1-01 P01 D1-00 LSB P00 L L L L (8) L L L L L L LHHLHL (4) (3) (2) - - - - - - - - (1) - - - - - - - (7) (6) (5) AM/FM/WB oscillator divisor control OSD DIV Divisor WB Divisor by 2 0 0 Divisor by 3 0 1 Divisor by 1 1 0 Divisor by 1 1 1 *WB : Select 1 for weather band reception Reference frequency setting 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 4.5, 7.2MHz 100kHz 50kHz 25kHz 25kHz 12.5kHz 6.25kHz 3.125kHz 3.125kHz 10kHz 9kHz 5kHz 1kHz 3kHz 30kHz Illegal value Illegal value PLL filter switching Filter state Normal W-FILTER MODE AM/FM AM filter FM filter 0 1 0 1 0 1 OFF ON ON ON OFF ON Programmable counter divisor setting (from 272 to 65535) 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 Divide by 272 : : 0000 0000 0000 0001 : 0011 : 0111 : 0101 1010 1111 0101 : 1010 : 1111 1111 1111 1010 1010 0101 0101 1101 0000 1110 1000 1111 0100 Divide by 500 : Divide by 1000 : Divide by 2000 : Divide by 21845 : Divide by 43690 : Divide by 65535 FM-IQMIX phase_Adjust DEIAY_ADJ0 DEIAY_ADJ1 0 1 0 1 0 0 1 1 Adjustment amount Small ↓ ↓ Large No.A0633-27/42 LV25400W DO pin control data (1) ULD DT1 DT0 DO pin 0 Low when not locked. 0 0 1 0 0 Monitor 1 (unused) 0 0 1 Monitor 2 (unused) 1 0 1 (See DO control (2)) 0 1 0 Open 1 1 0 Monitor 1 (unused) 0 1 1 Monitor 2 (unused) 1 1 1 (See DO control (2)) IN2 setting A A A A B B B B IN DO pin control data (2) IL1 IL0 IN 0 0 Open 0 1 The I3 pin state (unused) 1 0 The I2 pin state (unused) 1 1 The I1 pin state (unused) 32103210 00101001 Address Code D2-31 MSB TEST2 L (20) Charge pump control IC test mode These bits are normally set to : TEST0 = 0 TEST1 = 0 TEST2 = 0 D2-30 TEST1 L 0 1 Dead zone control DZ1 DZ0 Dead zone mode 0 0 DZA 0 1 DZB 1 0 DZC 1 1 DZD D2-29 TEST0 L (19) (18) D2-28 DLC L Normal operation Stopped D2-27 DZ1 L D2-26 DZ0 L Two-tuner crystal oscillator buffer switching 0 1 Normal operation Stopped D2-25 0 L Unlock detection switching UL1 UL0 φE detection width Detection pin output 0 Stopped 0 Open 1 0 0 φE is output directly 0 ±0.5µs φE is delayed by 1 to 2 ms. 1 1 ±1µs 1 φE is delayed by 1 to 2 ms. D2-24 0 L (17) (16) D2-23 TWO_DOFF L D2-22 UL1 L D2-21 UL0 L IF gain variation correction IN2 D15-12 (Wide out side) D2-20 ULD L (15) 0 0 0 0 +5dB 0001 ↓ Crystal oscillator selection 0010 ↓ XS1 XS0 X'tal OSC 0011 ↓ 0 0 4.5MHz 0100 ↓ 0 1 7.2MHz 0101 ↓ 1 0 20.5MHz* 1 1 Illegal value 0110 ↓ 0111 ↓ *Use of a 20.5MHz crystal ↓ requires a separate hardware ↓ modification. 1010 ↓ 2.7V REG ADJ 1011 ↓ 0 0 -23mV ↓ 1100 0 1 (Center value) ↓ 1101 1 0 +23mV 1110 ↓ 1 1 +64mV 1 1 1 1 -5dB D2-19 DT1 L D2-18 DT0 L D2-17 IL1 L (14) D2-16 IL0 L D2-15 ADJ_W3 L D2-14 ADJ_W2 L (13) D2-13 ADJ_W1 L D2-12 ADJ_W0 L D2-11 XS1 L (12) D2-10 XS0 LHL (11) D2-09 REG_ADJ1 D2-08 REG_ADJ0 X'tal OSC ADJ [When a 4.5MHz oscillator element is used] 000 Xtal (Center value) 001 ↓ 010 ↓ ↓ 011 100 ↓ ↓ 101 110 ↓ 111 +150Hz D2-07 X_SW_2 L (10) D2-06 X_SW_1 L D2-05 X_SW_0 L IC internal signals I/O ports Control data 0 : input, 1 : output Normally set to 0. D2-04 0 LHL (9) D2-03 0 D2-02 0 D2-01 0 L No.A0633-28/42 D2-00 LSB 0 L LV25400W FM AGC ON 0 1 Normal ON IN3-1 tuner setting 1 Address 69h, Subaddress[0] A A A A B B B B IN 32103210 AM AGC ON 0 1 Normal ON 0 Sub Address Code 01101001 Address Code D31-31 MSB D31-30 D31-29 D31-28 D31-27 D31-26 D31-25 D31-24 D31-23 D31-22 D31-21 D31-20 D31-19 D31-18 D31-17 D31-16 D31-15 D31-14 D31-13 D31-12 D31-11 D31-10 D31-09 D31-08 D31-07 D31-06 D31-05 D31-04 D31-03 D31-02 D31-01 D31-00 LSB L L L L L L L L L L L L L L L L L L (23) L L L L L (22) L L L L L (21) L L L L (37) (27) (26) (25) (24) Wide-10.7MHz 0 ON 1 OFF Narrow-10.7MHz Tuner off setting 0 Normal operation 1 Tuner off 0 ON 1 OFF IQ mixer gain adjustment 0 1 Gain Down Normal operation TEST for DAC 0:Normal 1:Test-Mode ANT-DAC 000000000 000000001 000000010 000000011 000000100 000000101 000000110 000000111 000001000 111111010 111111011 111111100 111111101 111111110 111111111 0.3V ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ 7.1V RF-DAC 000000000 000000001 000000010 000000011 000000100 000000101 000000110 000000111 000001000 111111010 111111011 111111100 111111101 111111110 111111111 0.3V ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ 7.1V No.A0633-29/42 LV25400W Keyed AGC switch 0 1 Wide+narrow Narrow only FM PIN diode forced on switch 0 1 Normal operation Forced on IN3-2 tuner setting 2 Address 69h, Subaddress [1] A A A A B B B B IN 32103210 1 Sub Address Code FMFETOFF W_KEYED 01101001 Address Code D32-31 D32-28 D32-27 D32-26 D32-25 D32-24 D32-23 D32-22 D32-21 D32-20 D32-19 D32-18 D32-17 D32-16 D32-15 D32-14 D32-13 D32-12 D32-11 D32-10 D32-09 D32-08 D32-07 D32-06 D32-05 D32-04 D32-03 D32-02 D32-01 D32-00 MSB LSB L L L L L L (34) L L L L L L L L L L L L L L L L L L L L L L L L L L (37) (36) (35) (33) (32) (31) (30) (29) (28) IF AGC clamp variations correction IN3-2 D28-25 (narrow-out side) AM RF AGC amplifier threshold (gradual) Keyed AGC threshold 0 0 0 0 +5dB 0001 ↓ 0010 ↓ 0011 ↓ 0100 ↓ 0101 ↓ 0110 ↓ 0111 ↓ ↓ ↓ 1010 ↓ 1011 ↓ ↓ 1100 ↓ 1101 1110 ↓ 1 1 1 1 -5dB S-Meter Shift(TSOUT) 0 0 0 0 1.0+VBE ↓ 0001 ↓ 0010 ↓ 0011 ↓ 0100 ↓ 0101 ↓ 0110 ↓ 0111 ↓ ↓ ↓ 1010 ↓ 1011 ↓ 1100 ↓ 1101 ↓ 1110 1 1 1 1 2.5+VBE 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 0.14 FM/AM W-AGC Sensitivity 2.2 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 0.14 2.57 AM RF AGC amplifier threshold (steep) 00000 00001 00010 00011 00100 00101 00110 00111 11010 11011 11100 11101 11110 11111 198µA(1.2V) ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ 300µA(1.9V) 0000 0001 0010 0011 0100 0101 0110 0111 1010 1011 1100 1101 1110 1111 1.0 ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ 2.5 FM/AM N-AGC Sensitivity 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 0.14 2.5 No.A0633-30/42 LV25400W Control Data Documentation No. (1) Control block/data Programmable divider data P0 to P15 DVS Description • Sets the programmable divider's divisor. This is a binary value in which P0 is the LSB, P15 the MSB. DVS = 0 : The IC internal FMIN pin is stopped (pulled down) DVS = 1 : The IC internal FMIN pin is selected Set divisor (N) : 272 to 65536 Input frequency range : 120 to 270 MHz * : See the "Programmable Divider Structure" section for more information. (2) AM oscillator divisor control OSC D1, OSC D2 • OSC D1, OSC D2−AM oscillator divisor control OSC D1 0 0 1 1 (3) Tuner mode switching AM/FM (4) Programmable divider stop DVS • DVS = 0 : The IC internal PLL-IN pin is stopped (pulled down) DVS = 1 : The IC internal PLL-IN pin is selected Set divisor (N) : 272 to 65536 Input frequency range : 120 to 270 MHz * : See the "Programmable Divider Structure" section for more information. (5) Reference divider data R0 to R3 • Selects the reference frequency. Reference frequency setting (kHz) R3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 R2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 R1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 R0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Crystal : 20.5MHz Illegal value 100 50 25 12.5 6.25 3.125 3.125 10 Illegal value 5 1 Illegal value Illegal value Illegal value Illegal value Crystal : 4.5/7.2MHz 100 50 25 25 12.5 6.25 3.125 3.125 10 9 5 1 3 30 Illegal value Illegal value Continued on next page. CTS GT0, GT1 CTP CTC OSC D2 0 1 0 1 Divisor Divide by 10 Divide by 8 Divide by 6 Divide by 4 P0 to P15 OSC D1, D2 AM/FM P0 to P15 Related data AM/FM OSC D1, D2 WB, OSC DIV • Tuner mode switching between AM and FM 1 = AM 0 = FM No.A0633-31/42 LV25400W Continued from preceding page. No. (6) Control block/data Tuner mode switching AM/FM oscillator divisor OSC_DIV WB Description (1) AM/FM/WB oscillator divisor control WB 0 0 1 1 OSC DIV 0 1 0 1 Divisor Divide by 2 Divide by 3 Divide by 1 Divide by 1 Related data P0 to P15 DVS * : WB: Select 1 for weather band reception (2) AM oscillator divisor control OSD D2 0 1 0 1 OSC D1 0 0 1 1 Divisor Divide by 10 Divide by 8 Divide by 6 Divide by 4 In FM mode, only the WB and OSC DIV bits are valid. In AM mode, this function is set up by combination of the OSC D2, OSC (however, this is fixed at the divide-by-2 setting) D1, WB, and the OSC DIV bits. FM (Japan) : Fixed at the divide-by-3 setting FM (other regions) : Fixed at the divide-by-2 setting WB : Fixed at the divide-by-1 setting (OK if WB = 1) In AM mode, set WB = 0, OSC DIV = 0 for the divide-by-2 setting. The OSC D2 and OSC D1 bits can be set according to end product needs. Example : USA : (1) × (2) = divide by 20 SW2 : (1) × (2) = divide by 8 (7) FM IQ mixer phase adjustment DELAY_ADJ0 DELAY_ADJ1 0 0 1 1 • FM IQ mixer phase adjustment FM-IQMIX phase_Adjust DELAY_ADJ0 DELAY_ADJ1 0 1 0 1 Adjustment amount Small ↓ ↓ Large OSC_DIV Continued on next page. No.A0633-32/42 LV25400W Continued from preceding page. No. (8) Control block/data PLL filter switching mode MODE • Switches the PLL filter PLL filter switching Filter state Normal W-FILTER MODE 0 1 AM/FM 0 1 0 1 AM filter OFF ON ON FM filter ON OFF ON Description Related data AM/FM Normal mode (MODE = 0) The filter state is switched in conjunction with the AM/FM bit. FM mode (AM/FM = 0) A filter is formed on pins 8 and 11. Since this filter can be independent of the filter used in AM mode, PLL locking can be fast. AM mode (AM/FM = 1) A filter is formed on pins 9 and 10 and with the two internal switches SW1 and SW2. An additional filter is added using an internal resistor and an external capacitor. W-filter mode (MODE = 1) Both filters are enabled, regardless of the AM/FM bit. (All of pins 8, 9, 10, and 11, and switches SW1 and SW2 are used.) This is used when sidebands occur in AM mode, and in other cases. However, there are case where, depending on the particular filter component values, this mode cannot be used. +8V PIN58 VDD PIN23 CP1 3kΩ SW2 div 5kΩ 1kΩ SW3 FM OSC 3 OSC_B OSC_C SW1 4 5 VT FET_GND 6 7 8 FM_FET_OUT 9 AM_FET_OUT 10 AM_CP 11 FM_CP C3 2pF C4 3pF C7 0.033µF C10A 1µF C11A 0.033µF C4 330pF L5 R7 30kΩ D5 SVC704 C11 1.3kΩ C12 2.2kΩ C11B 2200pF (9) IC internal signals I/O ports Control data • Specifies the I/O direction for the I/O ports Data = 0 : Input port. The value 0 should be specified in normal operation. = 1 : Output port. A value of 1 is used for IC testing. * : This data must be set to 0 at all times other than IC evaluation. Normally set to 0. (10) Crystal oscillator fine adjustment • Adjusts the crystal 4.5 MHz reference frequency if beating occurs X’tal OSC ADJ [When a 4.5MHz oscillator element is used] XS0, XS1 R0 to R3 X_SW_0 X_SW_1 X_SW_2 000 001 010 011 100 101 110 111 Xtal (Center value) ↓ ↓ ↓ ↓ ↓ ↓ +150Hz Continued on next page. No.A0633-33/42 LV25400W Continued from preceding page. No. (11) ADJ 2.7V REG ADJ REG_ADJ0 REG_ADJ1 00 01 10 11 (12) Crystal oscillator selection XS0, XS1 -23mV (Center value) +23mV +64mV Control block/data 2.7V REG • Adjusts the 2.7 V regulator Description Related data • Selects the crystal element. XS1 0 0 1 1 XS0 0 1 0 1 X’tal OSC 4.5MHz Illegal value Illegal value Illegal value (13) HD (wide) IF AGC amplifier variation correction bits ADJ_W0 ADJ_W1 ADJ_W2 ADJ_W3 • Corrects for sample-to-sample variations in the IF AGC amplifier gain Amount of correction : ±5 dB 4 bit (14) DO pin control data (2) IL0, IL1 • Controls the DO pin output DO pin control data (2) IL1 0 0 1 1 used. IL0 0 1 0 1 Open The I3 pin state (unused) The I2 pin state (unused) The I1 pin state (unused) IN Since there are no connected pins in the current product, the open setting must be (15) DO pin control data (1) ULD DT0, DT1 • Determines the DO pin output. DO pin control data (1) ULD 0 0 1 1 1 1 1 1 (16) Unlock state detection data UL0, UL1 IL0 0 1 0 1 0 0 1 1 DT0 0 1 0 1 0 1 0 1 DO pin Low when not locked. Monitor 1 (unused) Monitor 2 (unused) (See DO control (2)) Open Monitor 1 (unused) Monitor 2 (unused) (See DO control (2)) ULD DT0, DT1 UL0, UL1 The following item (5) must also be set when monitoring the unlock detection signal. • Selects the phase error (øE) detection width used to judge the PLL locked state. If a phase error in excess of the øE detection width from the table below occurs, the PLL is seen as being in the unlocked state. When the PLL is seen as being unlocked, the detection pin (DO) is set low. UL1 0 0 1 1 UL0 0 1 0 1 φE detection width Stopped 0 ±0.5µs ±1µs Detection pin output Open φE is output directly φE is delayed by 1 to 2 ms. φE is delayed by 1 to 2 ms. ≈ ≈ 1 to 2ms φE DO Delay Unlock state output Continued on next page. No.A0633-34/42 LV25400W Continued from preceding page. No. (17) Control block/data Crystal oscillator buffer output stop switching TWO_DOFF 1 bit Description • Stops the crystal oscillator buffer output. Two-tuner crystal oscillator buffer switching 0 1 (18) Phase comparator control data DZ0, DZ1 Normal operation Stopped Related data • Controls the phase comparator's dead zone. DZ1 0 0 1 1 DZ0 0 1 0 1 Dead zone mode DZA DZB DZC DZD The DZA setting is selected after the power-on reset. (19) Charge pump control data DLC • Forcibly sets the charge pump output to the low level (VSS level). DLC = 1 : Low level DLC = 0 : Normal operation * : If the IC deadlocks with VCO oscillator stopped with the VCO control voltage (Vtune) at 0 V, the deadlock can be resolved by setting the charge pump output to the low level and setting Vtune to VCC. This item is set to the normal operation state after the power-on reset. (20) IC internal signal I/O port control data Data = 0 : Input port. The value 0 should be specified in normal operation. = 1 : Output port. A value of 1 is used for IC testing. * : This data must be set to 0 at all times other than IC evaluation. (21) RF tuning D/A converter output D31-00 to D31-08 (22) Tuner off setting D31-09 9 bit • Set the IC to tuner off mode. 1 bit Tuner OFF mord 0 1 (23) Antenna tuning D/A converter output 9 bit D31-10 to D31-18 (24) IF AGC amplifier (narrow/wide) on/off switching D31-25 D31-26 (25) Forced AGC (AM/FM) switching D31-27:FM AGC 0 = NORMAL, 1 = ON D31-27 D31-28 Each 1 bit (26) IQ mixer gain adjustment D31-29 • Switches the FM IQ mixer gain. 1 bit IQ mixer gain adjustment 0 1 (27) Gain Down Normal operation D31-28:AM AGC 0 = NORMAL, 1 = ON Each 1 bit • Operates the forced AGC circuit (narrow/wide). D31-25 : wide-10.7MHz 0 = ON , 1 = OFF D31-26 : narrow-10.7MHz 0 = ON , 1 = OFF • Operates the IF AGC amplifier circuit (narrow/wide). Normal operation Tuner-OFF • Applies a control voltage to the RF tuning circuit (varactor). • Specifies the I/O direction for the I/O ports • Applies a control voltage to the antenna tuning circuit (varactor). (28) AM/FM wide AGC setting D32-0 to D32-3 • Sets the AM/FM wide AGC sensitivity. 4 bit Continued on next page. No.A0633-35/42 LV25400W Continued from preceding page. No. (29) Control block/data AM/FM narrow AGC setting D33-4 to D33-7 (30) Keyed AGC setting D32-8 to D32-11 (31) AM RF AGC amplifier threshold (steep) setting 4 bit D32-12 to D32-15 (32) AM RF AGC amplifier threshold (gradual) setting 4 bit D32-16 to D32-19 (33) S-meter shifter control D32-20 to D32-24 (34) Analog (narrow) IF AGC clamp variations correction Amount of correction : ±5 dB D32-25 to D32-28 4 bit (35) FM PIN diode forced on state bit 1 bit FMFETOFF (36) Keyed AGC connection circuit selection 1 bit W_KEYED Keyed AGC switch 0 1 (37) D31-31 D32-31 Each 1 bit • Sub-code address Wide + narroww Narrow only • Modifies the keyed AGC connection circuit. • Forcibly sets the FM PIN diode to the on state. • Controls the FM S-meter shifter circuit output value. 5 bit • Corrects the sample-to-sample variations in the IF AGC clamp circuit. • Sets the AM RF AGC amplifier circuit threshold (gradual). Description • Sets the AM/FM narrow AGC sensitivity. 4 bit • Controls the FM keyed AGC sensitivity. 4 bit • Sets the AM RF AGC amplifier circuit threshold (steep). Related data Programmable Divider Structure 4 bits FMIN DVS Swallow Counter Programmable Divider fvco = ferf × N 12 bits fvco/N PD ferf φE DVS 1 0 Set divisor (N) 272 to 65535 - Input frequency range (f (MHz)) 120 ≤ f ≤ 270 - IC internal FMIN pin Selected Stopped * : Since the IC is closed internally, the input sensitivity is not specified. No.A0633-36/42 LV25400W Phase Comparator and Charge Pump Circuits (1) Phase comparator and charge pump operation In the PLL circuit block shown in figure 1, the phase comparator compares the phases of the reference frequency (fr) and the comparison frequency (fp), and outputs the amount of the phase difference from the charge pump. Figure 1 PLL Circuit Block RF Mixer fr Phase Detector Programmable Divider fp Charge Pump Leakage during strong-field input LPF VCO Reference Divider Figure 2 shows the phase comparator/charge pump output characteristics. The phase comparator outputs a voltage Vφ that is proportional to the phase difference φ between fr and fp. The phase comparator's characteristics can be switched by changing the phase comparator dead zone mode setting. The phase comparator can be set to modes (DZA, DZB) in which both the charge pump p-channel and n-channel sides are turned on when the phase difference is small, or can be set to a mode (DZD) that does not output the phase difference when the phase difference is small. Figure 2 Phase Comparator/Charge Pump Characteristics Vφ[V] D ZA mode fp > fr D ZB mode Vφ[V] fp > fr φ err[ns] φ err[ns] fr > fp Dead Zone(--) fr > fp Dead Zone(-) Vφ[V] D ZC mode D ZD mode Vφ[V] fp > fr fp > fr φ err[ns] fr > fp Dead Zone ≈ 0 fr > fp φ err[ns] Dead Zone(+) No.A0633-37/42 LV25400W (2) Dead zone mode characteristics The table below presents an overview of the characteristics in each of the dead zone modes. Setting DZ1 0 0 1 1 DZ0 0 1 0 1 Dead zone mode DZA DZB DZC DZD Charge pump (p/n-channel) state at 0 phase difference On/on On/on On or off Off/off Dead zone width (for reference purposes) - -(-15[ns]) - (-8[ns]) Close to 0 (0[ns]) + (+8[ns]) Illegal setting Notes (3) Dead zone mode characteristics and selection criteria This section describes the characteristics of each dead zone mode and the criteria for selecting that mode. (1) DZA mode In DZA mode, the correction signal is output from the charge pump even if the reference frequency (fr) and comparison frequency (fp) match. This results in excellent signal-to-noise ratio characteristics. However, due to the generation of reference frequency component sidebands, beating may occur in the presence of a strong input signal. This is because the PLL loop responds sensitively to leakage components from the RF stage through the mixer and this modulates the VCO. (2) DZB mode Like DZA mode, in DZB mode the correction signal is output from the charge pump even if the reference frequency (fr) and comparison frequency (fp) match. However, the correction signal voltage is lower in DZB mode than in DZA mode. The feature of this mode is that it provides a better signal-to-noise ratio than DZC or DZD mode yet is less susceptible to beating than DZA mode. (3) DZC mode In DZC mode, a correction signal proportional to the phase difference between the reference frequency (fr) and comparison frequency (fp) is output from the charge pump. A small amount of noise may occur when the phase difference is close to 0 ns. Since the signal-to-noise ratio may degrade significantly at low temperatures (under -30°C), this mode should not be used. (4) DZD mode In DZD mode, a correction signal proportional to the phase difference between the reference frequency (fr) and comparison frequency (fp) is output from the charge pump. The correction signal is not output when the phase difference is in the vicinity of ± . As a result the signal-to-noise ratio is worse than the other modes, but the occurrence of beating is suppressed. No.A0633-38/42 LV25400W LV25400W bit control specification: reference values 1. FM S-Meter shifter LSB D32-20 0 0 1 LSB D2-12 0 1 1 LSB D32-25 0 1 1 LSB D32-00 0 1 1 LSB D32-04 0 1 1 LSB D32-08 0 1 1 D32-09 0 1 1 D32-05 0 1 1 D32-01 0 1 1 D32-26 0 1 1 D2-13 0 1 1 D32-21 0 0 1 D32-22 0 0 1 D2-14 0 0 1 D32-27 0 0 1 D32-02 0 1 1 D32-06 0 1 1 D32-10 0 1 1 MSB D32-23 0 0 1 MSB D2-15 0 1 1 D32-28 0 1 1 D32-03 0 0 1 D32-07 0 0 1 D32-11 0 0 1 Functions IFAGC (HD) -Amp-Gain : +4dB ↑ IFAGC (HD) -Amp-Gain : 0dB ↓ IFAGC (HD) -Amp-Gain : -4dB 1 1 1 1 1 1 0 1 MSB Functions IFAGC (Analog) -Amp-Gain : +4dB ↑ IFAGC (Analog) -Amp-Gain : 0dB ↓ IFAGC (Analog) -Amp-Gain : -4dB 1 1 1 1 1 1 0 1 MSB Functions Wide-AGC-ON-Level : -8.5dB ↑ Wide-AGC-ON-Level : 0dB ↓ Wide-AGC-ON-Level : +5.5dB 1 1 1 1 1 1 1 0 MSB Functions Narrow-AGC-ON-Level : -9.5dB ↑ Narrow-AGC-ON-Level : 0dB ↓ Narrow-AGC-ON-Level : +6.5dB 1 1 1 1 1 1 1 0 MSB Functions Keyed-AGC-ON V32 : 0.27V ↑ Keyed-AGC-ON V32 : 1.20V ↓ Keyed-AGC-ON V32 : 2.25V D32-24 0 1 1 Functions Vsm (DC) =1.87V : +5.6dB ↑ Vsm (DC) = 2.15V : 0dB ↓ Vsm (DC) = 2.45V : -6.0dB 2-1. FM IFAGC (HD) 2-2. AM IFAGC (HD) LSB D2-12 0 D2-13 0 MSB D2-14 0 D2-15 0 Functions IFAGC (HD) -Amp-Gain : +4dB ↑ IFAGC (HD) -Amp-Gain : 0dB ↓ IFAGC (HD) -Amp-Gain : -4dB 3-1. FM IFAGC (Analog) 3-2. AM IFAGC (Analog) LSB D32-25 0 D32-26 0 MSB D32-27 0 D32-28 0 Functions IFAGC (Analog) -Amp-Gain : +4dB ↑ IFAGC (Analog) -Amp-Gain : 0dB ↓ IFAGC (Analog) -Amp-Gain : -4dB 4-1. FM Wide-AGC-ON-Level 4-2. AM Wide-AGC-ON-Level LSB D32-00 0 D32-01 0 MSB D32-02 0 D32-03 0 Functions Wide-AGC-ON-Level : -8.5dB ↑ Wide-AGC-ON-Level : 0dB ↓ Wide-AGC-ON-Level : +7.0dB 5-1. FM Narrow-AGC-ON-Level 5-2. AM Narrow-AGC-ON-Level LSB D32-04 0 D32-05 0 MSB D32-06 0 D32-07 0 Functions Narrow-AGC-ON-Level : -9.0dB ↑ Narrow-AGC-ON-Level : 0dB ↓ Narrow-AGC-ON-Level : +5.0dB 6-1. Keyed-AGC-ON-Level No.A0633-39/42 LV25400W Data content LV25400W (AC/DC) Serial data PLL IN1 data CCB address Control data 1 Control data 2 Control data 3 Control data 4 DELAY_ADJ0 DELAY_ADJ1 OSC_DIV Data contents PLL Counter value 15 FM_US98.1M fref = 100k 33 MW1000k fref = 10k (USA) 62 X45FM_US98.1M fref = 100k 69 X45FM_JP83M fref = 100k Delay = 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 1 0 1 0 1 0 1 0 1 1 0 1 0 0 1 0 0 0 1 0 0 0 0 0 0 1 1 1 1 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2176 23400 2176 2169 PLL IN2 data CCB address Control data 1 Control data 2 Control data 3 TWO_DOFF Control data 4 IFAGC-Amp Gain (HD) 11 11 11 11 11 ANT-DAC 0 1 2 4 8 0 REG_ADJ0 REG_ADJ1 X_SW_0 X_SW_1 X_SW_2 ADJ_W0 ADJ_W1 ADJ_W2 ADJ_W3 Data contents 13 FM reception mode settings 15 MW reception mode settings 44 X45 MW reception mode settings 48 X45X'tal_ADJ = 0 50 X45Xtal_ADJ = 7 (IF_Dain_W = 11) 1 1 1 0 0 0 0 0 0 1 1 1 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 1 0 0 0 0 1 1 1 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 1 0 0 0 0 1 1 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 PLL IN3-1 data CCB address Control data 1 TUNEROFF Control data 2 Control data 3 NC_AGC_SW NOISE_AGC NC_SENS0 NC_SENS1 AGC_LIMIT Control data 4 NARROW_OFF Sub-Address AMAGC_ON FMAGC_ON IQMIX-Gain WIDE_OFF DTESTSW ANTDAC0 ANTDAC1 ANTDAC2 ANTDAC3 ANTDAC4 ANTDAC5 ANTDAC6 ANTDAC7 ANTDAC8 ANC_OFF RFDAC0 RFDAC1 RFDAC2 RFDAC3 RFDAC4 RFDAC5 RFDAC6 RFDAC7 RFDAC8 Data contents 1 Bit-Check-0 2 Bit-Check-1 3 Bit-Check-2 5 Bit-Check-4 7 Bit-Check-8 9 Bit-Check-16 11 Bit-Check-32 13 Bit-Check-64 15 Bit-Check-128 17 Bit-Check-256 18 Bit-Check-511 25 Standard FM 26 Standard AM 27 FM-Wide-OFF 38 FM-IQMIX-GAIN-UP 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 16 16 32 32 64 64 128 128 256 256 511 511 256 256 0 256 256 256 256 PLL IN3-2 data CCB address Control data 1 Control data 2 Control data 3 Control data 4 FM-S-meter Shifter 15 15 15 15 Adjustment IFAGC-Amp Gain (Analog) 0 0 0 0 11 11 11 11 11 11 Narrow-AGC Keyed-AGC AM-RFAGC Hard AM-RFAGC Soft Sub-Address RFAGC_H0 RFAGC_H1 RFAGC_H2 RFAGC_H3 FMFETOFF S_METER0 S_METER1 S_METER2 S_METER3 S_METER4 RFAGC_S0 RFAGC_S1 RFAGC_S2 RFAGC_S3 KEY_AGC0 KEY_AGC1 KEY_AGC2 KEY_AGC3 W_KEYED Data contents 13 FM (W-AGC-Bit = 0) 15 FM (W-AGC-Bit = 15) 16 FM (N-AGC-Bit = 0) 18 FM (N-AGC-Bit = 15) 25 Standard FM-2 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 1 1 1 1 0 1 1 1 1 0 1 1 1 1 0 1 0 0 0 1 1 0 1 1 1 1 0 1 1 1 1 0 1 1 0 0 0 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 * 1 1 1 1 * 1 1 1 1 * 1 1 1 1 * 0 0 0 0 * 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 26 Standard AM-2 27 AM (W-AGC-Bit = 0) 29 AM (W-AGC-Bit = 15) 30 AM (N-AGC-Bit = 0) 32 AM (A-AGC-Bit = 15) 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 1 0 1 1 1 1 0 1 1 1 1 0 1 1 1 0 0 1 0 0 1 1 1 0 1 1 1 1 0 1 1 1 1 0 1 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 Wide-AGC W_AGC0 W_AGC1 W_AGC2 W_AGC3 N_AGC0 N_AGC1 N_AGC2 N_AGC3 ADJ_N0 ADJ_N1 ADJ_N2 ADJ_N3 IN3-2 A0 A1 A2 A3 A4 A5 A6 A7 07700 15 7 7 0 0 70700 7 15 7 0 0 77700 7 7 7 2 10 0 7 7 2 10 15 7 7 2 10 7 0 7 2 10 7 15 7 2 10 RF-DAC IN3-1 A0 A1 A2 A3 A4 A5 A6 A7 X'tal-Adj TEST0 TEST1 TEST2 IN2 I/O-1 I/O-2 I/O-3 I/O-4 I/O-5 ---- ---- ULD DLC DT0 DT1 DZ0 XS0 XS1 DZ1 UL0 UL1 IL0 IL1 A0 A1 A2 A3 A4 A5 A6 A7 6 6 0 0 7 0 1 2 4 8 Delay-Adj 0 0 0 1 OSC_D1 OSC_D2 AM/FM MODE IN1 ---- ---- ---- DVS P10 P11 P12 P13 P14 P15 WB R0 R1 R2 R3 A0 A1 A2 A3 A4 A5 A6 A7 P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 15 15 15 15 15 Items marked with an asterisk are Vsm adjustment items. The bit values after adjustment must be retained. No.A0633-40/42 R43 1.8kΩ CF_180k C46 0.022µF C44 0.1µF R41 3.9kΩ C38 1000pF R38 30kΩ R41B C35 C34 C33 0.022µF 0.022µF 0.1µF XTAL_6k or 16k C40A + 10µF C40B 0.022µF C47 0.022µF VCCA5V AM_HD_IN AM_NAGC IF_OUT AGND AM_ANALOG_IN ADDRESS_SW AM_ANALOG_IN BYPASS IF_N_IN1 VREG27 AM_HD_IN BYPASS VSM_AC VREG49 AM_WAGO IF_N_IN2 47 VREG49 VREG27 W AGC RF AGC 30 29 28 HD_OUTP HD_OUTN AGC_DAC_S 26 AGC_DAC_I 10.7OUTN N AGC ANT d FM amp 48 IF_W_IN2 VSM_DC C32 0.22µF 32 R32 15kΩ 31 10.7OUTP 270Ω 270Ω 270Ω 270Ω DIV_OUT_IF R63 470Ω 46 45 44 43 42 41 40 39 38 37 36 35 34 33 R70C 220Ω RF_AGC AM 1st AMP Analos-IF AGC L70A 1mH L70B 49 C49 0.022µF AM_RF_AGC 50 CPH5905 C51 1µF VSM AM amp + BUFF + - C31 0.022µF C30 0.022µF C29 0.022µF C28 0.022µF DIV_OUT_IF 10.7M_OUT_P 10.7M_OUT_M HD_OUT_P FM cut 6.8µH 47µH Sample Application Circuit R70A 1M + 36pF AM_IN AM amp FM amp Loding coil MIX_OUT1 54 iBoc-IF AGC C35 0.022µF C36 10µF 15pF 51 + BYPASS AM_ANT_D 52 C53 30pF N_AGC 53 D70 1SV251 C49 0.022µF N AGC W AGC K AGC R70B 470Ω L72 C54 C60 0.022µF 27 C27 0.022µF HD_OUT_M AGC_DAC_S C37 0.022µF C56 1000pF RF_DAC 57 RF_DAC IN3-1 IN3-2 1/10,1/8 1/6,1/4 AM MIX OSC BUFFER +8V 3kΩ div ANT D RF AGC SW 5 8 9 10 11 12 13 14 6 7 C7 0.01µF 1 2 FM OSC 3 4 SW 10kΩ R11 CP1 BUFF IQ MIX IN1/IN2 C57 1000pF 55 MIX_OUT2 ANT_DAC R72 56 ANT_DAC 30kΩ 25 VREG4 VREG3 AGC_DAC_I 24 C24 VREG 4V 0.22µF C23 VREG 3V 0.22µF LV25400W R56 30kΩ R57 30kΩ 0.1µF AM_MIX 60 coil C58 30Ω C58A + 100µF 23 FE_VCC8V 58 C58B 0.022µF AM_MIX 59 IN2 C59 22 bus VCCD5V DO C22 1µF C64 1000pF IN1 C61 10pF FM_MIX1 swallow programable phase reference counter divider detecter counter 21 20 19 18 BUFF XTAL_OSC 4.5M 15 16 DO CL DI CE M_COM 47kΩ CL DI CE XTAL_OSC 17 OUT2 C101 18pF R62 100kΩ C107 1000pF FM_RF_AGC C64 220kΩ 64 C103 C105 4pF 5pF R107A 100kΩ 100pF FM_IN 0.15µH R107B 100kΩ R62 180Ω 61 IN C1000 8pF FM_MIX2 62 IN VCD2 C62 SVC208 10pF FM_ANTD 63 VCD1 SVC208 Pin_D2 1SV251 C17 0.022µF 270Ω XTAL_OUT AM_CP DGND XTAL_IN FM_CP XTAL_GND XTAL_VCC C10A 1µF XTAL_OSC OUT2 VT OSC_C OSC_B FE_GND FET_GND OSC_VCC R63 C63 100Ω 0.1µF C107 1000pF C3G 1pF 330pF C64 + 2.2µF C3 C4 2pF 3pF C34 AM_FET_OUT FM_FET_OUT C2B 1000pF KV1862 R5 30kΩ C5 220pF R11 1.3kΩ C11A R12 0.033µF 2.2kΩ C11B 2200pF C15 C14 10pF 15pF C13A 0.022µF 5 6 C12 0.1µF 7 8 GND TEST NC VCC 30Ω DO DI EEPROM SK CS 4 3 2 1 C107 0.1µF CS 30kΩ VCCD5V VCCA5V No.A0633-41/42 VCC8V LV25400W SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. 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SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of December, 2007. Specifications and information herein are subject to change without notice. PS No.A0633-42/42