LV5106FN

Ordering number : EN8931 Bi-CMOS IC LV5106FN Overview For cell phone system Power supply The LV5106FN is a power supply for a cell phone system that integrates four series regulators, two de-writers, and an LED driver (with 5V output) on a single chip. Functions • REG×4 (CMOS output) • DET circuit (one for REG1, one for VBAT (with reset output) • Thermal shutdown circuit (150°C) • Three-color LED driver (charge pump 5V output incorporated) • FRONT LED driver • Mic bias output Features • Low power consumption • Built-in charge pump circuit • Built-in 3-color LED drive circuit 4μA when REG4 and VBATDET operate 30μA when REG1, REG2, REG3, and REG4 + DET1 and VBATDET operate VBAT : 3.2V to 4.5V, 5V constant output with a load of 80mA Three independent colors, 128-step PWM intensity control Specifications Maximum Ratings at Ta = 25°C Parameter Maximum supply voltage Allowable power dissipation Operating temperature Storage temperature Symbol VCC max Pd max Topr Tstg Ta ≤ 75°C *Mounted on a board. Conditions Ratings 7 440 -30 to +75 -40 to +125 Unit V mW °C °C ∗ Mounted on a 50.0mm×50.0mm×0.8mm, glass epoxy board. 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To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 61307 TI PC B8-6923 No.8931-1/6 LV5106FN Operating Conditions at Ta = 25°C Parameter Supply voltage 1 Supply voltage 2 Symbol VBAT VBATCP 29, 33pin 3pin Conditions Ratings 3.2 to 4.5 3.2 to 5.9 Unit V V Electrical Characteristics Ta = 25°C, VBAT = 3.6V, VCHARGE = 0V, unless otherwise specified. Parameter Analog : Current dissipation Current dissipation 1 ICC1 REG4, VBATDET : ON REG1, 2, 3, charge punp, DET1 : OFF no-load VBAT = 3.2V to 4.2V Current dissipation 2 Current dissipation 3 Current dissipation 4 Current dissipation 5 Current dissipation 6 REG1 Output voltage 1 Output voltage 2 Output voltage 3 VO1 VO1E ΔVO1 IO = 30mA, ECO = H IO = 30mA, ECO = L (IO = 30mA, REG1 output voltage at ECO = H) (IO = 10mA, REG1 output voltage at IO = 10 mA and ECO = L) Output voltage 4 ΔVO2 IO = 30mA (charge-pump on-time REG1 output voltage) – (charge-pump off-time REG1 output voltage) Drop out voltage Load regulation Line regulation Output voltage temperature coefficient Ripple rejection Output noise voltage REG2 Output voltage 1 Output voltage 2 Drop out voltage Load regulation Line regulation Output voltage temperature coefficient Ripple rejection Output noise voltage VR2 VON2 VBAT = 3.6V, IO = 30mA, VRR = -20dBV, fRR = 1kHz IO = 30mA, 20Hz < f < 20kHz 75 μVrms Continued on next page. 65 dB VO2 VO2E VDR1 ΔVOLO2 ΔVOLN2 ΔVO2/ΔTj IO = 30mA, ECO = H IO = 30mA, ECO = L VBAT = 2.5V, IO = 30mA IO = 1 to 100mA VBAT = 3.3 to 4.5V, IO = 1mA Ta = -25 to 75°C, IO = 30mA 2.55 2.53 2.6 2.6 0.06 10 10 ±100 2.65 2.67 0.12 100 60 V V V mV mV ppm/°C VR1 VON1 VBAT = 3.6V, IO = 30mA, VRR = -20dBV, fRR = 1kHz IO = 30mA, 20Hz < f < 20kHz 75 μVrms 65 dB VDR1 ΔVOLO1 ΔVOLN1 ΔVO1/ΔTj VBAT = 2.7V, IO = 30mA IO = 1 to 150mA VBAT = 3.3 to 4.5V, IO = 1mA Ta = -25 to 75°C, IO = 30mA 0.04 10 10 ±100 0.06 50 60 V mV mV ppm/°C -35 35 mV 2.74 2.71 0 2.8 2.8 15 2.86 2.89 35 V V mV ICC2 ICC3 ICC4 ICC5 ICC6 REG1, 2, 4, DET1, VBATDET : ON REG3, charge pump : OFF no load REG3, 4, VBATDET : ON REG1, 2, DET1, charge pump : OFF no load REG1, 2, 3, 4, DET1, VBATDET : ON charge pump : OFF no load REG1, 2, 3, 4, DET1, VBATDET : ON charge pump : OFF no load ECO : L REG1, 2, 3, 4, charge pump, DET1, VBATDET : ON no load 5 8 mA 15 21 μA 30 42 μA 20 28 μA 25 35 μA 4 10 μA Symbol Conditions min Ratings typ max Unit No.8931-2/6 LV5106FN Continued from preceding page. Parameter REG3 Output voltage 1 Output voltage 2 Drop out voltage Load regulation Line regulation Output voltage temperature coefficient Ripple rejection Output noise voltage REG4 Output voltage Drop out voltage Load regulation Line regulation Output voltage temperature coefficient Ripple rejection Output noise voltage DET1 Detection voltage Hysteresis width Detection voltage temperature coefficient VBATDET Detection voltage Hysteresis width Output pull-up resistance Detection voltage temperature coefficient Charge pump Output voltage 1 Oscillation frequency Output ripple Efficiency LED driver LEDR output voltage LEDG output voltage LEDB output voltage LEDF output voltage LEDR OFF leak LEDG OFF leak LEDB OFF leak LEDF OFF leak Mic bias Output ON resistance OFF leakage current Output voltage (GP_0, 1) Output H level Output L level VOH VOL IO = 1mA IO = 1mA REG10 -0.3 0 0.3 V REG10 V RMO ILM IO = 10mA 10 0 1 Ω μA VLR VLG VLB VLF ILR ILG ILB ILF IO = 40mA IO = 40mA IO = 40mA IO = 40mA 0 0 0 0 0.1 0.1 0.1 0.15 0 0 0 0 0.2 0.2 0.2 0.3 1 1 1 1 V V V V μA μA μA μA VCPO1 CPOSC VRCP η VBAT = 3.6, Load current 80mA VBAT = 3.2, Load current 80mA VBAT = 3.2 to 5.9V, Load current 80mA 4.8 0.7 5 1 ±200 72 5.2 1.3 V MHz mVp-p % VDB ΔVHB RPDETB ΔVDB/ΔTj Ta = -25 to 75°C H→L 3.04 93 1.4 3.1 155 1.8 ±100 3.16 217 2.2 V mV MΩ ppm/°C VD1 ΔVH1 ΔVD1/ΔTj Ta = -25 to 75°C H→L 2.45 75 2.5 125 ±100 2.55 175 V mV ppm/°C VR4 VON4 VBAT = 3.6V, IO = 30mA, VRR = -20dBV, fRR = 1kHz IO = 30mA, 20Hz < f < 20kHz 75 μVrms 55 dB VO4 VDR3 ΔVOLO4 ΔVOLN4 ΔVO4/ΔTj IO = 30mA VBAT = 2.9V, IO = 30mA IO = 1 to 50mA VBAT = 3.3 to 4.5V, IO = 1mA Ta = -25 to 75°C, IO = 30mA 2.91 3 0.06 10 10 ±100 3.09 0.12 50 60 V V mV mV ppm/°C VR3 VON3 VBAT = 3.6V, IO = 30mA, VRR = -20dBV, fRR = 1kHz IO = 30mA, 20Hz < f < 20kHz 75 μVrms 65 dB VO3 VO3E VDR3 ΔVOLO3 ΔVOLN3 ΔVO3/ΔTj IO = 30mA, ECO = H IO = 30mA, ECO = L VBAT = 2.4V, IO = 30mA IO = 1 to 50mA VBAT = 3.3 to 4.5V, IO = 1mA Ta = -25 to 75°C, IO = 30mA 2.45 2.43 2.5 2.5 0.06 10 10 ±100 2.55 2.57 0.12 50 60 V V V mV mV ppm/°C Symbol Conditions min Ratings typ max Unit Continued on next page. No.8931-3/6 LV5106FN Continued from preceding page. Parameter Symbol Conditions min Input voltage 1 (SDATA, SEN, SCLK) H level L level VINH1 VINL1 Input H level Input L level REG10 ×0.8 0 REG10 ×0.2 Input voltage 2 (T_CNT, TCXOCNT, ECO, REG3CTL, REG12CTL, PWRON, RTCINT, MSSELO, MSSELOC, KEYSENSE4, HWRESET) H level L level Input voltage 3 (RESOUT_N) H level L level Input voltage 4 (CHG_G) H level L level Input voltage 5 (Vcharge) H level L level Input voltage 6 (VBATBK) H level L level Serial bus : Serial transfer timing Cycle time Data setup time 1 Data setup time 2 Data hold time 1 Data hold time 2 Pulse width 1 Pulse width 2 Pulse width 3 tcy1 ts0 ts1 th0 th1 tw1L tw1H tw2L SCLK clock cycle SDEN setup time for rise of SCLK SDATA setup time for rise of SCLK SDEN hold time for fall of SCLK SDATA hold time for rise of SCLK SCLK L-period pulse width SCLK H-period pulse width SDEN L-period pulse width 300 150 150 150 150 150 150 1 ns ns ns ns ns ns ns μs VINH6 VINL6 Input H level Input L level REG40 ×0.8 0 REG40 ×0.2 V VBAT V VINH5 VINL5 Input H level Input L level 4.4 0 6 3.6 V V VINH4 VINL4 Input H level Input L level REG40 ×0.8 0 REG40 ×0.2 V 6 V VINH3 VINL3 Input H level Input L level REG40 ×0.8 0 REG40 ×0.2 V REG40 V VINH2 VINL2 Input H level Input L level REG40 ×0.8 0 REG40 ×0.2 V REG40 V V REG10 V Ratings typ max Unit Package Dimensions unit : mm (typ) 3272 Top View Bottom View 0.2 7.2 7.0 36 37 25 24 0.3 5.0 0.4 7.0 7.2 0.3 48 1 (0.75) 0.5 Side View 13 12 0.2 4 - Do Not Connect (0.8) 0.85MAX SANYO : VQFN48(7X7) 5.0 0.4 No.8931-4/6 LV5106FN Serial transfer timing conditions SDEN ts0 tw2L SCLK tw1L ts1 th1 tcy1 SDATA A7 A6 A5 A4 A3 A2 A1 A0 D15 D14 D13 D3 D2 D1 D0 A7 tw1H 50% 50% th0 Address Data Data length : 24bit Clock frequency : 3MHz or les "SDATA" is taken in at fall of "SDEN" when "SCLK" of 24 clock is entered during H period of "SDEN." (Note) "SDATA" is not taken in when "SCLK" is 23 clock or less during H period of "SDEN." When "SCLOCK" exceeds 25 clock, "SDATA" is taken in at the 24th clock, and subsequent "SDATA" is ignored. Block Diagram 2.6V 100mA 2.8V 150mA VBAT14 4.7μF 2.5V 50mA 4.7μF 4.7μF 3.0V 50mA REG12CTL REG3CTL MICBIAS VBAT23 REG2O REG3O REG4O REG1O REG1OS 4.7μF DET1 26 1MΩ 36 PWRON RTCINT RREF 0.1μF 0.1μF 35 34 33 32 31 30 29 28 27 ECO 25 24 RESETL CD TCXOCNT P_CNT T_CNT TT XXμF 0.1μF 37 Seril 38 39 40 41 42 43 44 45 46 47 48 1 GNDCP 2 C- REG 2 REG 3 REG 4 REG 1 REG12CTL 23 22 VBAT BG GNDR REG12CTL REG3CTL REG12CTL VBAT DET1 21 20 19 18 17 1.8MΩ TEST2 MSSELO MSSELOC XXμF BGR VBATDET VBATBK CHG_G XXμF GP_1 GP_0 SCLK SEN KEYSENSE4 RESOUT_N HWRESET VCHARGE OSC PWM_R Counter PWM_G PWM_B 16 15 Serial CTL 9 10 FLED 11 TEST 12 SDATE 14 13 CHARGE PUMP 3 VBATCP 4 C+ 5 CPOUT 6 RLED 7 GLED 8 GNDLED 0.22μF 1μF 4.7μF BLED Top view No.8931-5/6 LV5106FN Power Control Block Diagram REG4O PWRON 1000kΩ REG4O REG4O P_CNT MSSELO 1000kΩ REG4O 10kΩ REG4O REG4O REG4O REG4O 10kΩ REG4O 2000kΩ REG4O MSSELOC RTCINT T_CNT KEYSENSE4 RESOUT_N REG4O REG4O HWRESET 100kΩ 2kΩ 120kΩ REG4O REG4O 10kΩ 100kΩ REG4O VCHARGE CHG(G) REG4O REG4O VBATBK VBAT TCXOCNT 1000kΩ REG4O TT 1000kΩ SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. 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SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of June, 2007. Specifications and information herein are subject to change without notice. PS No.8931-6/6