LV5212VH_10

Ordering number : ENA1585A Bi-CMOS IC LV5212VH Overview 8ch LED Driver The LV5212VH is a semiconductor integrated circuit that incorporates a serial input and serial or parallel output 8-stage shift register that features a CMOS structure based on Bi-CMOS process technology. The LV5212VH also contains an n-channel CMOS construction high-withstand-voltage, large-current drive 8-stage parallel output driver. Features • Serial input and serial or parallel output • Enable input for output control • Serial output enables cascade connection • Low supply current (0.0μA typ. during standby) • Serial input/output levels compatible with typical CMOS devices • High-withstand-voltage LED driver with open drain output High withstand voltage (VDS < 50V) High-current drive (IO max = 300mA) • Operating temperature range Ta = -25 to 75°C Specifications Maximum Ratings at Ta = 25°C Parameter Maximum supply voltage Output voltage Output current Allowable power dissipation Operating temperature Storage temperature Symbol VCC max VO max IO max Pd max Topr Tstg Ta ≤ 25°C * SVCC LEDO1 to LEDO8 off Conditions Ratings 6 50 300 1000 -25 to +75 -40 to +125 Unit V V mA mW °C °C * Specified board : 114.3mm × 76.1mm × 1.6mm, glass epoxy board. * The device must be used within the ranges warranted for its specifications so as to ensure its specified ratings (such as maximum ratings and operating condition ranges) are not exceeded even momentarily. Use of the device in such a way that its ratings are exceeded may cause failures, damage and other problems. Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. 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O0610 SY/N1109 SY PC 20091002-S00003 No.A1585-1/9 LV5212VH Operating Conditions at Ta = 25°C Parameter Recommended supply voltage Operating supply voltage range Output applied voltage Output current Symbol VCC VCC op VO IO Duty = 45% to 55% SVCC SVCC Conditions Ratings 5.0 3.0 to 5.5 50 300 Unit V V V mA Electrical Characteristics at Ta = 25°C, VCC = 5.0V Parameter Quiescent current drain LEDO output on resistance OFF leak current Control circuit block H level 1 L level 1 H level 2 L level 2 VINH1 VINL1 VOUTH1 VOUTL1 Input H level Input L level SOUT IO = -1mA SOUT IO = 1mA VCC × 0.8 0 VCC -0.3 0 0.3 VCC × 0.2 V V V V Symbol ICC1 Ron Ileak Conditions min LEDO driver off (standby) IO = 100mA VO = 50V Ratings typ 0 3 0 10 max 5 μA Ω μA Unit Package Dimensions unit : mm (typ) 3325 1.5 9.75 16 9 Pd max -- Ta Specified board : 114.3 × 76.1 × 1.6mm3 glass epoxy Allowable power dissipation, Pd max -- W 1.0 5.6 7.6 0.5 1 0.8 (0.48) 2.0 0.3 8 0.15 0.5 0.50 1.5MAX (1.3) 0 --25 0 25 50 75 100 Ambient temperature, Ta -- °C 0.1 2.7 SANYO : HSSOP16(275mil) No.A1585-2/9 LV5212VH Pin Assignment 16 15 14 13 PGND2 12 11 10 9 LATCH PGND2 LEDO5 LEDO6 LEDO7 LEDO8 SDATAIN 1 2 3 4 PGND1 5 6 7 Pin Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Pin name SVCC SOUT LEDO4 LEDO3 LEDO2 LEDO1 SDATAIN XRESET SGND SCK LEDO8 LEDO7 LEDO6 LEDO5 LATCH I O O O O I O O O O O I I I/O Power supply shift register output (final-stage shift register) LEDO4 Latch output (LEDO4 of shift register) LEDO3 Latch output (LEDO3 of shift register) LEDO2 Latch output (LEDO2 of shift register) LEDO1 Latch output (LEDO1 of shift register) Serial input Reset input (shift register and latch) GND Clock input (for shift register) LEDO8 Latch output (LEDO8 of shift register) LEDO7 Latch output (LEDO7 of shift register) LEDO6 Latch output (LEDO6 of shift register) LEDO5 Latch output (LEDO5 of shift register) Latch input When the latch input is held low, the LED0 output status is retained. When a high-level is input, the LED0 outputs change when the status of the shift register changes. 16 XEN I Enable inputs (LEDO1 to LEDO8) When a high-level is input, all the LED0 outputs are turned off. When a low-level is input, the shift register data is output to LED0. PGND1 PGND1 PGND1 PGND2 GND GND Description XRESET 8 Top view PGND1 LEDO4 LEDO3 LEDO2 LEDO1 SOUT SVCC SGND XEN SCK No.A1585-3/9 LV5212VH Block Diagram SCK SDATAIN LATCH XEN SVCC XRESET DQ CQ R DQ CQ R LEDO1 LEDO2 DQ CQ R DQ CQ R LEDO3 DQ CQ R DQ CQ R LEDO4 DQ CQ R DQ CQ R LEDO5 DQ CQ R DQ CQ R LEDO6 DQ CQ R DQ CQ R LEDO7 DQ CQ R DQ CQ R LEDO8 DQ CQ R DQ CQ R DQ CQ R SOUT SGND PGND1PGND2 Function The LV5212VH consists of 1) an 8-stage D-type flip-flop and 2) an 8-stage D-type flip-flop connected to the output of 1). When data is supplied to the serial data input (SDATAIN) and the clock pulse is supplied to the clock input (SCK), the serial data input signal is input to the internal shift register and the data already in the shift register shifted sequentially when the clock changes from low to high. The serial output (SOUT) is used to connect multiple LV5212VH to expand the number of bits and is connected to the SDATAIN of the next stage. (Cascade connection supported.) For parallel output, when the output control enable input (XEN) is low, the latch input (LATCH) changes from low to high and the clock pulse input changes from low to high, the serial data input signal is output to LED01, and the output is shifted sequentially. For parallel outputs (LED2 to LED8), the signals whose polarities inverted from those of the serial data input (SDATAIN) are output. When the EN input is high, outputs LED01 through LED01 all turn off. When the reset input is low, outputs LED01 through LED8 and SOUT outputs all turn off. The power must be turned on after checking that the reset input is low. No.A1585-4/9 LV5212VH Pin Functions Pin No. 7 10 Pin Name SDATAIN SCK Pin function Pull-down input Equivalent Circuit SVCC SGND 8 15 16 XRESET LATCH XEN Pull-up input SVCC SGND 2 SOUT SOUT output SVCC SOUT SGND 3 4 5 6 11 12 13 14 LEDO4 LEDO3 LEDO2 LEDO1 LEDO8 LEDO7 LEDO6 LEDO5 LEDO outputs LEDO1 to LEDO8 SVCC SGND PGND No.A1585-5/9 LV5212VH Timing conditions Parameter Clock frequency Clock pulse width Latch pulse width Data set up time Data hold time Clock latch time Input conditions 1 Input conditions 2 symbol fs1 twck twla ts1 th1 tla1 ton toff SCK and SDATAIN rise time SCL and SDATAIN fall time SCK Duty = 50% SCK LATCH SDATAIN setup time relative to the rise of SCK SDATAIN data hold time relative to the rise of SCK 50 50 25 25 100 100 100 Conditions min typ max 10 unit MHz ns ns ns ns ns ns ns twck SCK ts1 2.5V th1 ton SDATAIN 2.5V 2.5V twla tla1 LATCH 2.5V 2.5V toff 2.5V 10% 90% 90% 10% SOUT output timings Parameter SOUT delay time 1 SOUT delay time 2 symbol tdso1 tdso2 Conditions The time from a SCK falling edge to SOUT rising edge The time from a SCK falling edge to SOUT falling edge min typ max 50 50 unit MHz ns SCK 2.5V 2.5V tdso1 tdso2 2.5V SOUT 2.5V No.A1585-6/9 LV5212VH LEDO output timings Parameter LEDO delay time 1 symbol tdled1 Conditions The time from an XEN rising edge to LEDO rising edge CL = 30pF, IO = 100mA, VO = 30V LEDO delay time 2 tdled2 The time from an XEN falling edge to LEDO falling edge CL = 30pF, IO = 100mA, VO = 30V LEDO rise time trled LEDO rise time CL = 30pF, IO = 100mA, VO = 30V LEDO fall time tfled LEDO fall time CL = 30pF, IO = 100mA, VO = 30V LEDO delay time 3 tdled3 The time from a LATCH rising edge to LEDO falling edge CL = 30pF, IO = 100mA, VO = 30V 200 ns 200 ns 200 ns 100 ns min typ 100 max unit ns XEN 2.5V 2.5V tdled1 tdled2 90% LEDO 10% trled 90% 10% tfled tdled3 90% 2.5V LATCH No.A1585-7/9 LV5212VH Application Circuit Example • When parallel output is used max : 50V max : 50V 5V SVCC sub CPU SDATAIN SCK LATCH XEN XRESET LEDO1 LEDO2 LEDO3 LEDO4 LEDO5 LEDO6 LEDO7 LEDO8 SOUT SVCC sub CPU SDATAIN SCK LATCH XEN XRESET 5V LEDO1 LEDO2 LEDO3 LEDO4 LEDO5 LEDO6 LEDO7 LEDO8 SOUT Max IO : 300mA SGND1 PGND1 PGND2 SGND1 SVCC SDATAIN SCK LATCH XEN XRESET PGND1 • When serial output is used (SOUT cascade connection) max:50V 5V SVCC sub CPU SDATAIN SCK LATCH XEN XRESET LEDO1 LEDO2 LEDO3 LEDO4 LEDO5 LEDO6 LEDO7 LEDO8 SOUT LEDO1 LEDO2 LEDO3 LEDO4 LEDO5 LEDO6 LEDO7 LEDO8 SOUT To SDATAIN SGND1 PGND1 PGND2 SGND1 PGND1 PGND2 PGND2 No.A1585-8/9 LV5212VH Allowable output current characteristics 300 IO -- LEDO Ta = 25° C 300 IO -- LEDO Ta = 25° C 50°C 250 250 Output current, IO -- mA 200 50°C 75°C Output current, IO -- mA 200 75°C 150 150 100 100 50 50 0 0 duty cycle 100% 1 2 3 4 5 6 7 8 0 0 duty cycle 80% 1 2 3 4 5 6 7 8 Number of output ports, LEDO 300 Number of output ports, LEDO IO -- LEDO Ta = 25°C 50°C 75°C 250 Output current, IO -- mA 200 150 100 50 0 0 duty cycle 50% 1 2 3 4 5 6 7 8 Number of output ports, LEDO SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. 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SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of October, 2010. Specifications and information herein are subject to change without notice. PS No.A1585-9/9