LV5223GR

Ordering number : ENA1969 Bi-CMOS IC LV5223GR Overview LED Driver The LV5223GR is 9ch LED driver IC for the cell phones with built-in charge pump circuit. Features • LED driver ×9 channels (3-color 1, 3-color 2, GPO (LED) ×3, 9 channels in total) and on-chip charge pump circuit. • Each LED driver current level can be adjusted independently over the serial bus. • Ring tone and 3-color LEDs (3-color 1, 3-color 2) synchronization function. • Gradation function (3-color 1, 3-color 2, in total 6 channels only) • RLED2 and GLED2 support strobe mode. • Miniature package Function • Charge pump circuit ((2 times step up) Output voltage: 5V) • LED driver 3-color LED ×2 + GPO (LED) LED driver ×3 Channel 1 LED current can be switched indecently in 5-bit units (0.5 to 16mA) Ring tone synchronization function (forced activation with SCTL: H) Gradation function Channel 1 LED current can be switched indecently in 5-bit units (0.5 to 16mA) Ring tone synchronization function (forced activation with SCTL: H) Gradation function Only RLED2 and GLED2 support strobe mode; LED current output (2.8mA to 44.8mA) (FCTL=high) GPO1 (LED3), GPO2 (LED4), GPO3 (LED5) when GPO1 to GPO3 are used as the LED driver • GPO output ×3 Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 72011 SY 20080410-S00003 No.A1969-1/24 LV5223GR Specifications Maximum Ratings at Ta = 25°C Parameter Maximum supply voltage Maximum voltage Maximum output current Symbol VCC max V1 max IO max 1 IO max 2 Allowable power dissipation Operating temperature Storage temperature Pd max Topr Tstg LED pins, charge pump pin RLED1, GLED1, BLED1 and BLED2 pins RLED2 and GLED2 pins * Mounted on a circuit board Conditions Ratings 5 6 40 50 800 -30 to +80 -40 to +125 Unit V V mA mA mW °C °C * Specified board: 40mm × 50mm × 0.8mm, glass epoxy board. (2S2P (4-layer board)) Operating Conditions at Ta = 25°C Parameter Supply voltage 1 Supply voltage 2 Symbol VBAT VDD Conditions Ratings 3.0 to 5.0 1.65 to VBAT Unit V V Electrical Characteristics at Ta = 25°C, VCC = 5.0V Parameter Consumption current Consumption current ICC1 ICC2 ICC3 Oscillator block Oscillator frequency Charge pump block Output voltage Maximum current Soft start time LED driver block Minimum output current value 1 Maximum output current value 1 Minimum output current value 2 Maximum output current value 2 ON resistance Non-linearity error Differential linearity error Maximum output current IMIN1 IMAX1 IMIN2 IMAX2 RON1 LE1 DLE1 ΔIL1 ΔIL2 Leakage current Control circuit block H level 1 L level 1 H level 2 L level 2 H level 3 VINH1 VINL1 VINH2 VINL2 VINH3 Input H level SCTL Input L level SCTL Input H level FCTL Input L level FCTL Input H level serial signal input pin 1.3 0 1.3 0 VDD × 0.8 0.45 0.45 V V V V V Continued on next page. IL1 3-color 1, 2 LED driver FCTL=L Serial data=#00 VO=0.5V 3-color 1, 2 LED driver FCTL=L Serial data=#FF VO=0.5V RLED2, GLED2 pin LED driver FCTL=H Serial data=#00 VO=0.5V RLED2, GLED2 pin LED driver FCTL=H Serial data=#FF VO=0.5V GPO1(LED3), GPO2(LED4), GPO3(LED5) pins When LED driver ON IL=-40mA 3-color 1, 2 LED driver VO=0.5V *2 3-color 1, 2 LED driver VO=0.5V *3 3-color LED driver 1, 2 FCTL=L Maximum current setting VO=0.35V RLED2, GLED2 pin LED driver FCTL=H Maximum current setting VO=0.45V 3-color LED driver 1, 2 & GPO(LED) × 3 LED driver: OFF VO=5V 1 μA -10 % -2 -2 -10 2 2 LSB LSB % 5 Ω 42.0 44.8 47.6 mA 1.8 2.8 3.8 mA 15 16 17 mA 0.2 0.5 1.0 mA VO1 IO1 TSS IO=30mA VBAT=3.3V, VO1>4.3V TSS=1/Fosc × 400 *1 4.8 200 800 5.0 5.2 V mA μs Fosc 500 kHz VBAT+VDD consumption current RESET:L (when reset) VBAT+VDD consumption current RESET:H in serial default VBAT+VDD consumption current charge pump: ON 0 0.5 4 5 5.0 μA μA mA Symbol Conditions Ratings min typ max Unit No.A1969-2/24 LV5223GR Continued from preceding page. Parameter L level 3 H level 4 L level 4 H level 5 L level 5 Symbol VINL3 VINH4 VINL4 VHO5 VLO5 Conditions Input L level serial signal input pin Input H level RESET Input L level RESET Output H level GPO1 GPO2 GPO3 IL=1mA When output mode is set to buffer Output L level GPO1 GPO2 GPO3 IL=-1mA When output mode is set to buffer 0 0.3 V Ratings min 0 1.5 0 VDD – 0.3 0.3 typ max VDD × 0.2 Unit V V V V *1. Soft start time: Interval from the time the charge pump is started until the time the charge pump output voltage reaches 5V. *2. Non-linearity error: The difference between the actual and ideal current values. *3. Differential linearity error: The difference between the actual and ideal increment when one low-order bi value is added. Note) The LED current can be charged by changing the value of RT. (Example: When RT = 10kΩ, VO>0.945V and RGB1&2 LED current is set to 14.5mA, the RGB1&2 current can be set to flow at 14.5mA × 27kΩ / 10 kΩ = 39.15mA) (When the value of RT has been reduced, adjust the oscillation frequency by increasing the value of CT.) Package Dimensions unit : mm (typ) 3357 TOP VIEW 3.5 SIDE VIEW BOTTOM VIEW (0.125) (C0.09) 3.5 0.4 28 21 (0.55) 0.19 SIDE VIEW 0.4 (0.035) 0.8 SANYO : VCT28(3.5X3.5) 1.0 Pd max -- Ta Specified board : 40.0 × 50.0 × 0.8mm3 4-layer glass epoxy(2S2P) Allowable power dissipation, Pd max -- W 0.8 0.6 0.4 0.36 0.2 0 --30 0 20 40 60 80 100 Ambient temperature, Ta -- C (0.09) No.A1969-3/24 LV5223GR Block Diagram & Pin arrangement drawing VBAT PVBAT PGND TEST 21 SCTL 470pF TC 22 FCTL OUT C1A C1B 20 19 18 17 16 15 14 VDD SCL SDA RT GPO3(LED5) GPO2(LED4) GPO1(LED3) Charge pump 23 24 25 26 27 OSC IREF 13 12 SGND 100pF CT Sirial I/F 11 10 9 SVBAT RESET RLED1 LED driver 28 1 LEDGND1 8 2 GLED1 3 BLED1 4 RLED2 5 LEDGND2 6 GLED2 7 BLED2 Pin Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Pin name LEDGND1 GLED1 BLED1 RLED2 LEDGND2 GLED2 BLED2 GPO1(LED3) GPO2(LED4) GPO3(LED5) RT SDA SCL VDD PGND C1B PVBAT C1A OUT TEST FCTL SCTL TC SGND CT SVBAT RESET RLED1 GND pin1 for LED driver GLED1 driver output pin BLED1 driver output pin RLED2 driver output pin GND pin2 for LED driver GLED2 driver output pin BLED2 driver output pin GPO1 output & LED3 driver output pin GPO2 output & LED4 driver output pin GPO3 output & LED5 driver output pin Standard current setting resistance connection pin Serial data signal input pin Serial clock signal input pin Power supply pin GND pin for Charge pump Flying capacitor connection pin B for charge pump Power supply for charge pump Flying capacitor connection pin A for charge pump Output pin for charge pump TEST pin Strobe mode pin 3-color1 & 3-color2 LED driver external synchronous signal input pin Charge pump phase amends pin GND pin for analog circuit Setting of frequency of oscillator capacity connection pin Supply voltage for analog circuit RESET signal input pin RLED1 driver output pin Description Protection Protection diode vs. VBAT diode vs. GND ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ No.A1969-4/24 ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ LV5223GR Pin Functions Pin No. 1 2 3 4 6 7 28 Pin Name LEDGND1 GLED1 BLED1 RLED2 GLED2 BLED2 RLED1 GND pin1 for LED driver LED driver pin for RGB1 and RGB2. Feedback is applied so that the current flowing to the output transistor becomes the set current level. When RT=27kΩ, the driver output current levels can be independently adjusted from approx. 0.5mA to 16mA in 0.5mA steps by serial setting. In the strobe mode, the current levels can be independently adjusted from 2.8mA to 44.8mA in 2.8mA steps for the RLED2 and GLED2 pins only. 5 8 9 10 LEDGND2 GPO1(LED3) GPO2(LED4) GPO3(LED5) GND pin2 for LED driver GPO output/LED driver shared pin. Output can be set to current sink by serial setting or VDD or GND voltage can be output. VDD Pin function Equivalent Circuit 11 RT Reference current setting resistor connection pin. The reference current is generated by connecting an external resistor to GND. The pin voltage is approximately 0.65V. By changing this current level, the oscillation frequency and LED driver current (3-color 1 and 3-color 2 only) can be changed. SVBAT 12 SDA Serial data signal input pin SVBAT VDD 13 SCL Serial clock signal input pin SVBAT VDD 14 VDD Power supply pin SVBAT 15 16 PGND C1B GND pin for Charge pump Charge pump flying capacitor connection pin B This pin is connected to the clock driver side of the charge pump. SVBAT Continued on next page. No.A1969-5/24 LV5223GR Continued from preceding page. Pin No. 17 18 Pin Name PVBAT C1A Pin function Power supply for charge pump Charge pump flying capacitor connection pin A This pin is connected to the charge transfer driver side of the charge pump. C1A PVBAT Equivalent Circuit 19 OUT Output pin for charge pump OUT 20 TEST Test pin. This must always be connected to GND. SVBAT 21 22 FCTL SCTL FCTL: Strobe mode pin. SCTL: 3-color 1 and 3-color 2 LED driver external sync signal input pin. When this pin is not going to be used, it must be connected to GND without fail. SVBAT 23 TC Charge pump phase compensation pin. Stable operation of the charge pump is provided by connecting a capacitor to this pin. SVBAT 24 25 SGND CT GND pin for analog circuit Oscillator frequency setting capacitor connection pin. The oscillation frequency can be changed by changing the capacitance of the capacitor. SVBAT 26 27 SVBAT RESET Supply voltage for analog circuit RESET signal input pin. Reset state at L. SVBAT No.A1969-6/24 LV5223GR Serial Bus Communication Specifications 1) I2C serial transfer timing conditions twH SCL th1 twL th2 tbuf SDA th1 ts2 ts1 ts3 START condition ton tof Resend start condition STOP condition Input waveform condition Standard mode Parameter SCL clock frequency Data setup time Symbol fsc1 ts1 ts2 ts3 Data hold time Pulse width Input waveform conditions Bus free time th1 th2 twL twH ton tof tbuf Conditions SCL clock frequency SCL setup time relative to the fall of SDA SDA setup time relative to the rise of SCL SCL setup time relative to the rise of SDA SCL hold time relative to the fall of SDA SDA hold time relative to the fall of SCL SCL pulse width for the L period SCL pulse width for the H period SCL and SDA (input) rise time SCL and SDA (input) fall time Time between STOP condition and START condition Min. 0 4.7 250 4.0 4.0 0 4.7 4.0 4.7 Typ. Max. 100 3.45 1000 300 Unit kHz μs ns μs μs μs μs μs ns ns μs High-speed mode Parameter SCL clock frequency Data setup time Symbol fsc1 ts1 ts2 ts3 Data hold time Pulse width Input waveform conditions Bus free time th1 th2 twL twH ton tof tbuf Conditions SCL clock frequency SCL setup time relative to the fall of SDA SDA setup time relative to the rise of SCL SCL setup time relative to the rise of SDA SCL hold time relative to the fall of SDA SDA hold time relative to the fall of SCL SCL pulse width for the L period SCL pulse width for the H period SCL and SDA (input) rise time SCL and SDA (input) fall time Time between STOP and START conditions Min. 0 0.6 100 0.6 0.6 0 1.3 0.6 1.3 Typ. Max. 400 0.9 300 300 Unit kHz μs ns μs μs μs μs μs ns ns μs No.A1969-7/24 LV5223GR 2) I2C bus transfer method Start and stop conditions During data transfer operation using the I2C bus, SDA must basically be kept in constant state while SCL is “H” as shown below. SCL SDA ts2 th2 When data is not being transferred, both SCL and SDA are set in the “H” state. When SCL=SDA is “H,” the start condition is established when SDA is changed from “H” to “L,” and access is started. When SCL is “H,” the stop condition is established when SDA is changed from “L” to “H,” and access is ended. START condition STOP condition SCL SDA th1 ts3 Data transfer and acknowledgement response After the start condition has been established, the data is transferred one byte (8 bits) at a time. Any number of bytes of data can be transferred continuously. Each time the 8-bit data is transferred, the ACK signal is sent from the receive side to the send side. The ACK signal is issued when SDA on the send side is released and SDA on the receive side is set to “L” immediately after fall of the clock pulse at the SCL eighth bit of data transfer to “L.” When the next 1-byte transfer is left in the receive state after sending the ACK signal from the receive side, the receive side releases SDA at the fall of the SCL ninth clock. In the I2C bus, there is no CE signal. In its place, a 7-bit slave address is assigned to each device, and the first byte of transfer is assigned to the command (R/W) representing the 7-bit address and subsequent transfer direction. Note that only write is valid in this IC. The 7-bit address is transferred sequentially starting with MSB, and the eighth bit is set to “L” which indicates a write. In the LV5223GP the slave address is specified as "1110101" Start M S B Slave address L S B W A C K M S B Resistor address L S B A C K M S B Data L S B A C K Stop SCL SDA No.A1969-8/24 LV5223GR Serial mode setting ADDRESS : 00h D7 resister name default B2SW 0 D6 G2SW 0 D5 R2SW 0 D4 B1SW 0 D3 G1SW 0 D2 R1SW 0 D1 CPSW 0 D0 STBY 0 D0 0 1 STBY Standby Active STBY setting *Default LED operation enabled by releasing STBY (LED can be operated by another power supply D1 0 1 CPSW OFF ON Charge pump ON/OFF setting *Default D2 0 1 R1SW OFF ON RLED1 output setting *Default D3 0 1 G1SW OFF ON GLED1 output setting *Default D4 0 1 B1SW OFF ON BLED1 output setting *Default D5 0 1 R2SW OFF ON RLED2 output setting *Default D6 0 1 G2SW OFF ON GLED2 output setting *Default D7 0 1 B2SW OFF ON BLED2 output setting *Default No.A1969-9/24 LV5223GR ADDRESS : 01h D7 resister name default SCTEN1 0 D6 0 D5 0 D4 R1[4] 0 D3 R1[3] 0 D2 R1[2] 0 D1 R1[1] 0 D0 R1[0] 0 D4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 current value (mA) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 RLED1 current value setting *Default D7 0 1 SCTEN1 RGB1 SCTL valid RGB1 SCTL non valid RGB1 SCTL signal enable *Default No.A1969-10/24 LV5223GR ADDRESS : 02h D7 resister name default 0 D6 0 D5 0 D4 G1[4] 0 D3 G1[3] 0 D2 G1[2] 0 D1 G1[1] 0 D0 G1[0] 0 D4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 current value (mA) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 GLED1 current value setting *Default No.A1969-11/24 LV5223GR ADDRESS : 03h D7 resister name default 0 D6 0 D5 0 D4 B1[4] 0 D3 B1[3] 0 D2 B1[2] 0 D1 B1[1] 0 D0 B1[0] 0 D4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 current value (mA) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 BLED1 current value setting *Default No.A1969-12/24 LV5223GR ADDRESS : 04h D7 resister name default SCTEN2 0 D6 0 D5 0 D4 R2[4] 0 D3 R2[3] 0 D2 R2[2] 0 D1 R2[1] 0 D0 R2[0] 0 D4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 current value (mA) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 RLED2 current value setting *Default D7 0 1 SCTEN2 RGB2 SCTL valid RGB2 SCTL non valid RGB2 SCTL signal enable *Default No.A1969-13/24 LV5223GR ADDRESS : 05h D7 resister name default 0 D6 0 D5 0 D4 G2[4] 0 D3 G2[3] 0 D2 G2[2] 0 D1 G2[1] 0 D0 G2[0] 0 D4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 current value (mA) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 GLED2 current value setting *Default No.A1969-14/24 LV5223GR ADDRESS : 06h D7 resister name default 0 D6 0 D5 0 D4 B2[4] 0 D3 B2[3] 0 D2 B2[2] 0 D1 B2[1] 0 D0 B2[0] 0 D4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 current value (mA) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 BLED2 current value setting *Default No.A1969-15/24 LV5223GR ADDRESS : 07h D7 resister name default 0 D6 0 D5 FOUT1[2] 0 D4 FOUT1[1] 0 D3 FOUT1[0] 0 D2 FIN1[2] 0 D1 FIN1[1] 0 D0 FIN1[0] 0 D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 FIN1 No slope Slope 1/32 1/16 1/8 1/4 1/2 3/4 Max slope RGB1 FIN slope setting *Default Max. slope is 1/2 of automatic ON/OFF period of RGB1 D5 0 0 0 0 1 1 1 1 D4 0 0 1 1 0 0 1 1 D3 0 1 0 1 0 1 0 1 FOUT1 No slope Slope 1/32 1/16 1/8 1/4 1/2 3/4 Max slope RGB1 FOUT slope setting *Default Max. slope is 1/2 of automatic ON/OFF period of RGB1 ADDRESS : 08h D7 resister name default 0 D6 0 D5 FOUT2[2] 0 D4 FOUT2[1] 0 D3 FOUT2[0] 0 D2 FIN2[2] 0 D1 FIN2[1] 0 D0 FIN2[0] 0 D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 FIN2 No slope Slope 1/32 1/16 1/8 1/4 1/2 3/4 Max slope RGB2 FIN slope setting *Default Max. slope is 1/2 of automatic ON/OFF period of RGB2 D5 0 0 0 0 1 1 1 1 D4 0 0 1 1 0 0 1 1 D3 0 1 0 1 0 1 0 1 FOUT2 No slope Slope 1/32 1/16 1/8 1/4 1/2 3/4 Max slope RGB2 FOUT slope setting *Default Max. slope is 1/2 of automatic ON/OFF period of RGB2 No.A1969-16/24 LV5223GR ADDRESS : 09h D7 resister name default 0 D6 0 D5 SYNC 0 D4 GR1M1 0 D3 GRON1 0 D2 AT1[2] 0 D1 AT1[1] 0 D0 AT1[0] 0 D2 0 0 0 0 1 1 1 D1 0 0 1 1 0 0 1 D0 0 1 0 1 0 1 × AT1 0.262sec 0.524sec 1.049sec 2.097sec 4.194sec 8.389sec - RGB1 automatic ON/OFF function setting *Default D3 0 1 GRON1 OFF ON RGB1 automatic ON/OFF function setting *Default D4 0 1 GR1M1 OFF ON RGB1 is executed one time of the gradation. *Default D5 0 1 SYNC OFF ON Automatic operation ON/OFF cycle and the gradation. execution setting of RGB2 are done as well as RGB1 *Default ADDRESS : 0ah D7 resister name default 0 D6 0 D5 0 D4 GR1M2 0 D3 GRON2 0 D2 AT2[2] 0 D1 AT2[1] 0 D0 AT2[0] 0 D2 0 0 0 0 1 1 1 D1 0 0 1 1 0 0 1 D0 0 1 0 1 0 1 × AT2 0.262sec 0.524sec 1.049sec 2.097sec 4.194sec 8.389sec - RGB2 automatic ON/OFF function setting *Default D3 0 1 GRON1 OFF ON RGB2 automatic ON/OFF function setting *Default D4 0 1 GR1M1 OFF ON RGB2 is executed one time of the gradation. *Default No.A1969-17/24 LV5223GR ADDRESS : 0bh D7 resister name default 0 D6 0 D5 R1Aoff[5] 0 D4 R1Aoff[4] 0 D3 R1Aoff[3] 0 D2 R1Aoff[2] 0 D1 R1Aoff[1] 0 D0 R1Aoff[0] 0 D5-0 RLED1 automatic OFF position setting (default: ALL0) ADDRESS : 0ch D7 resister name default 0 D6 0 D5 R1Aon[5] 0 D4 R1Aon[4] 0 D3 R1Aon[3] 0 D2 R1Aon[2] 0 D1 R1Aon[1] 0 D0 R1Aon[0] 0 D5-0 RLED1 automatic OFF position setting (default: ALL0) When R1Aon=R1Aoff, all the periods off. LED control output waveform (RLED1). Same for GLED1, BLED1, GLED2, GLED2 and BLED2 When D5 to D0 ALL0: Clock 0 rise position. When D5 to D0 ALL1: Clock 63 rise position. R1on R1Aon[5:0]=000000(00h) For R1off R1Aoff[5:0]=000101(05h) 64 counts CLK for gradation 0 1 2 5 counts 3 4 5 59 counts 63 0 RLED1 ON period R1on R1off OFF period ADDRESS : 0dh D7 resister name default 0 D6 0 D5 G1Aoff[5] 0 D4 G1Aoff[4] 0 D3 G1Aoff[3] 0 D2 G1Aoff[2] 0 D1 G1Aoff[1] 0 D0 G1Aoff[0] 0 D5-0 GLED1 automatic OFF position setting (default: ALL0) ADDRESS : 0eh D7 resister name default 0 D6 0 D5 G1Aon[5] 0 D4 G1Aon[4] 0 D3 G1Aon[3] 0 D2 G1Aon[2] 0 D1 G1Aon[1] 0 D0 G1Aon[0] 0 D5-0 GLED1 automatic OFF position setting (default: ALL0) When G1Aon=G1Aoff, all the periods off. No.A1969-18/24 LV5223GR ADDRESS : 0fh D7 resister name default 0 D6 0 D5 B1Aoff[5] 0 D4 B1Aoff[4] 0 D3 B1Aoff[3] 0 D2 B1Aoff[2] 0 D1 B1Aoff[1] 0 D0 B1Aoff[0] 0 D5-0 BLED1 automatic OFF position setting (default: ALL0) ADDRESS : 10h D7 resister name default 0 D6 0 D5 B1Aon[5] 0 D4 B1Aon[4] 0 D3 B1Aon[3] 0 D2 B1Aon[2] 0 D1 B1Aon[1] 0 D0 B1Aon[0] 0 D5-0 BLED1 automatic OFF position setting (default: ALL0) When B1Aon=B1Aoff, all the periods off. ADDRESS : 11h D7 resister name default 0 D6 0 D5 R2Aoff[5] 0 D4 R2Aoff[4] 0 D3 R2Aoff[3] 0 D2 R2Aoff[2] 0 D1 R2Aoff[1] 0 D0 R2Aoff[0] 0 D5-0 RLED2 automatic OFF position setting (default: ALL0) ADDRESS : 12h D7 resister name default 0 D6 0 D5 R2Aon[5] 0 D4 R2Aon[4] 0 D3 R2Aon[3] 0 D2 R2Aon[2] 0 D1 R2Aon[1] 0 D0 R2Aon[0] 0 D5-0 RLED2 automatic OFF position setting (default: ALL0) When R2Aon=R2Aoff, all the periods off. ADDRESS : 13h D7 resister name default 0 D6 0 D5 G2Aoff[5] 0 D4 G2Aoff[4] 0 D3 G2Aoff[3] 0 D2 G2Aoff[2] 0 D1 G2Aoff[1] 0 D0 G2Aoff[0] 0 D5-0 GLED2 automatic OFF position setting (default: ALL0) ADDRESS : 14h D7 resister name default 0 D6 0 D5 G2Aon[5] 0 D4 G2Aon[4] 0 D3 G2Aon[3] 0 D2 G2Aon[2] 0 D1 G2Aon[1] 0 D0 G2Aon[0] 0 D5-0 GLED2 automatic OFF position setting (default: ALL0) When G2Aon=G2Aoff, all the periods off. No.A1969-19/24 LV5223GR ADDRESS : 15h D7 resister name default 0 D6 0 D5 B2Aoff[5] 0 D4 B2Aoff[4] 0 D3 B2Aoff[3] 0 D2 B2Aoff[2] 0 D1 B2Aoff[1] 0 D0 B2Aoff[0] 0 D5-0 BLED2 automatic OFF position setting (default: ALL0) ADDRESS : 16h D7 resister name default 0 D6 0 D5 B2Aon[5] 0 D4 B2Aon[4] 0 D3 B2Aon[3] 0 D2 B2Aon[2] 0 D1 B2Aon[1] 0 D0 B2Aon[0] 0 D5-0 BLED2 automatic OFF position setting (default: ALL0) When B2Aon=B2Aoff, all the periods off. ADDRESS : 17h D7 resister name default GTO3EN 0 D6 GPO2EN 0 D5 GPO1EN 0 D4 0 D3 0 D2 GPO3 0 D1 GPO2 0 D0 GPO1 0 D0 0 1 GPO1 GPO1 (LED3) output: Open when GPO1EN=0, low when GPO1EN=1 GPO1 (LED3) output: LED-Drv ON when GPO1EN=0, high when GPO1EN=1 GPO1(LED3) output setting *Default D1 0 1 GPO2 GPO2 (LED4) output: Open when GPO2EN=0, low when GPO2EN=1 GPO2 (LED4) output: LED-Drv ON when GPO2EN=0, high when GPO2EN=1 GPO2(LED4) output setting *Default D2 0 1 GPO3 GPO3 (LED5) output: Open when GPO3EN=0, low when GPO3EN=1 GPO3 (LED5) output: LED-Drv ON when GPO3EN=0, high when GPO3EN=1 GPO3(LED5) output setting *Default D5 0 1 GPO1EN When GPO1 (LED3) output is used as LED-Drv When GPO1 (LED3) output is used as GPO GPO1(LED3) output Setting for using GPO or LED-Drv *Default D6 0 1 GPO2EN When GPO2 (LED4) output is used as LED-Drv When GPO2 (LED4) output is used as GPO GPO2(LED4) output Setting for using GPO or LED-Drv *Default D7 0 1 GPO3EN When GPO3 (LED5) output is used as LED-Drv When GPO3 (LED5) output is used as GPO GPO3(LED5) output Setting for using GPO or LED-Drv *Default *GPO1EN must be set to 1 without fail when the GPO1 (LED3) pin is to be used as GPO. When GPO1EN is set to 1, do not apply a voltage higher than the VDD voltage to the GPO1 (LED3) pin. The same applies to the GPO2 (LED4) and GPO3 (LED5) pins. No.A1969-20/24 LV5223GR ADDRESS : 18h D7 resister name default D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D7 0 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 FCTENR2 0 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 FCTENR2 FCTL non valid FCTL valid D6 0 D5 0 Current value(mA) 2.8 5.6 8.4 11.2 14.0 16.8 19.6 22.4 25.2 28.0 30.8 33.6 36.4 39.2 42.0 44.8 RLED2 FCTL signal enable *Default D4 0 D3 FCTR2[3] 0 D2 FCTR2[2] 0 D1 FCTR2[1] 0 D0 FCTR2[0] 0 Strobe mode: RLED2 current level established when FCTL is high. *Default ADDRESS : 19h D7 resister name default D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D7 0 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 FCTENG2 0 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 FCTENG2 FCTL non valid FCTL valid D6 0 D5 0 Current value(mA) 2.8 5.6 8.4 11.2 14.0 16.8 19.6 22.4 25.2 28.0 30.8 33.6 36.4 39.2 42.0 44.8 GLED2 FCTL signal enable *Default D4 0 D3 FCTG2[3] 0 D2 FCTG2[2] 0 D1 FCTG2[1] 0 D0 FCTG2[0] 0 Strobe mode: GLED2 current level established when FCTL is high. *Default No.A1969-21/24 LV5223GR Precautions for serial transmission and usage note * ON operation of the charge pump must be performed when the LED is off. * Do not turn ON the LED for 800µs typ. (soft start time) after the charge pump has been turned on. * When the fade operation of LED is performed, turn off the charge pump after the fade-out has been completed. * Gradation level must be selected without fail when gradation is OFF. * When the charge pump is operating, use the LED driver in such a way that the total current flowing to the LEDs. * Even in the strobe mode (FCTL=H), the gradation operation is performed for RLED2 and GLED2 when RLED2 and GLED2 are set to gradation ON. * Even in the strobe mode (FCTL=H), current flows to RLED2 and GLED2 in synchronization with the SCTL signal when SCTL is valid. * When the LED pins are not to be used When LEDs are not connected to the LED pins, connect the LED driver pins to VBAT or GND. * Precaution when using the SCTL pin or FCTL pin When the SCTL pin or FCTL pin is set to high, current flows to the SCTL or FCTL input circuit. (This is also true in the STBY or reset mode.) When the pin is not going to be used, it must be set to low without fail. * By default, the GP01 (LED3) pin is left open. When the GP01 (LED3) pin is to be set high by default, connect a pull-up resistor to the pin. Conversely, when the GP01 (LED3) pin is to be set low by default, connect a pull-down resistor to the pin. Connect pull-up or pull-down resistors to the GP02 (LED4) and GP03 (LED5) pins as well in the same way. No.A1969-22/24 LV5223GR LV5223GR serial map • Table upper row: Register name Register address A7 00h 01h 02h 03h 04h 05h 06h 07h 08h 09h 0ah 0bh 0ch 0dh 0eh 0fh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 A3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 A2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 A1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 A0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D7 B2SW 0 SCTEN1 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 GPO3EN 0 FCTENR2 0 FCTENG2 0 D6 G2SW 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 × 0 GPO2EN 0 × 0 × 0 0 GPO1EN 0 × 0 × 0 0 × 0 × 0 × 0 Data 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SYNC 0 × 0 0 D5 R2SW 0 × 0 × 0 × 0 × 0 × 0 × 0 0 FOUT1[2:0] 0 FOUT2[2:0] 0 GR1M1 0 GR1M2 0 0 GRON1 0 GRON2 0 R1Aoff[5:0] 0 R1Aon[5:0] 0 G1Aoff[5:0] 0 G1Aon[5:0] 0 B1Aoff[5:0] 0 B1Aon[5:0] 0 R2Aoff[5:0] 0 R2Aon[5:0] 0 G2Aoff[5:0] 0 G2Aon[5:0] 0 B2Aoff[5:0] 0 B2Aon[5:0] 0 × 0 0 GPO3 0 0 0 GPO2 0 0 0 GPO1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Table the lower: Default value data D4 B1SW 0 D3 G1SW 0 D2 R1SW 0 R1[4:0] 0 G1[4:0] 0 B1[4:0] 0 R2[4:0] 0 G2[4:0] 0 B2[4:0] 0 0 FIN1[2:0] 0 FIN2[2:0] 0 AT1[2:0] 0 AT2[2:0] 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D1 CPSW 0 D0 STBY 0 FCTR2[3:0] Register address No.A1969-23/24 LV5223GR SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. 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SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of July, 2011. Specifications and information herein are subject to change without notice. PS No.A1969-24/24