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LV5655VB

LV5655VB

  • 厂商:

    SANYO(三洋)

  • 封装:

  • 描述:

    LV5655VB - 3-channel Switching Regulator Controller - Sanyo Semicon Device

  • 数据手册
  • 价格&库存
LV5655VB 数据手册
Ordering number : ENA1362 LV5655VB Overview Bi-CMOS LSI 3-channel Switching Regulator Controller The LV5655VB is a 3-channel switching regulator controller. Features • Low-voltage (3V) operation • Reference voltage precision : ±1% • Standby circuit (CTL : Controls operation of all channels) • Synchronous rectification: channel 1 and channel 2 (selected by SYN voltage) • Independent soft start function for each channel Specifications Maximum Ratings at Ta = 25°C Parameter Maximum supply voltage Allowable power dissipation Operating temperature Storage temperature Symbol VCC max Pd max Topr Tstg Mounted on a specified board* Conditions Ratings -0.3 to 16 0.72 -30 to +85 -55 to +125 Unit V W °C °C * Specified board: 114.3mm × 76.1mm × 1.6mm, glass epoxy board. Recommended Operating Conditions at Ta = 25°C Parameter Supply voltage Supply voltage Oscillation frequency Symbol VCC VBIAS fOSC Conditions Ratings 3 to 15 3 to 15 0.2 to 1.3 Unit V V MHz Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 40809 MS PC 20090327-S00001 No.A1362-1/9 LV5655VB Electrical Characteristics at Ta = 25°C, VCC = VBIAS = 3.6V, SCP = 0V Parameter Error amplifier 1 IN+ pin internal bias voltage Output low voltage Output high voltage Protection circuit Threshold voltage SCP pin current Software start block Soft start current Soft start resistance Fixed duty Maximum on duty 1 Maximum on duty 2 Maximum on duty 3 Output block OUT pin high side on resistance OUT pin low side on resistance Triangle wave oscillator block Current setting pin voltage Oscillation frequency Reference voltage block Reference voltage Line regulation SYN circuit On state voltage OFF state voltage Pin input current Control circuit On state voltage OFF state voltage Pin input current All circuits VCC current consumption Standby mode current consumption ICC IOFF IN1- to IN3- = 1V CTL = 0V, IOFF = ICC + IBIAS 4.5 6 1 mA µA VON CTL VOFF CTL IIN STBY CTL = 2V 2.0 0.6 60 V V µA VON SYN VOFF SYN IIN SYN SYN* = 2V 2.0 0.6 60 V V µA VREF VLN REF VCC = 3V to 15V 1.240 10 V mV VT RT fOSC RT = 20kΩ RT = 20kΩ 460 0.56 600 730 V kHz ROUT SOUR ROUT SINK IO = -10mA IO = 10mA 28 18 50 35 Ω Ω ch1 ch2 ch3 Duty MAX 1 Duty MAX 2 Duty MAX 3 IN- = 0V IN- = 0V IN- = 0V 100 100 80 85 90 % % % ch1 to ch3 ch1 to ch3 ISF RSF CSOFT* = 0V 3.2 160 4 200 4.8 240 µA kΩ VSCP ISCP 1.1 1.25 4 1.4 V µA ch1 to ch3 ch1 to ch3 VB VLow FB VHi FB Value added to the error amplifier offset at the error amplifier + side voltage IN- = 2.0V, IFB = 20µA IN- = 0V, IFB1 = -20µA 2.0 0.504 0.51 0.516 0.2 V V V Symbol Conditions min Ratings typ max Unit No.A1362-2/9 LV5655VB Package Dimensions unit : mm (typ) 3287 1.0 Pd max -- Ta Specified board: 114.3×76.1×1.6mm3 glass epoxy board. 6.5 24 13 Allowable power dissipation, Pd max --W 0.8 0.72 0.6 4.4 6.4 0.5 0.4 0.29 0.2 1 0.5 (0.5) 0.22 12 0.15 1.5max 0 -30 -20 0 20 40 60 80 85 100 SANYO : SSOP24(225mil) Pin Assignment RT 1 VREF 2 CSOFT4 3 CSOFT2 4 CSOFT3 5 SCP 6 VCC 7 SYN2 8 SYN1 9 GND_P (VS) 10 OUT1N 11 OUT1 12 24 IN123 FB1 22 IN221 FB2 20 IN319 FB3 18 GND_S 17 CLT (STBY) 16 VBIAS 15 OUT3 14 OUT2N 13 OUT2 0.1 (1.3) Ambient temperature, Ta -- °C LV5655VB Top view No.A1362-3/9 LV5655VB Block Diagram and Sample Application Circuit VREF SCP VREF SCP VCC VBAT FB1 IN1FB1 VBIAS + + - + OUT1 FB1 Step-down (DOWN) OUT1N CSOFT1 SYN1 SYN1 L: Synchronous rectification H: Diode rectification FB2 IN2FB2 + + - + OUT2 FB2 Step-down (DOWN) OUT2N CSOFT2 SYN2 FB3 IN3FB3 CSOFT3 SYN2 L: Synchronous rectification H: Diode rectification + + - + - OUT3 FB3 Step-down (DOWN) GND_P(VS) GND_S Output ON/OFF CLK(STBY) OSC (Oscillation circuit) RT No.A1362-4/9 LV5655VB Pin Function Block ch1 (Step-down) Pin No. 24 23 3 12 11 9 ch2 (Step-down) 22 21 4 13 14 8 ch3 (Step-down) 20 19 5 15 POWER 7 16 18 10 CONTROL 2 17 6 OSC 1 Pin Name IN1FB1 CSOFT1 OUT1 OUT1N SYN1 IN2FB2 CSOFT2 OUT2 OUT2N SYN2 IN3FB3 CSOFT3 OUT3 VCC VBIAS GND_S GND_P (VS) VREF CTL (STBY) SCP RT Error amplifier, - (Inverting) input. Error amplifier output. Soft start setting capacitor connection. Connect to GND through a capacitor. Output. External transistor P-channel gate connect. Output. External transistor N-channel gate connection. Synchronous rectification/diode rectification switching, L : synchronous rectification H : diode rectification. Error amplifier, - (Inverting) input. Error amplifier output. Soft start setting capacitor connection. Connect to GND through a capacitor. Output. External transistor P-channel gate connect. Output. External transistor N-channel gate connection. Synchronous rectification/diode rectification switching, L : synchronous rectification H : diode rectification. Error amplifier, - (Inverting) input. Error amplifier output. Soft start setting capacitor connection. Connect to GND through a capacitor. Output. External transistor P-channel gate connect. Power supply input (signal system). Power supply input (pre-output stage). Ground (signal system). Ground (pre-output stage). Reference voltage output. Connect to GND through a capacitor. Output control, H : all outputs ON, L : all outputs off. Connection pin for the delay time setting capacitor of short-circuit detection circuit (connect to GND). Oscillation frequency setting resistor connection (connect to GND). Functions No.A1362-5/9 LV5655VB Equivalent Circuits Pin No. 17 Pin Name CTL Description CTL: Controls operation of all circuits. Controls operation of all channels. High : ON Low : OFF Equivalent Circuit CTL 120kΩ 30kΩ GND_S 24 22 20 IN1IN2IN3Error amplifier inverting input. The regulator output is divided by a resistor and connected to IN*- VREG (Internal constant voltage) IN*500Ω 5kΩ 5kΩ GND_S 23 21 19 FB1 FB2 FB3 Error amplifier output. These pins, in combination with IN*-, configure the error amplifier filters VREG (Internal constant voltage) 20Ω FB* 500Ω GND_S 3 4 5 CSOFT1 CSOFT2 CSOFT3 Soft start. Connect to GND via a capacitor to set the soft start time. VREG (Internal constant voltage) 500Ω 10kΩ 200kΩ GND_S CSOFT* 12 13 15 OUT1 OUT2 OUT3 Output. Connect external PchFET. VBIAS OUT* GND_P (VS) 11 14 OUT1N OUT2N Output. Connect external NchFET. VBIAS OUT*N GND_P (VS) Continued on next page. No.A1362-6/9 LV5655VB Continued from preceding page. Pin No. 1 Pin Name RT Description Sets the oscillation frequency. Connect to GND through a resistor. Constant voltage output (0.56V typ.) Equivalent Circuit VREG (Internal constant voltage) 500Ω RT 500Ω GND_S 6 SCP Connect to GND via a capacitor to set the short circuit detection circuit delay time. VREG (Internal constant voltage) 1.5kΩ SCP 13kΩ GND_S 9 8 SYN1 SYN2 Channel 1 and channel 2 synchronous/diode rectification switching. Low : Synchronous rectification High : Diode rectification Switching operates independently for the corresponding channel. VREG (Internal constant voltage) 120kΩ SYN* L : Synchronous rectification H : Diode rectification GND_S 30kΩ 23 VREF Internal constant voltage circuit output. Connect a stabilizing capacitor. VREG (Internal constant voltage) VREF 14.8kΩ GND_S 7 VCC VBIAS GND_S GND_P (VS1) Signal system power supply VCC 16 18 10 Power system power supply (Output stage) Signal system GND Output stage GND (pre-stage) VBIAS GND_S GND_P (VS) No.A1362-7/9 LV5655VB Notes (1) Soft start time setting method The soft start time is set with the capacitor connected between CSOFT* and GND_S. This IC has an independent soft start function for each channel, so a capacitor must be connected for each CSOFT to set the soft start time. (Description of soft start operation) CSOFT* [V] CSOFT* voltage VB (=0.515 [V] (TYP)) (Outline of soft start pin) VREG (Internal constant voltage) 4µA (ISF) CSOFT* T [s] Soft start time (Tsoft [s]) CSOFT pin charging starts The output voltage reaches the set voltage (Output voltage constant) VB (0.515[V]) VB TSOFT = CSOFT × RSFIn ( ) RSF × ISF = 0.206 × 106 × CSOFT [s] 200kΩ (RSF) GND_S (2) Setting the oscillation frequency The oscillation frequency is set by the resistor (RT resistor) connected to the RT pin. The RT pin is a constant voltage (0.56 [V] typ.) output, and the oscillation frequency is determined by the current run through the RT resistor and charging/discharging of the internal capacitor. fOSC [kHz] = 12 × 1E3 RT [kΩ] (Reference calculation formula) The internal oscillation frequency deviates from the calculated value due to overshoot, undershoot and other factors, so the frequency should be confirmed in an actual set. (3) SCP (short circuit protection) function • Description of operation When any one of FB1 to FB4 goes High due to the load being shorted or other reason, charging to the SCP pin starts. If output does not recover during the set time Tscp and SCP pin voltage exceeds the threshold voltage, the protective circuit (SCP) operates and all channel outputs are turned OFF. All outputs are latched off by the protection circuit (SCP). This latched state (output OFF) is canceled by setting the CTL pin Low or by turning the power supply OFF. When not using the protection function (SCP), the SCP pin must be shorted to GND_S with a line that is as short as possible. The SCP operation time is set by the capacitor connected to the SCP pin. (SCP charging operation) SCP [V] Charging with Iscp = 4 [µA] 1.25 [V] (TYP) SCP T [s] SCP operation CTL Capacitor charging starts with the load being shorted Threshold voltage 1.25V (TYP) (SCP function) tscp Output short circuit Each output Output ON (Operating condition) Output OFF Time No.A1362-8/9 LV5655VB SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of April, 2009. Specifications and information herein are subject to change without notice. PS No.A1362-9/9
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