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LV5761V

LV5761V

  • 厂商:

    SANYO(三洋)

  • 封装:

  • 描述:

    LV5761V - 1-channel Step-down Switching Regulator - Sanyo Semicon Device

  • 数据手册
  • 价格&库存
LV5761V 数据手册
Ordering number : ENA1443A Bi-CMOS LSI LV5761V Overview 1-channel Step-down Switching Regulator The LV5761V is a 1-channel step-down switching regulator. Functions • 1 channel step-down switching regulator controller. • Frequency decrease function at pendent. • Load-independent soft start circuit. • ON/OFF function. • Built-in pulse-by-pulse OCP circuit. It is detected by using ON resistance of an external MOS. • Synchronous rectification. • Current mode control. • Synchronous drive by external signal. Specifications Parameter supply voltage Absolute Maximum Ratings at Ta = 25°C Symbol VIN max Pd max Topr Tstg Mounted on a specified board. * Conditions Ratings 45 0.74 -40 to +85 -55 to +150 Unit V W °C °C Allowable Power dissipation Operating temperature Storage temperature * Specified board: 114.3mm × 76.1mm × 1.6mm, glass epoxy board Recommended Operating Range at Ta = 25°C Parameter Supply voltage range Error amplifier input voltage VIN Symbol Conditions Ratings 8.5 to 42 0 to 1.6 Unit V V Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, AV equipment, communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee thereof. If you should intend to use our products for applications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely responsible for the use. Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer' s products or equipment. 90909 SY / 41509 MS 20090401-S00011 No.A1443-1/6 LV5761V Electrical Characteristics at Ta = 25°C, VIN = 12V Parameter Reference voltage block Internal reference voltage 5V power supply Vref VDD Including offset of E/A IOUT = 0 to 5mA RT = 220kΩ VIN = 8 to 42V FB voltage detection after SS ends 0.654 4.7 0.67 5.2 0.686 5.7 V V Symbol Conditions min Ratings typ max Unit Triangular waveform oscillator block Oscillation frequency Frequency variation Oscillation frequency fold back detection voltage Oscillatory frequency after fold back ON/OFF circuit block IC start-up voltage IC off voltage Soft start circuit block Soft start source current Soft start sink current UVLO circuit block UVLO lock release voltage UVLO hysteresis OCP circuit block OCP charge current Error amplifier Input bias current Error amplifier transconductance Sink output current Source output current Current detection amplifier gain over current limiter circuit block Reference current 1 Reference current 2 Over current detection comparator offset voltage Over current detection comparator common mode input range PWM comparator Input threshold voltage (fosc = 125kHz) Maximum ON duty Output block Output stage ON resistance (the upper side) Output stage ON resistance (the under side) Output stage ON current (the upper side) Output stage ON current (the under side) The whole device Standby current Mean consumption current ICCS ICCA EN < 1V EN > 3V 3 10 μA mA IONL 240 mA IONH 240 mA RONL 5 Ω RONH 5 Ω Vt max Vt0 DMAX Duty cycle = DMAX Duty cycle = 0% 0.9 0.4 80 1.0 0.5 85 1.1 0.6 90 V V % VIN-0.45 VIN V ILIM1 ILIM2 VLIM OFS MODE = L (GND) MODE = H (VIN) -10% -10% -5 18.5 37.0 +10% +10% +5 μA μA mA IEA IN GEA IEA OSK IEA OSC GISNS FB = 1.0V FB = 0V 1000 1400 -100 100 1.5 100 1800 nA μA/V μA μA IOCP 5 μA VUVLO VUVLO H 7.5 8.0 0.7 8.5 V V ISS SC ISS SK EN > 3.5V EN < 1V, VDD = 5V 4 5 2 6 μA mA VEN on VEN off 2.5 1.0 3.0 1.2 3.5 1.4 V V FOSC FB 1/3FOSC kHz FOSC FOSC DV VOSC FB 110 125 1 0.1 140 kHz % V No.A1443-2/6 LV5761V Package Dimensions unit : mm (typ) 3178B 1.0 Pd max -- Ta Specified board: 114.3×76.1×1.6mm3 glass epoxy board. 5.2 16 9 Allowable power dissipation, Pd amx -- W 0.8 0.74 0.6 4.4 6.4 1 0.65 (0.33) 8 0.15 0.22 1.5max 0.5 0.4 0.38 0.2 0 -40 -20 0 20 40 60 8085 100 Ambient temperature, Ta -- °C SANYO : SSOP16(225mil) Pin Assignment FB 1 COMP 2 EN 3 RT 4 SYNC 5 SW 6 CBOOT 7 HDRV 8 Top view 16 SS 15 ILIM 14 VIN 0.1 (1.3) LV5761V 13 OCP 12 MODE 11 GND 10 VDD 9 LDRV No.A1443-3/6 LV5761V Block Diagram VIN 14 MODE 12 5μA 5V REGULATOR REFERENCE VOLTAGE OSP LOGIC UVLO OCP 13 1.25V + OCP Comp1 ILIM 15 MODE L 20μA MODE H 40μA OCP Comp2 VCC 5μA SD 1.1V + - SD SS 16 FB 1 COMP 2 0.67V + + - fosc forced 1/3 PWM Comp + 0.1V FFOLD Comp 45 RT SYNC Pin Function Pin No. 14 11 10 7 Pin name VIN GND VDD CBOOT Description Power supply pin. This pin is monitored by UVLO function. When the voltage of this pin becomes 8V or more by UVLO function, The IC starts and the soft start function operates. Ground pin. Each reference voltage is based on the voltage of the ground pin. Power supply pin for an external the lower MOS-FET gate drive. Bootstrap capacity connection pin. This pin becomes a GATE drive power supply of an external NchMOSFET. Connect a bypath capacitor between CBOOT and SW. 6 5 9 8 1 SW SYNC LDRV HDRV FB Pin to connect with switching node. The source of NchMOSFET connects to this pin. External synchronous signal input pin. An external the lower MOSFET gate drive pin. An external the upper MOSFET gate drive pin. Error amplifier reverse input pin. By operating the converter, the voltage of this pin becomes 0.67V. The voltage in which the output voltage is divided by an external resistance is applied to this pin. Moreover, when this pin voltage becomes 0.1V or less after a soft start ends, the oscillatory frequency becomes 1/3. 2 16 COMP SS Error amplifier output pin. Connect a phase compensation circuit between this pin and GND. Pin to connect a capacitor for soft start. A capacitor for soft start is charged by using the voltage of about 5μA. This pin ends the soft start period by using the voltage of about 1.1V and the frequency fold back function becomes active. 15 ILIM Reference current pin for current detection. The sink current of about 20μA flows to this pin when Low level (GND) is set to the MODE pin. Also, the sink current of about 40μA flows to this pin when High level (VIN) is set to the MODE pin. When a resistance is connected between this pin and VIN outside and the voltage applied to the SW pin is lower than the voltage of the terminal side of the resistance, the upper NchMOSFET is off by operating the current limiter comparator. This operation is reset with respect to each PWM pulse. 3 13 EN OCP ON/OFF pin. Pin to set the time of the timer (during double the over current detection point) Connect a capacitor between this pin and GND. OCP charge current : 5μA 4 12 RT MODE Pin to set the oscillation frequency. Connect a resistance between this pin and GND. Pin to switch the over current detection point. Set by the low level (GND) of the ILIM pin. Set by the high level (VIN) of the OCP pin. When this MODE pin is set to the high level and the point of the over current detection is set by using the ILIM pin is exceeded, the value becomes double the original value. Also, when the MODE pin is set to the low level, the point of the over current detection remains an original value. + - + + Current Amp SQ R SAW WAVE OSCILLATOR SQ R 7 CBOOT 8 HDRV DMAX = 90% 1.0V 0.5V 6 SW CONTROL Logic 5V 10 VDD 9 LDRV 11 GND shut down(SD) 3 EN No.A1443-4/6 LV5761V Timing Chart When the MODE pin is set to the high level and the point of the over current detection is set by using the ILIM pin is exceeded, the value becomes double the original value. Also, when the MODE pin is set to the low level, the point of over current detection remains an original value. Timing chart of the over current detection point switching is as below. MODE = HIGH t 1.25V OCP 0V over current detection point during High MODE current limit × 2A For example 6A current limit × 1A For example 3A over current detection point during Low MODE Load Current Sample Application Circuit VIN = 8 to 42V C1 C7 14 VIN 5 SYNC 12 MODE 3 EN 16 SS 2 COMP C5 R2 4 RT R7 GND OCP 11 13 R5 C6 SYNC H/L ON/OFF 15 ILIM CBOOT 7 HDRV 8 SW 6 LDRV 9 FB 1 VDD 10 C2 Q1 L OUT Q2 R4 C4 C9 R3 C8 C10 C3 C11 No.A1443-5/6 LV5761V SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein. SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of SANYO Semiconductor Co.,Ltd. Any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the SANYO Semiconductor Co.,Ltd. product that you intend to use. Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. Upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. This catalog provides information as of September, 2009. Specifications and information herein are subject to change without notice. PS PS No.A1443-6/6
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